]>
Commit | Line | Data |
---|---|---|
1965aae3 PA |
1 | #ifndef _ASM_X86_ACPI_H |
2 | #define _ASM_X86_ACPI_H | |
c1c30634 | 3 | |
0b80fc72 TG |
4 | /* |
5 | * Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
6 | * Copyright (C) 2001 Patrick Mochel <mochel@osdl.org> | |
7 | * | |
8 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
23 | * | |
24 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
25 | */ | |
26 | #include <acpi/pdc_intel.h> | |
c1c30634 | 27 | |
0b80fc72 | 28 | #include <asm/numa.h> |
bee7f9c8 | 29 | #include <asm/fixmap.h> |
c1c30634 | 30 | #include <asm/processor.h> |
bde6f5f5 | 31 | #include <asm/mmu.h> |
4c1cbafb | 32 | #include <asm/mpspec.h> |
319b6ffc | 33 | #include <asm/realmode.h> |
038bac2b | 34 | #include <asm/x86_init.h> |
c1c30634 | 35 | |
b40227fb JZZ |
36 | #ifdef CONFIG_ACPI_APEI |
37 | # include <asm/pgtable_types.h> | |
38 | #endif | |
39 | ||
0b80fc72 TG |
40 | #ifdef CONFIG_ACPI |
41 | extern int acpi_lapic; | |
42 | extern int acpi_ioapic; | |
43 | extern int acpi_noirq; | |
44 | extern int acpi_strict; | |
45 | extern int acpi_disabled; | |
0b80fc72 TG |
46 | extern int acpi_pci_disabled; |
47 | extern int acpi_skip_timer_override; | |
48 | extern int acpi_use_timer_override; | |
7f74f8f2 | 49 | extern int acpi_fix_pin2_polarity; |
9ad95879 | 50 | extern int acpi_disable_cmcff; |
0b80fc72 | 51 | |
6697c052 | 52 | extern u8 acpi_sci_flags; |
4565c4f6 | 53 | extern u32 acpi_sci_override_gsi; |
6697c052 HH |
54 | void acpi_pic_sci_set_trigger(unsigned int, u16); |
55 | ||
99da1ffe IM |
56 | struct device; |
57 | ||
90f6881e JF |
58 | extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi, |
59 | int trigger, int polarity); | |
8abb850a | 60 | extern void (*__acpi_unregister_gsi)(u32 gsi); |
90f6881e | 61 | |
0b80fc72 TG |
62 | static inline void disable_acpi(void) |
63 | { | |
64 | acpi_disabled = 1; | |
0b80fc72 TG |
65 | acpi_pci_disabled = 1; |
66 | acpi_noirq = 1; | |
67 | } | |
68 | ||
0b80fc72 TG |
69 | extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq); |
70 | ||
71 | static inline void acpi_noirq_set(void) { acpi_noirq = 1; } | |
72 | static inline void acpi_disable_pci(void) | |
73 | { | |
74 | acpi_pci_disabled = 1; | |
75 | acpi_noirq_set(); | |
76 | } | |
0b80fc72 | 77 | |
f1a2003e | 78 | /* Low-level suspend routine. */ |
d6a77ead | 79 | extern int (*acpi_suspend_lowlevel)(void); |
0b80fc72 | 80 | |
319b6ffc PA |
81 | /* Physical address to resume after wakeup */ |
82 | #define acpi_wakeup_address ((unsigned long)(real_mode_header->wakeup_start)) | |
0b80fc72 | 83 | |
c1c30634 AS |
84 | /* |
85 | * Check if the CPU can handle C2 and deeper | |
86 | */ | |
87 | static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate) | |
88 | { | |
89 | /* | |
90 | * Early models (<=5) of AMD Opterons are not supposed to go into | |
91 | * C2 state. | |
92 | * | |
93 | * Steppings 0x0A and later are good | |
94 | */ | |
95 | if (boot_cpu_data.x86 == 0x0F && | |
96 | boot_cpu_data.x86_vendor == X86_VENDOR_AMD && | |
97 | boot_cpu_data.x86_model <= 0x05 && | |
b399151c | 98 | boot_cpu_data.x86_stepping < 0x0A) |
c1c30634 | 99 | return 1; |
07c94a38 | 100 | else if (boot_cpu_has(X86_BUG_AMD_APIC_C1E)) |
a8d68290 | 101 | return 1; |
c1c30634 AS |
102 | else |
103 | return max_cstate; | |
104 | } | |
105 | ||
1d9cb470 AC |
106 | static inline bool arch_has_acpi_pdc(void) |
107 | { | |
108 | struct cpuinfo_x86 *c = &cpu_data(0); | |
109 | return (c->x86_vendor == X86_VENDOR_INTEL || | |
110 | c->x86_vendor == X86_VENDOR_CENTAUR); | |
111 | } | |
112 | ||
6c5807d7 AC |
113 | static inline void arch_acpi_set_pdc_bits(u32 *buf) |
114 | { | |
115 | struct cpuinfo_x86 *c = &cpu_data(0); | |
116 | ||
117 | buf[2] |= ACPI_PDC_C_CAPABILITY_SMP; | |
118 | ||
119 | if (cpu_has(c, X86_FEATURE_EST)) | |
120 | buf[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP; | |
121 | ||
122 | if (cpu_has(c, X86_FEATURE_ACPI)) | |
123 | buf[2] |= ACPI_PDC_T_FFH; | |
124 | ||
125 | /* | |
126 | * If mwait/monitor is unsupported, C2/C3_FFH will be disabled | |
127 | */ | |
128 | if (!cpu_has(c, X86_FEATURE_MWAIT)) | |
129 | buf[2] &= ~(ACPI_PDC_C_C2C3_FFH); | |
130 | } | |
131 | ||
b50154d5 GG |
132 | static inline bool acpi_has_cpu_in_madt(void) |
133 | { | |
134 | return !!acpi_lapic; | |
135 | } | |
136 | ||
038bac2b JG |
137 | #define ACPI_HAVE_ARCH_GET_ROOT_POINTER |
138 | static inline u64 acpi_arch_get_root_pointer(void) | |
139 | { | |
140 | return x86_init.acpi.get_root_pointer(); | |
141 | } | |
142 | ||
50beba07 AS |
143 | void acpi_generic_reduced_hw_init(void); |
144 | ||
0b80fc72 TG |
145 | #else /* !CONFIG_ACPI */ |
146 | ||
147 | #define acpi_lapic 0 | |
148 | #define acpi_ioapic 0 | |
9ad95879 | 149 | #define acpi_disable_cmcff 0 |
0b80fc72 TG |
150 | static inline void acpi_noirq_set(void) { } |
151 | static inline void acpi_disable_pci(void) { } | |
152 | static inline void disable_acpi(void) { } | |
153 | ||
50beba07 AS |
154 | static inline void acpi_generic_reduced_hw_init(void) { } |
155 | ||
0b80fc72 TG |
156 | #endif /* !CONFIG_ACPI */ |
157 | ||
158 | #define ARCH_HAS_POWER_INIT 1 | |
159 | ||
0b80fc72 | 160 | #ifdef CONFIG_ACPI_NUMA |
a9aec56a | 161 | extern int x86_acpi_numa_init(void); |
4e76f4e6 | 162 | #endif /* CONFIG_ACPI_NUMA */ |
0b80fc72 | 163 | |
67535736 AL |
164 | #define acpi_unlazy_tlb(x) leave_mm(x) |
165 | ||
b40227fb JZZ |
166 | #ifdef CONFIG_ACPI_APEI |
167 | static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr) | |
168 | { | |
169 | /* | |
170 | * We currently have no way to look up the EFI memory map | |
171 | * attributes for a region in a consistent way, because the | |
172 | * memmap is discarded after efi_free_boot_services(). So if | |
173 | * you call efi_mem_attributes() during boot and at runtime, | |
174 | * you could theoretically see different attributes. | |
175 | * | |
57bd1905 TL |
176 | * We are yet to see any x86 platforms that require anything |
177 | * other than PAGE_KERNEL (some ARM64 platforms require the | |
178 | * equivalent of PAGE_KERNEL_NOCACHE). Additionally, if SME | |
179 | * is active, the ACPI information will not be encrypted, | |
180 | * so return PAGE_KERNEL_NOENC until we know differently. | |
b40227fb | 181 | */ |
57bd1905 | 182 | return PAGE_KERNEL_NOENC; |
b40227fb JZZ |
183 | } |
184 | #endif | |
185 | ||
84b06ca3 AM |
186 | #define ACPI_TABLE_UPGRADE_MAX_PHYS (max_low_pfn_mapped << PAGE_SHIFT) |
187 | ||
1965aae3 | 188 | #endif /* _ASM_X86_ACPI_H */ |