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1a59d1b8 | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
1965aae3 PA |
2 | #ifndef _ASM_X86_ACPI_H |
3 | #define _ASM_X86_ACPI_H | |
c1c30634 | 4 | |
0b80fc72 TG |
5 | /* |
6 | * Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
7 | * Copyright (C) 2001 Patrick Mochel <mochel@osdl.org> | |
0b80fc72 TG |
8 | */ |
9 | #include <acpi/pdc_intel.h> | |
c1c30634 | 10 | |
0b80fc72 | 11 | #include <asm/numa.h> |
bee7f9c8 | 12 | #include <asm/fixmap.h> |
c1c30634 | 13 | #include <asm/processor.h> |
bde6f5f5 | 14 | #include <asm/mmu.h> |
4c1cbafb | 15 | #include <asm/mpspec.h> |
319b6ffc | 16 | #include <asm/realmode.h> |
038bac2b | 17 | #include <asm/x86_init.h> |
c1c30634 | 18 | |
b40227fb JZZ |
19 | #ifdef CONFIG_ACPI_APEI |
20 | # include <asm/pgtable_types.h> | |
21 | #endif | |
22 | ||
0b80fc72 TG |
23 | #ifdef CONFIG_ACPI |
24 | extern int acpi_lapic; | |
25 | extern int acpi_ioapic; | |
26 | extern int acpi_noirq; | |
27 | extern int acpi_strict; | |
28 | extern int acpi_disabled; | |
0b80fc72 TG |
29 | extern int acpi_pci_disabled; |
30 | extern int acpi_skip_timer_override; | |
31 | extern int acpi_use_timer_override; | |
7f74f8f2 | 32 | extern int acpi_fix_pin2_polarity; |
9ad95879 | 33 | extern int acpi_disable_cmcff; |
0b80fc72 | 34 | |
6697c052 | 35 | extern u8 acpi_sci_flags; |
4565c4f6 | 36 | extern u32 acpi_sci_override_gsi; |
6697c052 HH |
37 | void acpi_pic_sci_set_trigger(unsigned int, u16); |
38 | ||
99da1ffe IM |
39 | struct device; |
40 | ||
90f6881e JF |
41 | extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi, |
42 | int trigger, int polarity); | |
8abb850a | 43 | extern void (*__acpi_unregister_gsi)(u32 gsi); |
90f6881e | 44 | |
0b80fc72 TG |
45 | static inline void disable_acpi(void) |
46 | { | |
47 | acpi_disabled = 1; | |
0b80fc72 TG |
48 | acpi_pci_disabled = 1; |
49 | acpi_noirq = 1; | |
50 | } | |
51 | ||
0b80fc72 TG |
52 | extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq); |
53 | ||
54 | static inline void acpi_noirq_set(void) { acpi_noirq = 1; } | |
55 | static inline void acpi_disable_pci(void) | |
56 | { | |
57 | acpi_pci_disabled = 1; | |
58 | acpi_noirq_set(); | |
59 | } | |
0b80fc72 | 60 | |
f1a2003e | 61 | /* Low-level suspend routine. */ |
d6a77ead | 62 | extern int (*acpi_suspend_lowlevel)(void); |
0b80fc72 | 63 | |
319b6ffc PA |
64 | /* Physical address to resume after wakeup */ |
65 | #define acpi_wakeup_address ((unsigned long)(real_mode_header->wakeup_start)) | |
0b80fc72 | 66 | |
c1c30634 AS |
67 | /* |
68 | * Check if the CPU can handle C2 and deeper | |
69 | */ | |
70 | static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate) | |
71 | { | |
72 | /* | |
73 | * Early models (<=5) of AMD Opterons are not supposed to go into | |
74 | * C2 state. | |
75 | * | |
76 | * Steppings 0x0A and later are good | |
77 | */ | |
78 | if (boot_cpu_data.x86 == 0x0F && | |
79 | boot_cpu_data.x86_vendor == X86_VENDOR_AMD && | |
80 | boot_cpu_data.x86_model <= 0x05 && | |
b399151c | 81 | boot_cpu_data.x86_stepping < 0x0A) |
c1c30634 | 82 | return 1; |
07c94a38 | 83 | else if (boot_cpu_has(X86_BUG_AMD_APIC_C1E)) |
a8d68290 | 84 | return 1; |
c1c30634 AS |
85 | else |
86 | return max_cstate; | |
87 | } | |
88 | ||
1d9cb470 AC |
89 | static inline bool arch_has_acpi_pdc(void) |
90 | { | |
91 | struct cpuinfo_x86 *c = &cpu_data(0); | |
92 | return (c->x86_vendor == X86_VENDOR_INTEL || | |
93 | c->x86_vendor == X86_VENDOR_CENTAUR); | |
94 | } | |
95 | ||
6c5807d7 AC |
96 | static inline void arch_acpi_set_pdc_bits(u32 *buf) |
97 | { | |
98 | struct cpuinfo_x86 *c = &cpu_data(0); | |
99 | ||
100 | buf[2] |= ACPI_PDC_C_CAPABILITY_SMP; | |
101 | ||
102 | if (cpu_has(c, X86_FEATURE_EST)) | |
103 | buf[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP; | |
104 | ||
105 | if (cpu_has(c, X86_FEATURE_ACPI)) | |
106 | buf[2] |= ACPI_PDC_T_FFH; | |
107 | ||
108 | /* | |
109 | * If mwait/monitor is unsupported, C2/C3_FFH will be disabled | |
110 | */ | |
111 | if (!cpu_has(c, X86_FEATURE_MWAIT)) | |
112 | buf[2] &= ~(ACPI_PDC_C_C2C3_FFH); | |
113 | } | |
114 | ||
b50154d5 GG |
115 | static inline bool acpi_has_cpu_in_madt(void) |
116 | { | |
117 | return !!acpi_lapic; | |
118 | } | |
119 | ||
038bac2b JG |
120 | #define ACPI_HAVE_ARCH_GET_ROOT_POINTER |
121 | static inline u64 acpi_arch_get_root_pointer(void) | |
122 | { | |
123 | return x86_init.acpi.get_root_pointer(); | |
124 | } | |
125 | ||
50beba07 AS |
126 | void acpi_generic_reduced_hw_init(void); |
127 | ||
e7b66d16 JG |
128 | u64 x86_default_get_root_pointer(void); |
129 | ||
0b80fc72 TG |
130 | #else /* !CONFIG_ACPI */ |
131 | ||
132 | #define acpi_lapic 0 | |
133 | #define acpi_ioapic 0 | |
9ad95879 | 134 | #define acpi_disable_cmcff 0 |
0b80fc72 TG |
135 | static inline void acpi_noirq_set(void) { } |
136 | static inline void acpi_disable_pci(void) { } | |
137 | static inline void disable_acpi(void) { } | |
138 | ||
50beba07 AS |
139 | static inline void acpi_generic_reduced_hw_init(void) { } |
140 | ||
e7b66d16 JG |
141 | static inline u64 x86_default_get_root_pointer(void) |
142 | { | |
143 | return 0; | |
144 | } | |
145 | ||
0b80fc72 TG |
146 | #endif /* !CONFIG_ACPI */ |
147 | ||
148 | #define ARCH_HAS_POWER_INIT 1 | |
149 | ||
0b80fc72 | 150 | #ifdef CONFIG_ACPI_NUMA |
a9aec56a | 151 | extern int x86_acpi_numa_init(void); |
4e76f4e6 | 152 | #endif /* CONFIG_ACPI_NUMA */ |
0b80fc72 | 153 | |
67535736 AL |
154 | #define acpi_unlazy_tlb(x) leave_mm(x) |
155 | ||
b40227fb JZZ |
156 | #ifdef CONFIG_ACPI_APEI |
157 | static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr) | |
158 | { | |
159 | /* | |
160 | * We currently have no way to look up the EFI memory map | |
161 | * attributes for a region in a consistent way, because the | |
162 | * memmap is discarded after efi_free_boot_services(). So if | |
163 | * you call efi_mem_attributes() during boot and at runtime, | |
164 | * you could theoretically see different attributes. | |
165 | * | |
57bd1905 TL |
166 | * We are yet to see any x86 platforms that require anything |
167 | * other than PAGE_KERNEL (some ARM64 platforms require the | |
168 | * equivalent of PAGE_KERNEL_NOCACHE). Additionally, if SME | |
169 | * is active, the ACPI information will not be encrypted, | |
170 | * so return PAGE_KERNEL_NOENC until we know differently. | |
b40227fb | 171 | */ |
57bd1905 | 172 | return PAGE_KERNEL_NOENC; |
b40227fb JZZ |
173 | } |
174 | #endif | |
175 | ||
84b06ca3 AM |
176 | #define ACPI_TABLE_UPGRADE_MAX_PHYS (max_low_pfn_mapped << PAGE_SHIFT) |
177 | ||
1965aae3 | 178 | #endif /* _ASM_X86_ACPI_H */ |