[mirror_ubuntu-focal-kernel.git] / arch / x86 / include / asm / dma-mapping.h

#ifndef _ASM_X86_DMA_MAPPING_H
#define _ASM_X86_DMA_MAPPING_H

/*
 * IOMMU interface. See Documentation/PCI/PCI-DMA-mapping.txt and
 * Documentation/DMA-API.txt for documentation.
 */

#include <linux/scatterlist.h>
#include <asm/io.h>
#include <asm/swiotlb.h>
#include <asm-generic/dma-coherent.h>

extern dma_addr_t bad_dma_address;
extern int iommu_merge;
extern struct device x86_dma_fallback_dev;
extern int panic_on_overflow;

struct dma_mapping_ops {
	int             (*mapping_error)(struct device *dev,
					 dma_addr_t dma_addr);
	void*           (*alloc_coherent)(struct device *dev, size_t size,
				dma_addr_t *dma_handle, gfp_t gfp);
	void            (*free_coherent)(struct device *dev, size_t size,
				void *vaddr, dma_addr_t dma_handle);
	dma_addr_t      (*map_single)(struct device *hwdev, phys_addr_t ptr,
				size_t size, int direction);
	void            (*unmap_single)(struct device *dev, dma_addr_t addr,
				size_t size, int direction);
	void            (*sync_single_for_cpu)(struct device *hwdev,
				dma_addr_t dma_handle, size_t size,
				int direction);
	void            (*sync_single_for_device)(struct device *hwdev,
				dma_addr_t dma_handle, size_t size,
				int direction);
	void            (*sync_single_range_for_cpu)(struct device *hwdev,
				dma_addr_t dma_handle, unsigned long offset,
				size_t size, int direction);
	void            (*sync_single_range_for_device)(struct device *hwdev,
				dma_addr_t dma_handle, unsigned long offset,
				size_t size, int direction);
	void            (*sync_sg_for_cpu)(struct device *hwdev,
				struct scatterlist *sg, int nelems,
				int direction);
	void            (*sync_sg_for_device)(struct device *hwdev,
				struct scatterlist *sg, int nelems,
				int direction);
	int             (*map_sg)(struct device *hwdev, struct scatterlist *sg,
				int nents, int direction);
	void            (*unmap_sg)(struct device *hwdev,
				struct scatterlist *sg, int nents,
				int direction);
	int             (*dma_supported)(struct device *hwdev, u64 mask);
	int		is_phys;
};

extern struct dma_mapping_ops *dma_ops;

static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
{
#ifdef CONFIG_X86_32
	return dma_ops;
#else
	if (unlikely(!dev) || !dev->archdata.dma_ops)
		return dma_ops;
	else
		return dev->archdata.dma_ops;
#endif
}

/* Make sure we keep the same behaviour */
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
{
	struct dma_mapping_ops *ops = get_dma_ops(dev);
	if (ops->mapping_error)
		return ops->mapping_error(dev, dma_addr);

	return (dma_addr == bad_dma_address);
}

#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
#define dma_is_consistent(d, h)	(1)

extern int dma_supported(struct device *hwdev, u64 mask);
extern int dma_set_mask(struct device *dev, u64 mask);

extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
					dma_addr_t *dma_addr, gfp_t flag);

static inline dma_addr_t
dma_map_single(struct device *hwdev, void *ptr, size_t size,
	       int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	return ops->map_single(hwdev, virt_to_phys(ptr), size, direction);
}

static inline void
dma_unmap_single(struct device *dev, dma_addr_t addr, size_t size,
		 int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(dev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->unmap_single)
		ops->unmap_single(dev, addr, size, direction);
}

static inline int
dma_map_sg(struct device *hwdev, struct scatterlist *sg,
	   int nents, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	return ops->map_sg(hwdev, sg, nents, direction);
}

static inline void
dma_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents,
	     int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->unmap_sg)
		ops->unmap_sg(hwdev, sg, nents, direction);
}

static inline void
dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
			size_t size, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_single_for_cpu)
		ops->sync_single_for_cpu(hwdev, dma_handle, size, direction);
	flush_write_buffers();
}

static inline void
dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle,
			   size_t size, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_single_for_device)
		ops->sync_single_for_device(hwdev, dma_handle, size, direction);
	flush_write_buffers();
}

static inline void
dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
			      unsigned long offset, size_t size, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_single_range_for_cpu)
		ops->sync_single_range_for_cpu(hwdev, dma_handle, offset,
					       size, direction);
	flush_write_buffers();
}

static inline void
dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle,
				 unsigned long offset, size_t size,
				 int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_single_range_for_device)
		ops->sync_single_range_for_device(hwdev, dma_handle,
						  offset, size, direction);
	flush_write_buffers();
}

static inline void
dma_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
		    int nelems, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_sg_for_cpu)
		ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
	flush_write_buffers();
}

static inline void
dma_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
		       int nelems, int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(hwdev);

	BUG_ON(!valid_dma_direction(direction));
	if (ops->sync_sg_for_device)
		ops->sync_sg_for_device(hwdev, sg, nelems, direction);

	flush_write_buffers();
}

static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
				      size_t offset, size_t size,
				      int direction)
{
	struct dma_mapping_ops *ops = get_dma_ops(dev);

	BUG_ON(!valid_dma_direction(direction));
	return ops->map_single(dev, page_to_phys(page) + offset,
			       size, direction);
}

static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
				  size_t size, int direction)
{
	dma_unmap_single(dev, addr, size, direction);
}

static inline void
dma_cache_sync(struct device *dev, void *vaddr, size_t size,
	enum dma_data_direction dir)
{
	flush_write_buffers();
}

static inline int dma_get_cache_alignment(void)
{
	/* no easy way to get cache size on all x86, so return the
	 * maximum possible, to be safe */
	return boot_cpu_data.x86_clflush_size;
}

static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
						    gfp_t gfp)
{
	unsigned long dma_mask = 0;

	dma_mask = dev->coherent_dma_mask;
	if (!dma_mask)
		dma_mask = (gfp & GFP_DMA) ? DMA_24BIT_MASK : DMA_32BIT_MASK;

	return dma_mask;
}

static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
{
	unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);

	if (dma_mask <= DMA_24BIT_MASK)
		gfp |= GFP_DMA;
#ifdef CONFIG_X86_64
	if (dma_mask <= DMA_32BIT_MASK && !(gfp & GFP_DMA))
		gfp |= GFP_DMA32;
#endif
       return gfp;
}

static inline void *
dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle,
		gfp_t gfp)
{
	struct dma_mapping_ops *ops = get_dma_ops(dev);
	void *memory;

	gfp &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32);

	if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
		return memory;

	if (!dev) {
		dev = &x86_dma_fallback_dev;
		gfp |= GFP_DMA;
	}

	if (!is_device_dma_capable(dev))
		return NULL;

	if (!ops->alloc_coherent)
		return NULL;

	return ops->alloc_coherent(dev, size, dma_handle,
				   dma_alloc_coherent_gfp_flags(dev, gfp));
}

static inline void dma_free_coherent(struct device *dev, size_t size,
				     void *vaddr, dma_addr_t bus)
{
	struct dma_mapping_ops *ops = get_dma_ops(dev);

	WARN_ON(irqs_disabled());       /* for portability */

	if (dma_release_from_coherent(dev, get_order(size), vaddr))
		return;

	if (ops->free_coherent)
		ops->free_coherent(dev, size, vaddr, bus);
}

#endif
Commit	Line	Data
1965aae3 PA	1	#ifndef _ASM_X86_DMA_MAPPING_H
1965aae3 PA	2	#define _ASM_X86_DMA_MAPPING_H
6f536635 GC	3
6f536635 GC	4	/*
5872fb94 RD	5	* IOMMU interface. See Documentation/PCI/PCI-DMA-mapping.txt and
5872fb94 RD	6	* Documentation/DMA-API.txt for documentation.
6f536635 GC	7	*/
	8
	9	#include <linux/scatterlist.h>
	10	#include <asm/io.h>
	11	#include <asm/swiotlb.h>
6c505ce3	12	#include <asm-generic/dma-coherent.h>
6f536635	13
7c183416	14	extern dma_addr_t bad_dma_address;
b7107a3d	15	extern int iommu_merge;
6c505ce3	16	extern struct device x86_dma_fallback_dev;
b7107a3d	17	extern int panic_on_overflow;
7c183416	18
6f536635	19	struct dma_mapping_ops {
8d8bb39b FT	20	int (mapping_error)(struct device dev,
8d8bb39b FT	21	dma_addr_t dma_addr);
6f536635 GC	22	void* (alloc_coherent)(struct device dev, size_t size,
	23	dma_addr_t *dma_handle, gfp_t gfp);
	24	void (free_coherent)(struct device dev, size_t size,
	25	void *vaddr, dma_addr_t dma_handle);
2be62149	26	dma_addr_t (map_single)(struct device hwdev, phys_addr_t ptr,
6f536635	27	size_t size, int direction);
6f536635 GC	28	void (unmap_single)(struct device dev, dma_addr_t addr,
	29	size_t size, int direction);
	30	void (sync_single_for_cpu)(struct device hwdev,
	31	dma_addr_t dma_handle, size_t size,
	32	int direction);
	33	void (sync_single_for_device)(struct device hwdev,
	34	dma_addr_t dma_handle, size_t size,
	35	int direction);
	36	void (sync_single_range_for_cpu)(struct device hwdev,
	37	dma_addr_t dma_handle, unsigned long offset,
	38	size_t size, int direction);
	39	void (sync_single_range_for_device)(struct device hwdev,
	40	dma_addr_t dma_handle, unsigned long offset,
	41	size_t size, int direction);
	42	void (sync_sg_for_cpu)(struct device hwdev,
	43	struct scatterlist *sg, int nelems,
	44	int direction);
	45	void (sync_sg_for_device)(struct device hwdev,
	46	struct scatterlist *sg, int nelems,
	47	int direction);
	48	int (map_sg)(struct device hwdev, struct scatterlist *sg,
	49	int nents, int direction);
	50	void (unmap_sg)(struct device hwdev,
	51	struct scatterlist *sg, int nents,
	52	int direction);
	53	int (dma_supported)(struct device hwdev, u64 mask);
	54	int is_phys;
	55	};
	56
8d8bb39b	57	extern struct dma_mapping_ops *dma_ops;
22456b97	58
8d8bb39b	59	static inline struct dma_mapping_ops get_dma_ops(struct device dev)
c786df08	60	{
8d8bb39b FT	61	#ifdef CONFIG_X86_32
	62	return dma_ops;
	63	#else
	64	if (unlikely(!dev) \|\| !dev->archdata.dma_ops)
	65	return dma_ops;
	66	else
	67	return dev->archdata.dma_ops;
cfb80c9e	68	#endif
8d8bb39b FT	69	}
	70
	71	/* Make sure we keep the same behaviour */
	72	static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
	73	{
8d8bb39b FT	74	struct dma_mapping_ops *ops = get_dma_ops(dev);
	75	if (ops->mapping_error)
	76	return ops->mapping_error(dev, dma_addr);
c786df08	77
7b1dedca	78	return (dma_addr == bad_dma_address);
c786df08 GC	79	}
c786df08 GC	80
8d396ded GC	81	#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
8d396ded GC	82	#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
6c505ce3	83	#define dma_is_consistent(d, h) (1)
8d396ded	84
802c1f66 GC	85	extern int dma_supported(struct device *hwdev, u64 mask);
	86	extern int dma_set_mask(struct device *dev, u64 mask);
	87
9f6ac577 FT	88	extern void dma_generic_alloc_coherent(struct device dev, size_t size,
	89	dma_addr_t *dma_addr, gfp_t flag);
	90
22456b97 GC	91	static inline dma_addr_t
	92	dma_map_single(struct device hwdev, void ptr, size_t size,
	93	int direction)
	94	{
8d8bb39b FT	95	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	96
22456b97	97	BUG_ON(!valid_dma_direction(direction));
8d8bb39b	98	return ops->map_single(hwdev, virt_to_phys(ptr), size, direction);
22456b97 GC	99	}
22456b97 GC	100
0cb0ae68 GC	101	static inline void
	102	dma_unmap_single(struct device *dev, dma_addr_t addr, size_t size,
	103	int direction)
	104	{
8d8bb39b FT	105	struct dma_mapping_ops *ops = get_dma_ops(dev);
8d8bb39b FT	106
0cb0ae68	107	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	108	if (ops->unmap_single)
8d8bb39b FT	109	ops->unmap_single(dev, addr, size, direction);
0cb0ae68 GC	110	}
0cb0ae68 GC	111
16a3ce9b GC	112	static inline int
	113	dma_map_sg(struct device hwdev, struct scatterlist sg,
	114	int nents, int direction)
	115	{
8d8bb39b FT	116	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	117
16a3ce9b	118	BUG_ON(!valid_dma_direction(direction));
8d8bb39b	119	return ops->map_sg(hwdev, sg, nents, direction);
16a3ce9b	120	}
72c784f8 GC	121
	122	static inline void
	123	dma_unmap_sg(struct device hwdev, struct scatterlist sg, int nents,
	124	int direction)
	125	{
8d8bb39b FT	126	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	127
72c784f8	128	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	129	if (ops->unmap_sg)
8d8bb39b FT	130	ops->unmap_sg(hwdev, sg, nents, direction);
72c784f8	131	}
c01dd8cf GC	132
	133	static inline void
	134	dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
	135	size_t size, int direction)
	136	{
8d8bb39b FT	137	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	138
c01dd8cf	139	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	140	if (ops->sync_single_for_cpu)
8d8bb39b FT	141	ops->sync_single_for_cpu(hwdev, dma_handle, size, direction);
c01dd8cf GC	142	flush_write_buffers();
	143	}
	144
9231b269 GC	145	static inline void
	146	dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle,
	147	size_t size, int direction)
	148	{
8d8bb39b FT	149	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	150
9231b269	151	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	152	if (ops->sync_single_for_device)
8d8bb39b FT	153	ops->sync_single_for_device(hwdev, dma_handle, size, direction);
9231b269 GC	154	flush_write_buffers();
	155	}
	156
627610fc GC	157	static inline void
	158	dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
	159	unsigned long offset, size_t size, int direction)
	160	{
8d8bb39b	161	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
627610fc	162
8d8bb39b FT	163	BUG_ON(!valid_dma_direction(direction));
	164	if (ops->sync_single_range_for_cpu)
	165	ops->sync_single_range_for_cpu(hwdev, dma_handle, offset,
	166	size, direction);
627610fc GC	167	flush_write_buffers();
627610fc GC	168	}
71362332 GC	169
	170	static inline void
	171	dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle,
	172	unsigned long offset, size_t size,
	173	int direction)
	174	{
8d8bb39b	175	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
71362332	176
8d8bb39b FT	177	BUG_ON(!valid_dma_direction(direction));
	178	if (ops->sync_single_range_for_device)
	179	ops->sync_single_range_for_device(hwdev, dma_handle,
	180	offset, size, direction);
71362332 GC	181	flush_write_buffers();
	182	}
	183
ed435dee GC	184	static inline void
	185	dma_sync_sg_for_cpu(struct device hwdev, struct scatterlist sg,
	186	int nelems, int direction)
	187	{
8d8bb39b FT	188	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	189
ed435dee	190	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	191	if (ops->sync_sg_for_cpu)
8d8bb39b FT	192	ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
ed435dee GC	193	flush_write_buffers();
ed435dee GC	194	}
e7f3a913 GC	195
	196	static inline void
	197	dma_sync_sg_for_device(struct device hwdev, struct scatterlist sg,
	198	int nelems, int direction)
	199	{
8d8bb39b FT	200	struct dma_mapping_ops *ops = get_dma_ops(hwdev);
8d8bb39b FT	201
e7f3a913	202	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	203	if (ops->sync_sg_for_device)
8d8bb39b FT	204	ops->sync_sg_for_device(hwdev, sg, nelems, direction);
e7f3a913 GC	205
	206	flush_write_buffers();
	207	}
4d92fbf2 GC	208
	209	static inline dma_addr_t dma_map_page(struct device dev, struct page page,
	210	size_t offset, size_t size,
	211	int direction)
	212	{
8d8bb39b FT	213	struct dma_mapping_ops *ops = get_dma_ops(dev);
8d8bb39b FT	214
2be62149	215	BUG_ON(!valid_dma_direction(direction));
8d8bb39b FT	216	return ops->map_single(dev, page_to_phys(page) + offset,
8d8bb39b FT	217	size, direction);
4d92fbf2 GC	218	}
	219
	220	static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
	221	size_t size, int direction)
	222	{
	223	dma_unmap_single(dev, addr, size, direction);
	224	}
	225
3cb6a917 GC	226	static inline void
	227	dma_cache_sync(struct device dev, void vaddr, size_t size,
	228	enum dma_data_direction dir)
	229	{
	230	flush_write_buffers();
	231	}
ae17a63b	232
b7107a3d GC	233	static inline int dma_get_cache_alignment(void)
	234	{
	235	/* no easy way to get cache size on all x86, so return the
	236	* maximum possible, to be safe */
	237	return boot_cpu_data.x86_clflush_size;
	238	}
	239
823e7e8c FT	240	static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
	241	gfp_t gfp)
	242	{
	243	unsigned long dma_mask = 0;
b7107a3d	244
823e7e8c FT	245	dma_mask = dev->coherent_dma_mask;
	246	if (!dma_mask)
	247	dma_mask = (gfp & GFP_DMA) ? DMA_24BIT_MASK : DMA_32BIT_MASK;
	248
	249	return dma_mask;
	250	}
	251
	252	static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
	253	{
	254	unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
	255
75bebb7f FT	256	if (dma_mask <= DMA_24BIT_MASK)
	257	gfp \|= GFP_DMA;
	258	#ifdef CONFIG_X86_64
823e7e8c FT	259	if (dma_mask <= DMA_32BIT_MASK && !(gfp & GFP_DMA))
	260	gfp \|= GFP_DMA32;
	261	#endif
	262	return gfp;
	263	}
	264
6c505ce3 JR	265	static inline void *
	266	dma_alloc_coherent(struct device dev, size_t size, dma_addr_t dma_handle,
	267	gfp_t gfp)
	268	{
	269	struct dma_mapping_ops *ops = get_dma_ops(dev);
	270	void *memory;
	271
8a53ad67 FT	272	gfp &= ~(__GFP_DMA \| __GFP_HIGHMEM \| __GFP_DMA32);
8a53ad67 FT	273
6c505ce3 JR	274	if (dma_alloc_from_coherent(dev, size, dma_handle, &memory))
	275	return memory;
	276
	277	if (!dev) {
	278	dev = &x86_dma_fallback_dev;
	279	gfp \|= GFP_DMA;
	280	}
	281
98216260	282	if (!is_device_dma_capable(dev))
de9f521f FT	283	return NULL;
de9f521f FT	284
823e7e8c FT	285	if (!ops->alloc_coherent)
	286	return NULL;
	287
	288	return ops->alloc_coherent(dev, size, dma_handle,
	289	dma_alloc_coherent_gfp_flags(dev, gfp));
6c505ce3 JR	290	}
	291
	292	static inline void dma_free_coherent(struct device *dev, size_t size,
	293	void *vaddr, dma_addr_t bus)
	294	{
	295	struct dma_mapping_ops *ops = get_dma_ops(dev);
	296
	297	WARN_ON(irqs_disabled()); /* for portability */
	298
	299	if (dma_release_from_coherent(dev, get_order(size), vaddr))
	300	return;
	301
	302	if (ops->free_coherent)
	303	ops->free_coherent(dev, size, vaddr, bus);
	304	}
b7107a3d	305
6f536635	306	#endif