[mirror_ubuntu-artful-kernel.git] / arch / x86 / include / asm / dma-mapping.h

#ifndef _ASM_X86_DMA_MAPPING_H
#define _ASM_X86_DMA_MAPPING_H

/*
 * IOMMU interface. See Documentation/DMA-API-HOWTO.txt and
 * Documentation/DMA-API.txt for documentation.
 */

#include <linux/kmemcheck.h>
#include <linux/scatterlist.h>
#include <linux/dma-debug.h>
#include <asm/io.h>
#include <asm/swiotlb.h>
#include <linux/dma-contiguous.h>

#ifdef CONFIG_ISA
# define ISA_DMA_BIT_MASK DMA_BIT_MASK(24)
#else
# define ISA_DMA_BIT_MASK DMA_BIT_MASK(32)
#endif

extern int iommu_merge;
extern struct device x86_dma_fallback_dev;
extern int panic_on_overflow;

extern const struct dma_map_ops *dma_ops;

static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
{
	return dma_ops;
}

bool arch_dma_alloc_attrs(struct device **dev, gfp_t *gfp);
#define arch_dma_alloc_attrs arch_dma_alloc_attrs

extern void *dma_generic_alloc_coherent(struct device *dev, size_t size,
					dma_addr_t *dma_addr, gfp_t flag,
					unsigned long attrs);

extern void dma_generic_free_coherent(struct device *dev, size_t size,
				      void *vaddr, dma_addr_t dma_addr,
				      unsigned long attrs);

#ifdef CONFIG_X86_DMA_REMAP /* Platform code defines bridge-specific code */
extern bool dma_capable(struct device *dev, dma_addr_t addr, size_t size);
extern dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
extern phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr);
#else

static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
{
	if (!dev->dma_mask)
		return 0;

	return addr + size - 1 <= *dev->dma_mask;
}

static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
{
	return paddr;
}

static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
{
	return daddr;
}
#endif /* CONFIG_X86_DMA_REMAP */

static inline void
dma_cache_sync(struct device *dev, void *vaddr, size_t size,
	enum dma_data_direction dir)
{
	flush_write_buffers();
}

static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
						    gfp_t gfp)
{
	unsigned long dma_mask = 0;

	dma_mask = dev->coherent_dma_mask;
	if (!dma_mask)
		dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32);

	return dma_mask;
}

static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
{
	unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);

	if (dma_mask <= DMA_BIT_MASK(24))
		gfp |= GFP_DMA;
#ifdef CONFIG_X86_64
	if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA))
		gfp |= GFP_DMA32;
#endif
       return gfp;
}

#endif
Commit	Line	Data
1965aae3 PA	1	#ifndef _ASM_X86_DMA_MAPPING_H
1965aae3 PA	2	#define _ASM_X86_DMA_MAPPING_H
6f536635 GC	3
6f536635 GC	4	/*
395cf969	5	* IOMMU interface. See Documentation/DMA-API-HOWTO.txt and
5872fb94	6	* Documentation/DMA-API.txt for documentation.
6f536635 GC	7	*/
6f536635 GC	8
d7002857	9	#include <linux/kmemcheck.h>
6f536635	10	#include <linux/scatterlist.h>
2118d0c5	11	#include <linux/dma-debug.h>
6f536635 GC	12	#include <asm/io.h>
6f536635 GC	13	#include <asm/swiotlb.h>
0a2b9a6e	14	#include <linux/dma-contiguous.h>
6f536635	15
eb647138 JB	16	#ifdef CONFIG_ISA
	17	# define ISA_DMA_BIT_MASK DMA_BIT_MASK(24)
	18	#else
	19	# define ISA_DMA_BIT_MASK DMA_BIT_MASK(32)
	20	#endif
	21
b7107a3d	22	extern int iommu_merge;
6c505ce3	23	extern struct device x86_dma_fallback_dev;
b7107a3d	24	extern int panic_on_overflow;
7c183416	25
5299709d	26	extern const struct dma_map_ops *dma_ops;
160c1d8e	27
815dd187	28	static inline const struct dma_map_ops get_arch_dma_ops(struct bus_type bus)
c786df08	29	{
8d8bb39b	30	return dma_ops;
8d8bb39b FT	31	}
8d8bb39b FT	32
6894258e CH	33	bool arch_dma_alloc_attrs(struct device *dev, gfp_t gfp);
	34	#define arch_dma_alloc_attrs arch_dma_alloc_attrs
	35
9f6ac577	36	extern void dma_generic_alloc_coherent(struct device dev, size_t size,
baa676fc	37	dma_addr_t *dma_addr, gfp_t flag,
00085f1e	38	unsigned long attrs);
9f6ac577	39
0a2b9a6e MS	40	extern void dma_generic_free_coherent(struct device *dev, size_t size,
0a2b9a6e MS	41	void *vaddr, dma_addr_t dma_addr,
00085f1e	42	unsigned long attrs);
0a2b9a6e	43
f7219a53 AR	44	#ifdef CONFIG_X86_DMA_REMAP /* Platform code defines bridge-specific code */
	45	extern bool dma_capable(struct device *dev, dma_addr_t addr, size_t size);
	46	extern dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
	47	extern phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr);
	48	#else
	49
99becaca FT	50	static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
	51	{
	52	if (!dev->dma_mask)
	53	return 0;
	54
ac2b3e67	55	return addr + size - 1 <= *dev->dma_mask;
99becaca FT	56	}
99becaca FT	57
8d4f5339 FT	58	static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
	59	{
	60	return paddr;
	61	}
	62
	63	static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
	64	{
	65	return daddr;
	66	}
f7219a53	67	#endif /* CONFIG_X86_DMA_REMAP */
8d4f5339	68
3cb6a917 GC	69	static inline void
	70	dma_cache_sync(struct device dev, void vaddr, size_t size,
	71	enum dma_data_direction dir)
	72	{
	73	flush_write_buffers();
	74	}
ae17a63b	75
823e7e8c FT	76	static inline unsigned long dma_alloc_coherent_mask(struct device *dev,
	77	gfp_t gfp)
	78	{
	79	unsigned long dma_mask = 0;
b7107a3d	80
823e7e8c FT	81	dma_mask = dev->coherent_dma_mask;
823e7e8c FT	82	if (!dma_mask)
2f4f27d4	83	dma_mask = (gfp & GFP_DMA) ? DMA_BIT_MASK(24) : DMA_BIT_MASK(32);
823e7e8c FT	84
	85	return dma_mask;
	86	}
	87
	88	static inline gfp_t dma_alloc_coherent_gfp_flags(struct device *dev, gfp_t gfp)
	89	{
	90	unsigned long dma_mask = dma_alloc_coherent_mask(dev, gfp);
	91
2f4f27d4	92	if (dma_mask <= DMA_BIT_MASK(24))
75bebb7f FT	93	gfp \|= GFP_DMA;
75bebb7f FT	94	#ifdef CONFIG_X86_64
284901a9	95	if (dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA))
823e7e8c FT	96	gfp \|= GFP_DMA32;
	97	#endif
	98	return gfp;
	99	}
	100
6f536635	101	#endif