[mirror_ubuntu-artful-kernel.git] / arch / x86 / include / asm / hpet.h

#ifndef _ASM_X86_HPET_H
#define _ASM_X86_HPET_H

#include <linux/msi.h>

#ifdef CONFIG_HPET_TIMER

#define HPET_MMAP_SIZE		1024

#define HPET_ID			0x000
#define HPET_PERIOD		0x004
#define HPET_CFG		0x010
#define HPET_STATUS		0x020
#define HPET_COUNTER		0x0f0

#define HPET_Tn_CFG(n)		(0x100 + 0x20 * n)
#define HPET_Tn_CMP(n)		(0x108 + 0x20 * n)
#define HPET_Tn_ROUTE(n)	(0x110 + 0x20 * n)

#define HPET_T0_CFG		0x100
#define HPET_T0_CMP		0x108
#define HPET_T0_ROUTE		0x110
#define HPET_T1_CFG		0x120
#define HPET_T1_CMP		0x128
#define HPET_T1_ROUTE		0x130
#define HPET_T2_CFG		0x140
#define HPET_T2_CMP		0x148
#define HPET_T2_ROUTE		0x150

#define HPET_ID_REV		0x000000ff
#define HPET_ID_NUMBER		0x00001f00
#define HPET_ID_64BIT		0x00002000
#define HPET_ID_LEGSUP		0x00008000
#define HPET_ID_VENDOR		0xffff0000
#define	HPET_ID_NUMBER_SHIFT	8
#define HPET_ID_VENDOR_SHIFT	16

#define HPET_CFG_ENABLE		0x001
#define HPET_CFG_LEGACY		0x002
#define	HPET_LEGACY_8254	2
#define	HPET_LEGACY_RTC		8

#define HPET_TN_LEVEL		0x0002
#define HPET_TN_ENABLE		0x0004
#define HPET_TN_PERIODIC	0x0008
#define HPET_TN_PERIODIC_CAP	0x0010
#define HPET_TN_64BIT_CAP	0x0020
#define HPET_TN_SETVAL		0x0040
#define HPET_TN_32BIT		0x0100
#define HPET_TN_ROUTE		0x3e00
#define HPET_TN_FSB		0x4000
#define HPET_TN_FSB_CAP		0x8000
#define HPET_TN_ROUTE_SHIFT	9

/* Max HPET Period is 10^8 femto sec as in HPET spec */
#define HPET_MAX_PERIOD		100000000UL
/*
 * Min HPET period is 10^5 femto sec just for safety. If it is less than this,
 * then 32 bit HPET counter wrapsaround in less than 0.5 sec.
 */
#define HPET_MIN_PERIOD		100000UL

/* hpet memory map physical address */
extern unsigned long hpet_address;
extern unsigned long force_hpet_address;
extern bool boot_hpet_disable;
extern u8 hpet_blockid;
extern bool hpet_force_user;
extern bool hpet_msi_disable;
extern int is_hpet_enabled(void);
extern int hpet_enable(void);
extern void hpet_disable(void);
extern unsigned int hpet_readl(unsigned int a);
extern void force_hpet_resume(void);

struct irq_data;
struct hpet_dev;
struct irq_domain;

extern void hpet_msi_unmask(struct irq_data *data);
extern void hpet_msi_mask(struct irq_data *data);
extern void hpet_msi_write(struct hpet_dev *hdev, struct msi_msg *msg);
extern void hpet_msi_read(struct hpet_dev *hdev, struct msi_msg *msg);
extern struct irq_domain *hpet_create_irq_domain(int hpet_id);
extern int hpet_assign_irq(struct irq_domain *domain,
			   struct hpet_dev *dev, int dev_num);

#ifdef CONFIG_HPET_EMULATE_RTC

#include <linux/interrupt.h>

typedef irqreturn_t (*rtc_irq_handler)(int interrupt, void *cookie);
extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
			       unsigned char sec);
extern int hpet_set_periodic_freq(unsigned long freq);
extern int hpet_rtc_dropped_irq(void);
extern int hpet_rtc_timer_init(void);
extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
extern int hpet_register_irq_handler(rtc_irq_handler handler);
extern void hpet_unregister_irq_handler(rtc_irq_handler handler);

#endif /* CONFIG_HPET_EMULATE_RTC */

#else /* CONFIG_HPET_TIMER */

static inline int hpet_enable(void) { return 0; }
static inline int is_hpet_enabled(void) { return 0; }
#define hpet_readl(a) 0
#define default_setup_hpet_msi	NULL

#endif
#endif /* _ASM_X86_HPET_H */
Commit	Line	Data
1965aae3 PA	1	#ifndef _ASM_X86_HPET_H
1965aae3 PA	2	#define _ASM_X86_HPET_H
b8ce3359	3
58ac1e76	4	#include <linux/msi.h>
58ac1e76	5
b8ce3359 TG	6	#ifdef CONFIG_HPET_TIMER
b8ce3359 TG	7
b8ce3359 TG	8	#define HPET_MMAP_SIZE 1024
	9
	10	#define HPET_ID 0x000
	11	#define HPET_PERIOD 0x004
	12	#define HPET_CFG 0x010
	13	#define HPET_STATUS 0x020
	14	#define HPET_COUNTER 0x0f0
58ac1e76	15
	16	#define HPET_Tn_CFG(n) (0x100 + 0x20 * n)
	17	#define HPET_Tn_CMP(n) (0x108 + 0x20 * n)
	18	#define HPET_Tn_ROUTE(n) (0x110 + 0x20 * n)
	19
b8ce3359 TG	20	#define HPET_T0_CFG 0x100
	21	#define HPET_T0_CMP 0x108
	22	#define HPET_T0_ROUTE 0x110
	23	#define HPET_T1_CFG 0x120
	24	#define HPET_T1_CMP 0x128
	25	#define HPET_T1_ROUTE 0x130
	26	#define HPET_T2_CFG 0x140
	27	#define HPET_T2_CMP 0x148
	28	#define HPET_T2_ROUTE 0x150
	29
	30	#define HPET_ID_REV 0x000000ff
	31	#define HPET_ID_NUMBER 0x00001f00
	32	#define HPET_ID_64BIT 0x00002000
	33	#define HPET_ID_LEGSUP 0x00008000
	34	#define HPET_ID_VENDOR 0xffff0000
	35	#define HPET_ID_NUMBER_SHIFT 8
	36	#define HPET_ID_VENDOR_SHIFT 16
	37
b8ce3359 TG	38	#define HPET_CFG_ENABLE 0x001
	39	#define HPET_CFG_LEGACY 0x002
	40	#define HPET_LEGACY_8254 2
	41	#define HPET_LEGACY_RTC 8
	42
	43	#define HPET_TN_LEVEL 0x0002
	44	#define HPET_TN_ENABLE 0x0004
	45	#define HPET_TN_PERIODIC 0x0008
	46	#define HPET_TN_PERIODIC_CAP 0x0010
	47	#define HPET_TN_64BIT_CAP 0x0020
	48	#define HPET_TN_SETVAL 0x0040
	49	#define HPET_TN_32BIT 0x0100
	50	#define HPET_TN_ROUTE 0x3e00
	51	#define HPET_TN_FSB 0x4000
	52	#define HPET_TN_FSB_CAP 0x8000
	53	#define HPET_TN_ROUTE_SHIFT 9
	54
	55	/* Max HPET Period is 10^8 femto sec as in HPET spec */
	56	#define HPET_MAX_PERIOD 100000000UL
	57	/*
	58	* Min HPET period is 10^5 femto sec just for safety. If it is less than this,
	59	* then 32 bit HPET counter wrapsaround in less than 0.5 sec.
	60	*/
	61	#define HPET_MIN_PERIOD 100000UL
	62
	63	/* hpet memory map physical address */
	64	extern unsigned long hpet_address;
59c69f2a	65	extern unsigned long force_hpet_address;
3d45ac4b	66	extern bool boot_hpet_disable;
c8bc6f3c	67	extern u8 hpet_blockid;
3d45ac4b JB	68	extern bool hpet_force_user;
3d45ac4b JB	69	extern bool hpet_msi_disable;
b8ce3359 TG	70	extern int is_hpet_enabled(void);
b8ce3359 TG	71	extern int hpet_enable(void);
c86c7fbc	72	extern void hpet_disable(void);
5946fa3d	73	extern unsigned int hpet_readl(unsigned int a);
bfe0c1cc	74	extern void force_hpet_resume(void);
b8ce3359	75
d0fbca8f	76	struct irq_data;
3cb96f0c JL	77	struct hpet_dev;
	78	struct irq_domain;
	79
d0fbca8f TG	80	extern void hpet_msi_unmask(struct irq_data *data);
d0fbca8f TG	81	extern void hpet_msi_mask(struct irq_data *data);
d0fbca8f TG	82	extern void hpet_msi_write(struct hpet_dev hdev, struct msi_msg msg);
d0fbca8f TG	83	extern void hpet_msi_read(struct hpet_dev hdev, struct msi_msg msg);
3cb96f0c JL	84	extern struct irq_domain *hpet_create_irq_domain(int hpet_id);
	85	extern int hpet_assign_irq(struct irq_domain *domain,
	86	struct hpet_dev *dev, int dev_num);
58ac1e76	87
b8ce3359 TG	88	#ifdef CONFIG_HPET_EMULATE_RTC
	89
	90	#include <linux/interrupt.h>
	91
1bdbdaac	92	typedef irqreturn_t (rtc_irq_handler)(int interrupt, void cookie);
b8ce3359 TG	93	extern int hpet_mask_rtc_irq_bit(unsigned long bit_mask);
	94	extern int hpet_set_rtc_irq_bit(unsigned long bit_mask);
	95	extern int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
	96	unsigned char sec);
	97	extern int hpet_set_periodic_freq(unsigned long freq);
	98	extern int hpet_rtc_dropped_irq(void);
	99	extern int hpet_rtc_timer_init(void);
	100	extern irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id);
1bdbdaac BW	101	extern int hpet_register_irq_handler(rtc_irq_handler handler);
1bdbdaac BW	102	extern void hpet_unregister_irq_handler(rtc_irq_handler handler);
b8ce3359 TG	103
	104	#endif /* CONFIG_HPET_EMULATE_RTC */
	105
df619e6b	106	#else /* CONFIG_HPET_TIMER */
b8ce3359 TG	107
b8ce3359 TG	108	static inline int hpet_enable(void) { return 0; }
df619e6b	109	static inline int is_hpet_enabled(void) { return 0; }
bfc0f594	110	#define hpet_readl(a) 0
71054d88	111	#define default_setup_hpet_msi NULL
b8ce3359	112
df619e6b	113	#endif
1965aae3	114	#endif /* _ASM_X86_HPET_H */