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b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
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2#ifndef _ASM_X86_HW_IRQ_H
3#define _ASM_X86_HW_IRQ_H
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4
5/*
6 * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
7 *
8 * moved some of the old arch/i386/kernel/irq.h to here. VY
9 *
10 * IRQ/IPI changes taken from work by Thomas Radke
11 * <tomsoft@informatik.tu-chemnitz.de>
12 *
13 * hacked by Andi Kleen for x86-64.
14 * unified by tglx
15 */
16
9b7dc567 17#include <asm/irq_vectors.h>
2e088436 18
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19#define IRQ_MATRIX_BITS NR_VECTORS
20
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21#ifndef __ASSEMBLY__
22
23#include <linux/percpu.h>
24#include <linux/profile.h>
25#include <linux/smp.h>
26
60063497 27#include <linux/atomic.h>
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28#include <asm/irq.h>
29#include <asm/sections.h>
30
2e088436 31/* Interrupt handlers registered during init_IRQ */
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32extern asmlinkage void reschedule_interrupt(void);
33
26011eee 34#ifdef CONFIG_X86_LOCAL_APIC
74afab7a 35struct irq_data;
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36struct pci_dev;
37struct msi_desc;
38
39enum irq_alloc_type {
40 X86_IRQ_ALLOC_TYPE_IOAPIC = 1,
41 X86_IRQ_ALLOC_TYPE_HPET,
42 X86_IRQ_ALLOC_TYPE_MSI,
43 X86_IRQ_ALLOC_TYPE_MSIX,
0921f1da 44 X86_IRQ_ALLOC_TYPE_DMAR,
43fe1abc 45 X86_IRQ_ALLOC_TYPE_UV,
947045a2 46};
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47
48struct irq_alloc_info {
947045a2 49 enum irq_alloc_type type;
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50 u32 flags;
51 const struct cpumask *mask; /* CPU mask for vector allocation */
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52 union {
53 int unused;
54#ifdef CONFIG_HPET_TIMER
55 struct {
56 int hpet_id;
57 int hpet_index;
58 void *hpet_data;
59 };
60#endif
61#ifdef CONFIG_PCI_MSI
62 struct {
63 struct pci_dev *msi_dev;
64 irq_hw_number_t msi_hwirq;
65 };
66#endif
67#ifdef CONFIG_X86_IO_APIC
68 struct {
69 int ioapic_id;
70 int ioapic_pin;
71 int ioapic_node;
72 u32 ioapic_trigger : 1;
73 u32 ioapic_polarity : 1;
74 u32 ioapic_valid : 1;
75 struct IO_APIC_route_entry *ioapic_entry;
76 };
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77#endif
78#ifdef CONFIG_DMAR_TABLE
79 struct {
80 int dmar_id;
81 void *dmar_data;
82 };
49e07d8f 83#endif
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84#ifdef CONFIG_X86_UV
85 struct {
86 int uv_limit;
87 int uv_blade;
88 unsigned long uv_offset;
89 char *uv_name;
90 };
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91#endif
92#if IS_ENABLED(CONFIG_VMD)
93 struct {
94 struct msi_desc *desc;
95 };
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96#endif
97 };
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98};
99
9338ad6f 100struct irq_cfg {
5f0052f9 101 unsigned int dest_apicid;
ba224fea 102 unsigned int vector;
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103};
104
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105extern struct irq_cfg *irq_cfg(unsigned int irq);
106extern struct irq_cfg *irqd_cfg(struct irq_data *irq_data);
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107extern void lock_vector_lock(void);
108extern void unlock_vector_lock(void);
e32c67e0 109#ifdef CONFIG_SMP
9338ad6f 110extern void send_cleanup_vector(struct irq_cfg *);
f0e5bf75 111extern void irq_complete_move(struct irq_cfg *cfg);
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112#else
113static inline void send_cleanup_vector(struct irq_cfg *c) { }
f0e5bf75 114static inline void irq_complete_move(struct irq_cfg *c) { }
e32c67e0 115#endif
7ec13187 116
74afab7a 117extern void apic_ack_edge(struct irq_data *data);
74afab7a 118#else /* CONFIG_X86_LOCAL_APIC */
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119static inline void lock_vector_lock(void) {}
120static inline void unlock_vector_lock(void) {}
74afab7a 121#endif /* CONFIG_X86_LOCAL_APIC */
26011eee 122
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123/* Statistics */
124extern atomic_t irq_err_count;
125extern atomic_t irq_mis_count;
126
ea6cd250 127extern void elcr_set_level_irq(unsigned int irq);
1a331957 128
3304c9c3 129extern char irq_entries_start[];
25c74b10 130#ifdef CONFIG_TRACING
3304c9c3 131#define trace_irq_entries_start irq_entries_start
25c74b10 132#endif
497c9a19 133
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134extern char spurious_entries_start[];
135
a782a7e4 136#define VECTOR_UNUSED NULL
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137#define VECTOR_SHUTDOWN ((void *)-1L)
138#define VECTOR_RETRIGGERED ((void *)-2L)
9345005f 139
a782a7e4 140typedef struct irq_desc* vector_irq_t[NR_VECTORS];
22dc12d1 141DECLARE_PER_CPU(vector_irq_t, vector_irq);
2e088436 142
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143#endif /* !ASSEMBLY_ */
144
1965aae3 145#endif /* _ASM_X86_HW_IRQ_H */