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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
9a58a333 SD |
2 | #ifndef _ASM_X86_INTEL_SCU_IPC_H_ |
3 | #define _ASM_X86_INTEL_SCU_IPC_H_ | |
4 | ||
42c2544b AC |
5 | #include <linux/notifier.h> |
6 | ||
d27a7e29 AS |
7 | #define IPCMSG_INDIRECT_READ 0x02 |
8 | #define IPCMSG_INDIRECT_WRITE 0x05 | |
9 | ||
bda7b072 AS |
10 | #define IPCMSG_COLD_OFF 0x80 /* Only for Tangier */ |
11 | ||
48bc5562 JP |
12 | #define IPCMSG_WARM_RESET 0xF0 |
13 | #define IPCMSG_COLD_RESET 0xF1 | |
14 | #define IPCMSG_SOFT_RESET 0xF2 | |
15 | #define IPCMSG_COLD_BOOT 0xF3 | |
16 | ||
17 | #define IPCMSG_VRTC 0xFA /* Set vRTC device */ | |
18 | /* Command id associated with message IPCMSG_VRTC */ | |
19 | #define IPC_CMD_VRTC_SETTIME 1 /* Set time */ | |
20 | #define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */ | |
35f2915c | 21 | |
9a58a333 SD |
22 | /* Read single register */ |
23 | int intel_scu_ipc_ioread8(u16 addr, u8 *data); | |
24 | ||
25 | /* Read two sequential registers */ | |
26 | int intel_scu_ipc_ioread16(u16 addr, u16 *data); | |
27 | ||
28 | /* Read four sequential registers */ | |
29 | int intel_scu_ipc_ioread32(u16 addr, u32 *data); | |
30 | ||
31 | /* Read a vector */ | |
32 | int intel_scu_ipc_readv(u16 *addr, u8 *data, int len); | |
33 | ||
34 | /* Write single register */ | |
35 | int intel_scu_ipc_iowrite8(u16 addr, u8 data); | |
36 | ||
37 | /* Write two sequential registers */ | |
38 | int intel_scu_ipc_iowrite16(u16 addr, u16 data); | |
39 | ||
40 | /* Write four sequential registers */ | |
41 | int intel_scu_ipc_iowrite32(u16 addr, u32 data); | |
42 | ||
43 | /* Write a vector */ | |
44 | int intel_scu_ipc_writev(u16 *addr, u8 *data, int len); | |
45 | ||
46 | /* Update single register based on the mask */ | |
47 | int intel_scu_ipc_update_register(u16 addr, u8 data, u8 mask); | |
48 | ||
9a58a333 SD |
49 | /* Issue commands to the SCU with or without data */ |
50 | int intel_scu_ipc_simple_command(int cmd, int sub); | |
51 | int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen, | |
d27a7e29 AS |
52 | u32 *out, int outlen); |
53 | int intel_scu_ipc_raw_command(int cmd, int sub, u8 *in, int inlen, | |
54 | u32 *out, int outlen, u32 dptr, u32 sptr); | |
55 | ||
9a58a333 SD |
56 | /* I2C control api */ |
57 | int intel_scu_ipc_i2c_cntrl(u32 addr, u32 *data); | |
58 | ||
59 | /* Update FW version */ | |
60 | int intel_scu_ipc_fw_update(u8 *buffer, u32 length); | |
61 | ||
42c2544b AC |
62 | extern struct blocking_notifier_head intel_scu_notifier; |
63 | ||
64 | static inline void intel_scu_notifier_add(struct notifier_block *nb) | |
65 | { | |
66 | blocking_notifier_chain_register(&intel_scu_notifier, nb); | |
67 | } | |
68 | ||
69 | static inline void intel_scu_notifier_remove(struct notifier_block *nb) | |
70 | { | |
71 | blocking_notifier_chain_unregister(&intel_scu_notifier, nb); | |
72 | } | |
73 | ||
74 | static inline int intel_scu_notifier_post(unsigned long v, void *p) | |
75 | { | |
76 | return blocking_notifier_call_chain(&intel_scu_notifier, v, p); | |
77 | } | |
78 | ||
79 | #define SCU_AVAILABLE 1 | |
80 | #define SCU_DOWN 2 | |
81 | ||
9a58a333 | 82 | #endif |