[mirror_ubuntu-hirsute-kernel.git] / arch / x86 / include / asm / irq_vectors.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_IRQ_VECTORS_H
#define _ASM_X86_IRQ_VECTORS_H

#include <linux/threads.h>
/*
 * Linux IRQ vector layout.
 *
 * There are 256 IDT entries (per CPU - each entry is 8 bytes) which can
 * be defined by Linux. They are used as a jump table by the CPU when a
 * given vector is triggered - by a CPU-external, CPU-internal or
 * software-triggered event.
 *
 * Linux sets the kernel code address each entry jumps to early during
 * bootup, and never changes them. This is the general layout of the
 * IDT entries:
 *
 *  Vectors   0 ...  31 : system traps and exceptions - hardcoded events
 *  Vectors  32 ... 127 : device interrupts
 *  Vector  128         : legacy int80 syscall interface
 *  Vectors 129 ... LOCAL_TIMER_VECTOR-1
 *  Vectors LOCAL_TIMER_VECTOR ... 255 : special interrupts
 *
 * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
 *
 * This file enumerates the exact layout of them:
 */

#define NMI_VECTOR			0x02
#define MCE_VECTOR			0x12

/*
 * IDT vectors usable for external interrupt sources start at 0x20.
 * (0x80 is the syscall vector, 0x30-0x3f are for ISA)
 */
#define FIRST_EXTERNAL_VECTOR		0x20

/*
 * Reserve the lowest usable vector (and hence lowest priority)  0x20 for
 * triggering cleanup after irq migration. 0x21-0x2f will still be used
 * for device interrupts.
 */
#define IRQ_MOVE_CLEANUP_VECTOR		FIRST_EXTERNAL_VECTOR

#define IA32_SYSCALL_VECTOR		0x80

/*
 * Vectors 0x30-0x3f are used for ISA interrupts.
 *   round up to the next 16-vector boundary
 */
#define ISA_IRQ_VECTOR(irq)		(((FIRST_EXTERNAL_VECTOR + 16) & ~15) + irq)

/*
 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
 *
 *  some of the following vectors are 'rare', they are merged
 *  into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
 *  TLB, reschedule and local APIC vectors are performance-critical.
 */

#define SPURIOUS_APIC_VECTOR		0xff
/*
 * Sanity check
 */
#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
# error SPURIOUS_APIC_VECTOR definition error
#endif

#define ERROR_APIC_VECTOR		0xfe
#define RESCHEDULE_VECTOR		0xfd
#define CALL_FUNCTION_VECTOR		0xfc
#define CALL_FUNCTION_SINGLE_VECTOR	0xfb
#define THERMAL_APIC_VECTOR		0xfa
#define THRESHOLD_APIC_VECTOR		0xf9
#define REBOOT_VECTOR			0xf8

/*
 * Generic system vector for platform specific use
 */
#define X86_PLATFORM_IPI_VECTOR		0xf7

/*
 * IRQ work vector:
 */
#define IRQ_WORK_VECTOR			0xf6

#define UV_BAU_MESSAGE			0xf5
#define DEFERRED_ERROR_VECTOR		0xf4

/* Vector on which hypervisor callbacks will be delivered */
#define HYPERVISOR_CALLBACK_VECTOR	0xf3

/* Vector for KVM to deliver posted interrupt IPI */
#ifdef CONFIG_HAVE_KVM
#define POSTED_INTR_VECTOR		0xf2
#define POSTED_INTR_WAKEUP_VECTOR	0xf1
#define POSTED_INTR_NESTED_VECTOR	0xf0
#endif

#define MANAGED_IRQ_SHUTDOWN_VECTOR	0xef

#if IS_ENABLED(CONFIG_HYPERV)
#define HYPERV_REENLIGHTENMENT_VECTOR	0xee
#define HYPERV_STIMER0_VECTOR		0xed
#endif

#define LOCAL_TIMER_VECTOR		0xec

#define NR_VECTORS			 256

#ifdef CONFIG_X86_LOCAL_APIC
#define FIRST_SYSTEM_VECTOR		LOCAL_TIMER_VECTOR
#else
#define FIRST_SYSTEM_VECTOR		NR_VECTORS
#endif

/*
 * Size the maximum number of interrupts.
 *
 * If the irq_desc[] array has a sparse layout, we can size things
 * generously - it scales up linearly with the maximum number of CPUs,
 * and the maximum number of IO-APICs, whichever is higher.
 *
 * In other cases we size more conservatively, to not create too large
 * static arrays.
 */

#define NR_IRQS_LEGACY			16

#define CPU_VECTOR_LIMIT		(64 * NR_CPUS)
#define IO_APIC_VECTOR_LIMIT		(32 * MAX_IO_APICS)

#if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_PCI_MSI)
#define NR_IRQS						\
	(CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ?	\
		(NR_VECTORS + CPU_VECTOR_LIMIT)  :	\
		(NR_VECTORS + IO_APIC_VECTOR_LIMIT))
#elif defined(CONFIG_X86_IO_APIC)
#define	NR_IRQS				(NR_VECTORS + IO_APIC_VECTOR_LIMIT)
#elif defined(CONFIG_PCI_MSI)
#define NR_IRQS				(NR_VECTORS + CPU_VECTOR_LIMIT)
#else
#define NR_IRQS				NR_IRQS_LEGACY
#endif

#endif /* _ASM_X86_IRQ_VECTORS_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1965aae3 PA	2	#ifndef _ASM_X86_IRQ_VECTORS_H
1965aae3 PA	3	#define _ASM_X86_IRQ_VECTORS_H
9b7dc567	4
60f6e65d	5	#include <linux/threads.h>
9fc2e79d IM	6	/*
	7	* Linux IRQ vector layout.
	8	*
	9	* There are 256 IDT entries (per CPU - each entry is 8 bytes) which can
	10	* be defined by Linux. They are used as a jump table by the CPU when a
	11	* given vector is triggered - by a CPU-external, CPU-internal or
	12	* software-triggered event.
	13	*
	14	* Linux sets the kernel code address each entry jumps to early during
	15	* bootup, and never changes them. This is the general layout of the
	16	* IDT entries:
	17	*
	18	* Vectors 0 ... 31 : system traps and exceptions - hardcoded events
	19	* Vectors 32 ... 127 : device interrupts
	20	* Vector 128 : legacy int80 syscall interface
2c464543 JB	21	* Vectors 129 ... LOCAL_TIMER_VECTOR-1
2c464543 JB	22	* Vectors LOCAL_TIMER_VECTOR ... 255 : special interrupts
9fc2e79d IM	23	*
	24	* 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
	25	*
	26	* This file enumerates the exact layout of them:
	27	*/
	28
	29	#define NMI_VECTOR 0x02
8fa8dd9e	30	#define MCE_VECTOR 0x12
9b7dc567 TG	31
9b7dc567 TG	32	/*
6579b474 SS	33	* IDT vectors usable for external interrupt sources start at 0x20.
6579b474 SS	34	* (0x80 is the syscall vector, 0x30-0x3f are for ISA)
9b7dc567	35	*/
6579b474	36	#define FIRST_EXTERNAL_VECTOR 0x20
6579b474 SS	37
	38	/*
	39	* Reserve the lowest usable vector (and hence lowest priority) 0x20 for
	40	* triggering cleanup after irq migration. 0x21-0x2f will still be used
	41	* for device interrupts.
	42	*/
	43	#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
9b7dc567	44
99d113b1	45	#define IA32_SYSCALL_VECTOR 0x80
9b7dc567 TG	46
9b7dc567 TG	47	/*
6579b474	48	* Vectors 0x30-0x3f are used for ISA interrupts.
99d113b1	49	* round up to the next 16-vector boundary
9b7dc567	50	*/
8b455e65	51	#define ISA_IRQ_VECTOR(irq) (((FIRST_EXTERNAL_VECTOR + 16) & ~15) + irq)
9b7dc567 TG	52
	53	/*
	54	* Special IRQ vectors used by the SMP architecture, 0xf0-0xff
	55	*
	56	* some of the following vectors are 'rare', they are merged
	57	* into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
	58	* TLB, reschedule and local APIC vectors are performance-critical.
9b7dc567	59	*/
02cf94c3	60
5da690d2	61	#define SPURIOUS_APIC_VECTOR 0xff
647ad94f IM	62	/*
	63	* Sanity check
	64	*/
	65	#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
	66	# error SPURIOUS_APIC_VECTOR definition error
	67	#endif
	68
5da690d2 IM	69	#define ERROR_APIC_VECTOR 0xfe
	70	#define RESCHEDULE_VECTOR 0xfd
	71	#define CALL_FUNCTION_VECTOR 0xfc
	72	#define CALL_FUNCTION_SINGLE_VECTOR 0xfb
	73	#define THERMAL_APIC_VECTOR 0xfa
7856f6cc	74	#define THRESHOLD_APIC_VECTOR 0xf9
4ef702c1	75	#define REBOOT_VECTOR 0xf8
9b7dc567	76
193c81b9	77	/*
acaabe79	78	* Generic system vector for platform specific use
193c81b9	79	*/
60f6e65d	80	#define X86_PLATFORM_IPI_VECTOR 0xf7
193c81b9	81
acaabe79	82	/*
e360adbe	83	* IRQ work vector:
acaabe79	84	*/
60f6e65d	85	#define IRQ_WORK_VECTOR 0xf6
acaabe79	86
60f6e65d	87	#define UV_BAU_MESSAGE 0xf5
24fd78a8	88	#define DEFERRED_ERROR_VECTOR 0xf4
4ef702c1	89
bc2b0331 S	90	/* Vector on which hypervisor callbacks will be delivered */
bc2b0331 S	91	#define HYPERVISOR_CALLBACK_VECTOR 0xf3
60f6e65d	92
5c0d728e AG	93	/* Vector for KVM to deliver posted interrupt IPI */
	94	#ifdef CONFIG_HAVE_KVM
	95	#define POSTED_INTR_VECTOR 0xf2
210f84b0 WV	96	#define POSTED_INTR_WAKEUP_VECTOR 0xf1
210f84b0 WV	97	#define POSTED_INTR_NESTED_VECTOR 0xf0
5c0d728e AG	98	#endif
5c0d728e AG	99
2db1f959	100	#define MANAGED_IRQ_SHUTDOWN_VECTOR 0xef
93286261 VK	101
	102	#if IS_ENABLED(CONFIG_HYPERV)
	103	#define HYPERV_REENLIGHTENMENT_VECTOR 0xee
248e742a	104	#define HYPERV_STIMER0_VECTOR 0xed
93286261 VK	105	#endif
93286261 VK	106
248e742a	107	#define LOCAL_TIMER_VECTOR 0xec
60f6e65d	108
9fc2e79d	109	#define NR_VECTORS 256
9b7dc567	110
2414e021 JB	111	#ifdef CONFIG_X86_LOCAL_APIC
	112	#define FIRST_SYSTEM_VECTOR LOCAL_TIMER_VECTOR
	113	#else
	114	#define FIRST_SYSTEM_VECTOR NR_VECTORS
	115	#endif
	116
009eb3fe IM	117	/*
	118	* Size the maximum number of interrupts.
	119	*
	120	* If the irq_desc[] array has a sparse layout, we can size things
	121	* generously - it scales up linearly with the maximum number of CPUs,
	122	* and the maximum number of IO-APICs, whichever is higher.
	123	*
	124	* In other cases we size more conservatively, to not create too large
	125	* static arrays.
	126	*/
	127
4399b14f	128	#define NR_IRQS_LEGACY 16
99d093d1	129
4399b14f JL	130	#define CPU_VECTOR_LIMIT (64 * NR_CPUS)
4399b14f JL	131	#define IO_APIC_VECTOR_LIMIT (32 * MAX_IO_APICS)
009eb3fe	132
4399b14f JL	133	#if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_PCI_MSI)
4399b14f JL	134	#define NR_IRQS \
009eb3fe IM	135	(CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ? \
	136	(NR_VECTORS + CPU_VECTOR_LIMIT) : \
	137	(NR_VECTORS + IO_APIC_VECTOR_LIMIT))
4399b14f JL	138	#elif defined(CONFIG_X86_IO_APIC)
	139	#define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT)
	140	#elif defined(CONFIG_PCI_MSI)
	141	#define NR_IRQS (NR_VECTORS + CPU_VECTOR_LIMIT)
	142	#else
	143	#define NR_IRQS NR_IRQS_LEGACY
1b489768	144	#endif
9b7dc567	145
1965aae3	146	#endif /* _ASM_X86_IRQ_VECTORS_H */