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KVM: consolidate ioapic/ipi interrupt delivery logic
[mirror_ubuntu-bionic-kernel.git] / arch / x86 / include / asm / kvm_host.h
CommitLineData
a656c8ef 1/*
043405e1
CO		 2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
1965aae3
PA		 11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
043405e1 13
34c16eec
ZX		 14#include <linux/types.h>
15#include <linux/mm.h>
e930bffe 16#include <linux/mmu_notifier.h>
34c16eec
ZX		 17
18#include <linux/kvm.h>
19#include <linux/kvm_para.h>
edf88417 20#include <linux/kvm_types.h>
34c16eec 21
50d0a0f9 22#include <asm/pvclock-abi.h>
e01a1b57 23#include <asm/desc.h>
0bed3b56 24#include <asm/mtrr.h>
9962d032 25#include <asm/msr-index.h>
e01a1b57 26
69a9f69b
AK		 27#define KVM_MAX_VCPUS 16
28#define KVM_MEMORY_SLOTS 32
29/* memory slots that does not exposed to userspace */
30#define KVM_PRIVATE_MEM_SLOTS 4
31
32#define KVM_PIO_PAGE_OFFSET 1
542472b5 33#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
69a9f69b 34
cd6e8f87
ZX		 35#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
36#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
7d76b4d3
JP		 37#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
38 0xFFFFFF0000000000ULL)
cd6e8f87 39
7d76b4d3 40#define KVM_GUEST_CR0_MASK \
cd6e8f87
ZX		 41 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
42 | X86_CR0_NW | X86_CR0_CD)
7d76b4d3 43#define KVM_VM_CR0_ALWAYS_ON \
cd6e8f87
ZX		 44 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
45 | X86_CR0_MP)
7d76b4d3 46#define KVM_GUEST_CR4_MASK \
cd6e8f87
ZX		 47 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
48#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
49#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
50
51#define INVALID_PAGE (~(hpa_t)0)
52#define UNMAPPED_GVA (~(gpa_t)0)
53
05da4558
MT		 54/* shadow tables are PAE even on non-PAE hosts */
55#define KVM_HPAGE_SHIFT 21
56#define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT)
57#define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1))
58
59#define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE)
60
cd6e8f87 61#define DE_VECTOR 0
19bd8afd 62#define DB_VECTOR 1
77ab6db0
JK		 63#define BP_VECTOR 3
64#define OF_VECTOR 4
65#define BR_VECTOR 5
cd6e8f87
ZX		 66#define UD_VECTOR 6
67#define NM_VECTOR 7
68#define DF_VECTOR 8
69#define TS_VECTOR 10
70#define NP_VECTOR 11
71#define SS_VECTOR 12
72#define GP_VECTOR 13
73#define PF_VECTOR 14
77ab6db0 74#define MF_VECTOR 16
53371b50 75#define MC_VECTOR 18
cd6e8f87
ZX		 76
77#define SELECTOR_TI_MASK (1 << 2)
78#define SELECTOR_RPL_MASK 0x03
79
80#define IOPL_SHIFT 12
81
d69fb81f
ZX		 82#define KVM_ALIAS_SLOTS 4
83
d657a98e
ZX		 84#define KVM_PERMILLE_MMU_PAGES 20
85#define KVM_MIN_ALLOC_MMU_PAGES 64
1ae0a13d
DE		 86#define KVM_MMU_HASH_SHIFT 10
87#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
d657a98e
ZX		 88#define KVM_MIN_FREE_MMU_PAGES 5
89#define KVM_REFILL_PAGES 25
90#define KVM_MAX_CPUID_ENTRIES 40
0bed3b56 91#define KVM_NR_FIXED_MTRR_REGION 88
9ba075a6 92#define KVM_NR_VAR_MTRR 8
d657a98e 93
e9b11c17
ZX		 94extern spinlock_t kvm_lock;
95extern struct list_head vm_list;
96
d657a98e
ZX		 97struct kvm_vcpu;
98struct kvm;
99
5fdbf976 100enum kvm_reg {
2b3ccfa0
ZX		 101 VCPU_REGS_RAX = 0,
102 VCPU_REGS_RCX = 1,
103 VCPU_REGS_RDX = 2,
104 VCPU_REGS_RBX = 3,
105 VCPU_REGS_RSP = 4,
106 VCPU_REGS_RBP = 5,
107 VCPU_REGS_RSI = 6,
108 VCPU_REGS_RDI = 7,
109#ifdef CONFIG_X86_64
110 VCPU_REGS_R8 = 8,
111 VCPU_REGS_R9 = 9,
112 VCPU_REGS_R10 = 10,
113 VCPU_REGS_R11 = 11,
114 VCPU_REGS_R12 = 12,
115 VCPU_REGS_R13 = 13,
116 VCPU_REGS_R14 = 14,
117 VCPU_REGS_R15 = 15,
118#endif
5fdbf976 119 VCPU_REGS_RIP,
2b3ccfa0
ZX		 120 NR_VCPU_REGS
121};
122
123enum {
81609e3e 124 VCPU_SREG_ES,
2b3ccfa0 125 VCPU_SREG_CS,
81609e3e 126 VCPU_SREG_SS,
2b3ccfa0 127 VCPU_SREG_DS,
2b3ccfa0
ZX		 128 VCPU_SREG_FS,
129 VCPU_SREG_GS,
2b3ccfa0
ZX		 130 VCPU_SREG_TR,
131 VCPU_SREG_LDTR,
132};
133
edf88417 134#include <asm/kvm_x86_emulate.h>
2b3ccfa0 135
d657a98e
ZX		 136#define KVM_NR_MEM_OBJS 40
137
42dbaa5a
JK		 138#define KVM_NR_DB_REGS 4
139
140#define DR6_BD (1 << 13)
141#define DR6_BS (1 << 14)
142#define DR6_FIXED_1 0xffff0ff0
143#define DR6_VOLATILE 0x0000e00f
144
145#define DR7_BP_EN_MASK 0x000000ff
146#define DR7_GE (1 << 9)
147#define DR7_GD (1 << 13)
148#define DR7_FIXED_1 0x00000400
149#define DR7_VOLATILE 0xffff23ff
150
d657a98e
ZX		 151/*
152 * We don't want allocation failures within the mmu code, so we preallocate
153 * enough memory for a single page fault in a cache.
154 */
155struct kvm_mmu_memory_cache {
156 int nobjs;
157 void *objects[KVM_NR_MEM_OBJS];
158};
159
160#define NR_PTE_CHAIN_ENTRIES 5
161
162struct kvm_pte_chain {
163 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
164 struct hlist_node link;
165};
166
167/*
168 * kvm_mmu_page_role, below, is defined as:
169 *
170 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
171 * bits 4:7 - page table level for this shadow (1-4)
172 * bits 8:9 - page table quadrant for 2-level guests
f6e2c02b
AK		 173 * bit 16 - direct mapping of virtual to physical mapping at gfn
174 * used for real mode and two-dimensional paging
d657a98e
ZX		 175 * bits 17:19 - common access permissions for all ptes in this shadow page
176 */
177union kvm_mmu_page_role {
178 unsigned word;
179 struct {
7d76b4d3
JP		 180 unsigned glevels:4;
181 unsigned level:4;
182 unsigned quadrant:2;
183 unsigned pad_for_nice_hex_output:6;
f6e2c02b 184 unsigned direct:1;
7d76b4d3 185 unsigned access:3;
2e53d63a 186 unsigned invalid:1;
2f0b3d60 187 unsigned cr4_pge:1;
d657a98e
ZX		 188 };
189};
190
191struct kvm_mmu_page {
192 struct list_head link;
193 struct hlist_node hash_link;
194
6cffe8ca
MT		 195 struct list_head oos_link;
196
d657a98e
ZX		 197 /*
198 * The following two entries are used to key the shadow page in the
199 * hash table.
200 */
201 gfn_t gfn;
202 union kvm_mmu_page_role role;
203
204 u64 *spt;
205 /* hold the gfn of each spte inside spt */
206 gfn_t *gfns;
291f26bc
SY		 207 /*
208 * One bit set per slot which has memory
209 * in this shadow page.
210 */
211 DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
d657a98e
ZX		 212 int multimapped; /* More than one parent_pte? */
213 int root_count; /* Currently serving as active root */
4731d4c7 214 bool unsync;
6cffe8ca 215 bool global;
60c8aec6 216 unsigned int unsync_children;
d657a98e
ZX		 217 union {
218 u64 *parent_pte; /* !multimapped */
219 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
220 };
0074ff63 221 DECLARE_BITMAP(unsync_child_bitmap, 512);
d657a98e
ZX		 222};
223
6ad18fba
DH		 224struct kvm_pv_mmu_op_buffer {
225 void *ptr;
226 unsigned len;
227 unsigned processed;
228 char buf[512] __aligned(sizeof(long));
229};
230
1c08364c
AK		 231struct kvm_pio_request {
232 unsigned long count;
233 int cur_count;
234 gva_t guest_gva;
235 int in;
236 int port;
237 int size;
238 int string;
239 int down;
240 int rep;
241};
242
d657a98e
ZX		 243/*
244 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
245 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
246 * mode.
247 */
248struct kvm_mmu {
249 void (*new_cr3)(struct kvm_vcpu *vcpu);
250 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
251 void (*free)(struct kvm_vcpu *vcpu);
252 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
253 void (*prefetch_page)(struct kvm_vcpu *vcpu,
254 struct kvm_mmu_page *page);
e8bc217a
MT		 255 int (*sync_page)(struct kvm_vcpu *vcpu,
256 struct kvm_mmu_page *sp);
a7052897 257 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
d657a98e
ZX		 258 hpa_t root_hpa;
259 int root_level;
260 int shadow_root_level;
a770f6f2 261 union kvm_mmu_page_role base_role;
d657a98e
ZX		 262
263 u64 *pae_root;
264};
265
ad312c7c 266struct kvm_vcpu_arch {
34c16eec
ZX		 267 u64 host_tsc;
268 int interrupt_window_open;
269 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
270 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
5fdbf976
MT		 271 /*
272 * rip and regs accesses must go through
273 * kvm_{register,rip}_{read,write} functions.
274 */
275 unsigned long regs[NR_VCPU_REGS];
276 u32 regs_avail;
277 u32 regs_dirty;
34c16eec
ZX		 278
279 unsigned long cr0;
280 unsigned long cr2;
281 unsigned long cr3;
282 unsigned long cr4;
283 unsigned long cr8;
1371d904 284 u32 hflags;
34c16eec
ZX		 285 u64 pdptrs[4]; /* pae */
286 u64 shadow_efer;
287 u64 apic_base;
288 struct kvm_lapic *apic; /* kernel irqchip context */
34c16eec
ZX		 289 int mp_state;
290 int sipi_vector;
291 u64 ia32_misc_enable_msr;
b209749f 292 bool tpr_access_reporting;
34c16eec
ZX		 293
294 struct kvm_mmu mmu;
6ad18fba
DH		 295 /* only needed in kvm_pv_mmu_op() path, but it's hot so
296 * put it here to avoid allocation */
297 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
34c16eec
ZX		 298
299 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
300 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
301 struct kvm_mmu_memory_cache mmu_page_cache;
302 struct kvm_mmu_memory_cache mmu_page_header_cache;
303
304 gfn_t last_pt_write_gfn;
305 int last_pt_write_count;
306 u64 *last_pte_updated;
1b7fcd32 307 gfn_t last_pte_gfn;
34c16eec 308
d7824fff 309 struct {
35149e21
AL		 310 gfn_t gfn; /* presumed gfn during guest pte update */
311 pfn_t pfn; /* pfn corresponding to that gfn */
05da4558 312 int largepage;
e930bffe 313 unsigned long mmu_seq;
d7824fff
AK		 314 } update_pte;
315
34c16eec
ZX		 316 struct i387_fxsave_struct host_fx_image;
317 struct i387_fxsave_struct guest_fx_image;
318
319 gva_t mmio_fault_cr2;
320 struct kvm_pio_request pio;
321 void *pio_data;
322
298101da
AK		 323 struct kvm_queued_exception {
324 bool pending;
325 bool has_error_code;
326 u8 nr;
327 u32 error_code;
328 } exception;
329
937a7eae
AK		 330 struct kvm_queued_interrupt {
331 bool pending;
332 u8 nr;
333 } interrupt;
334
34c16eec
ZX		 335 struct {
336 int active;
337 u8 save_iopl;
338 struct kvm_save_segment {
339 u16 selector;
340 unsigned long base;
341 u32 limit;
342 u32 ar;
343 } tr, es, ds, fs, gs;
344 } rmode;
345 int halt_request; /* real mode on Intel only */
346
347 int cpuid_nent;
07716717 348 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
34c16eec
ZX		 349 /* emulate context */
350
351 struct x86_emulate_ctxt emulate_ctxt;
18068523
GOC		 352
353 gpa_t time;
50d0a0f9
GH		 354 struct pvclock_vcpu_time_info hv_clock;
355 unsigned int hv_clock_tsc_khz;
18068523
GOC		 356 unsigned int time_offset;
357 struct page *time_page;
3419ffc8
SY		 358
359 bool nmi_pending;
668f612f 360 bool nmi_injected;
33f089ca 361 bool nmi_window_open;
9ba075a6 362
0bed3b56
SY		 363 struct mtrr_state_type mtrr_state;
364 u32 pat;
42dbaa5a
JK		 365
366 int switch_db_regs;
367 unsigned long host_db[KVM_NR_DB_REGS];
368 unsigned long host_dr6;
369 unsigned long host_dr7;
370 unsigned long db[KVM_NR_DB_REGS];
371 unsigned long dr6;
372 unsigned long dr7;
373 unsigned long eff_db[KVM_NR_DB_REGS];
34c16eec
ZX		 374};
375
d69fb81f
ZX		 376struct kvm_mem_alias {
377 gfn_t base_gfn;
378 unsigned long npages;
379 gfn_t target_gfn;
380};
381
382struct kvm_arch{
383 int naliases;
384 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
f05e70ac
ZX		 385
386 unsigned int n_free_mmu_pages;
387 unsigned int n_requested_mmu_pages;
388 unsigned int n_alloc_mmu_pages;
389 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
390 /*
391 * Hash table of struct kvm_mmu_page.
392 */
393 struct list_head active_mmu_pages;
4d5c5d0f 394 struct list_head assigned_dev_head;
6cffe8ca 395 struct list_head oos_global_pages;
19de40a8 396 struct iommu_domain *iommu_domain;
d7deeeb0
ZX		 397 struct kvm_pic *vpic;
398 struct kvm_ioapic *vioapic;
7837699f 399 struct kvm_pit *vpit;
564f1537 400 struct hlist_head irq_ack_notifier_list;
cc6e462c 401 int vapics_in_nmi_mode;
bfc6d222
ZX		 402
403 int round_robin_prev_vcpu;
404 unsigned int tss_addr;
405 struct page *apic_access_page;
18068523
GOC		 406
407 gpa_t wall_clock;
b7ebfb05
SY		 408
409 struct page *ept_identity_pagetable;
410 bool ept_identity_pagetable_done;
5550af4d
SY		 411
412 unsigned long irq_sources_bitmap;
413 unsigned long irq_states[KVM_IOAPIC_NUM_PINS];
53f658b3 414 u64 vm_init_tsc;
d69fb81f
ZX		 415};
416
0711456c
ZX		 417struct kvm_vm_stat {
418 u32 mmu_shadow_zapped;
419 u32 mmu_pte_write;
420 u32 mmu_pte_updated;
421 u32 mmu_pde_zapped;
422 u32 mmu_flooded;
423 u32 mmu_recycled;
dfc5aa00 424 u32 mmu_cache_miss;
4731d4c7 425 u32 mmu_unsync;
6cffe8ca 426 u32 mmu_unsync_global;
0711456c 427 u32 remote_tlb_flush;
05da4558 428 u32 lpages;
0711456c
ZX		 429};
430
77b4c255
ZX		 431struct kvm_vcpu_stat {
432 u32 pf_fixed;
433 u32 pf_guest;
434 u32 tlb_flush;
435 u32 invlpg;
436
437 u32 exits;
438 u32 io_exits;
439 u32 mmio_exits;
440 u32 signal_exits;
441 u32 irq_window_exits;
f08864b4 442 u32 nmi_window_exits;
77b4c255
ZX		 443 u32 halt_exits;
444 u32 halt_wakeup;
445 u32 request_irq_exits;
c4abb7c9 446 u32 request_nmi_exits;
77b4c255
ZX		 447 u32 irq_exits;
448 u32 host_state_reload;
449 u32 efer_reload;
450 u32 fpu_reload;
451 u32 insn_emulation;
452 u32 insn_emulation_fail;
f11c3a8d 453 u32 hypercalls;
fa89a817 454 u32 irq_injections;
c4abb7c9 455 u32 nmi_injections;
77b4c255 456};
ad312c7c 457
e01a1b57
HB		 458struct descriptor_table {
459 u16 limit;
460 unsigned long base;
461} __attribute__((packed));
462
ea4a5ff8
ZX		 463struct kvm_x86_ops {
464 int (*cpu_has_kvm_support)(void); /* __init */
465 int (*disabled_by_bios)(void); /* __init */
466 void (*hardware_enable)(void *dummy); /* __init */
467 void (*hardware_disable)(void *dummy);
468 void (*check_processor_compatibility)(void *rtn);
469 int (*hardware_setup)(void); /* __init */
470 void (*hardware_unsetup)(void); /* __exit */
774ead3a 471 bool (*cpu_has_accelerated_tpr)(void);
ea4a5ff8
ZX		 472
473 /* Create, but do not attach this VCPU */
474 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
475 void (*vcpu_free)(struct kvm_vcpu *vcpu);
476 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
477
478 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
479 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
480 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 481
482 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
d0bfb940 483 struct kvm_guest_debug *dbg);
ea4a5ff8
ZX		 484 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
485 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
486 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
487 void (*get_segment)(struct kvm_vcpu *vcpu,
488 struct kvm_segment *var, int seg);
2e4d2653 489 int (*get_cpl)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 490 void (*set_segment)(struct kvm_vcpu *vcpu,
491 struct kvm_segment *var, int seg);
492 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
493 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
494 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
495 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
496 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
497 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
498 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
499 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
500 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
501 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
502 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
503 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
504 int *exception);
5fdbf976 505 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
ea4a5ff8
ZX		 506 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
507 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
508
509 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 510
ea4a5ff8
ZX		 511 void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
512 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
513 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
514 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
515 unsigned char *hypercall_addr);
516 int (*get_irq)(struct kvm_vcpu *vcpu);
517 void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
298101da
AK		 518 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
519 bool has_error_code, u32 error_code);
520 bool (*exception_injected)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 521 void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
522 void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
523 struct kvm_run *run);
524
525 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 526 int (*get_tdp_level)(void);
64d4d521 527 int (*get_mt_mask_shift)(void);
ea4a5ff8
ZX		 528};
529
97896d04
ZX		 530extern struct kvm_x86_ops *kvm_x86_ops;
531
54f1585a
ZX		 532int kvm_mmu_module_init(void);
533void kvm_mmu_module_exit(void);
534
535void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
536int kvm_mmu_create(struct kvm_vcpu *vcpu);
537int kvm_mmu_setup(struct kvm_vcpu *vcpu);
538void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e
SY		 539void kvm_mmu_set_base_ptes(u64 base_pte);
540void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 541 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask);
54f1585a
ZX		 542
543int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
544void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
545void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 546unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a
ZX		 547void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
548
cc4b6871
JR		 549int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
550
3200f405 551int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 552 const void *val, int bytes);
2f333bcb
MT		 553int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
554 gpa_t addr, unsigned long *ret);
555
556extern bool tdp_enabled;
9f811285 557
54f1585a
ZX		 558enum emulation_result {
559 EMULATE_DONE, /* no further processing */
560 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
561 EMULATE_FAIL, /* can't emulate this instruction */
562};
563
571008da
SY		 564#define EMULTYPE_NO_DECODE (1 << 0)
565#define EMULTYPE_TRAP_UD (1 << 1)
54f1585a 566int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
571008da 567 unsigned long cr2, u16 error_code, int emulation_type);
54f1585a
ZX		 568void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
569void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
570void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
571void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
572 unsigned long *rflags);
573
574unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
575void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
576 unsigned long *rflags);
f2b4b7dd 577void kvm_enable_efer_bits(u64);
54f1585a
ZX		 578int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
579int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
580
581struct x86_emulate_ctxt;
582
583int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
584 int size, unsigned port);
585int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
586 int size, unsigned long count, int down,
587 gva_t address, int rep, unsigned port);
588void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
589int kvm_emulate_halt(struct kvm_vcpu *vcpu);
590int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
591int emulate_clts(struct kvm_vcpu *vcpu);
592int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
593 unsigned long *dest);
594int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
595 unsigned long value);
596
3e6e0aab
GT		 597void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
598int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
599 int type_bits, int seg);
600
37817f29
IE		 601int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
602
2d3ad1f4 603void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
9c20456a
JR		 604void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
605void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
606void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2d3ad1f4
AK		 607unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
608void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a
ZX		 609void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
610
611int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
612int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
613
298101da
AK		 614void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
615void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee
AK		 616void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
617 u32 error_code);
298101da 618
4925663a 619int kvm_pic_set_irq(void *opaque, int irq, int level);
3de42dc0 620
3419ffc8
SY		 621void kvm_inject_nmi(struct kvm_vcpu *vcpu);
622
54f1585a
ZX		 623void fx_init(struct kvm_vcpu *vcpu);
624
54f1585a
ZX		 625int emulator_write_emulated(unsigned long addr,
626 const void *val,
627 unsigned int bytes,
628 struct kvm_vcpu *vcpu);
629
630unsigned long segment_base(u16 selector);
631
d835dfec 632void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a 633void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT		 634 const u8 *new, int bytes,
635 bool guest_initiated);
54f1585a
ZX		 636int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
637void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
638int kvm_mmu_load(struct kvm_vcpu *vcpu);
639void kvm_mmu_unload(struct kvm_vcpu *vcpu);
0ba73cda 640void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
6cffe8ca 641void kvm_mmu_sync_global(struct kvm_vcpu *vcpu);
54f1585a
ZX		 642
643int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
644
645int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
646
3067714c 647int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
a7052897 648void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
34c16eec 649
18552672 650void kvm_enable_tdp(void);
5f4cb662 651void kvm_disable_tdp(void);
18552672 652
a03490ed 653int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a 654int complete_pio(struct kvm_vcpu *vcpu);
ec6d273d 655
2843099f
IE		 656struct kvm_memory_slot *gfn_to_memslot_unaliased(struct kvm *kvm, gfn_t gfn);
657
ec6d273d
ZX		 658static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
659{
660 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
661
662 return (struct kvm_mmu_page *)page_private(page);
663}
664
d6e88aec 665static inline u16 kvm_read_fs(void)
ec6d273d
ZX		 666{
667 u16 seg;
668 asm("mov %%fs, %0" : "=g"(seg));
669 return seg;
670}
671
d6e88aec 672static inline u16 kvm_read_gs(void)
ec6d273d
ZX		 673{
674 u16 seg;
675 asm("mov %%gs, %0" : "=g"(seg));
676 return seg;
677}
678
d6e88aec 679static inline u16 kvm_read_ldt(void)
ec6d273d
ZX		 680{
681 u16 ldt;
682 asm("sldt %0" : "=g"(ldt));
683 return ldt;
684}
685
d6e88aec 686static inline void kvm_load_fs(u16 sel)
ec6d273d
ZX		 687{
688 asm("mov %0, %%fs" : : "rm"(sel));
689}
690
d6e88aec 691static inline void kvm_load_gs(u16 sel)
ec6d273d
ZX		 692{
693 asm("mov %0, %%gs" : : "rm"(sel));
694}
695
d6e88aec 696static inline void kvm_load_ldt(u16 sel)
ec6d273d
ZX		 697{
698 asm("lldt %0" : : "rm"(sel));
699}
ec6d273d 700
d6e88aec 701static inline void kvm_get_idt(struct descriptor_table *table)
ec6d273d
ZX		 702{
703 asm("sidt %0" : "=m"(*table));
704}
705
d6e88aec 706static inline void kvm_get_gdt(struct descriptor_table *table)
ec6d273d
ZX		 707{
708 asm("sgdt %0" : "=m"(*table));
709}
710
d6e88aec 711static inline unsigned long kvm_read_tr_base(void)
ec6d273d
ZX		 712{
713 u16 tr;
714 asm("str %0" : "=g"(tr));
715 return segment_base(tr);
716}
717
718#ifdef CONFIG_X86_64
719static inline unsigned long read_msr(unsigned long msr)
720{
721 u64 value;
722
723 rdmsrl(msr, value);
724 return value;
725}
726#endif
727
d6e88aec 728static inline void kvm_fx_save(struct i387_fxsave_struct *image)
ec6d273d
ZX		 729{
730 asm("fxsave (%0)":: "r" (image));
731}
732
d6e88aec 733static inline void kvm_fx_restore(struct i387_fxsave_struct *image)
ec6d273d
ZX		 734{
735 asm("fxrstor (%0)":: "r" (image));
736}
737
d6e88aec 738static inline void kvm_fx_finit(void)
ec6d273d
ZX		 739{
740 asm("finit");
741}
742
743static inline u32 get_rdx_init_val(void)
744{
745 return 0x600; /* P6 family */
746}
747
c1a5d4f9
AK		 748static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
749{
750 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
751}
752
ec6d273d
ZX		 753#define MSR_IA32_TIME_STAMP_COUNTER 0x010
754
755#define TSS_IOPB_BASE_OFFSET 0x66
756#define TSS_BASE_SIZE 0x68
757#define TSS_IOPB_SIZE (65536 / 8)
758#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP		 759#define RMODE_TSS_SIZE \
760 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 761
37817f29
IE		 762enum {
763 TASK_SWITCH_CALL = 0,
764 TASK_SWITCH_IRET = 1,
765 TASK_SWITCH_JMP = 2,
766 TASK_SWITCH_GATE = 3,
767};
768
1371d904 769#define HF_GIF_MASK (1 << 0)
3d6368ef
AG		 770#define HF_HIF_MASK (1 << 1)
771#define HF_VINTR_MASK (1 << 2)
1371d904 772
4ecac3fd
AK		 773/*
774 * Hardware virtualization extension instructions may fault if a
775 * reboot turns off virtualization while processes are running.
776 * Trap the fault and ignore the instruction if that happens.
777 */
778asmlinkage void kvm_handle_fault_on_reboot(void);
779
780#define __kvm_handle_fault_on_reboot(insn) \
781 "666: " insn "\n\t" \
18b13e54 782 ".pushsection .fixup, \"ax\" \n" \
4ecac3fd 783 "667: \n\t" \
8ceed347 784 __ASM_SIZE(push) " $666b \n\t" \
4ecac3fd
AK		 785 "jmp kvm_handle_fault_on_reboot \n\t" \
786 ".popsection \n\t" \
787 ".pushsection __ex_table, \"a\" \n\t" \
8ceed347 788 _ASM_PTR " 666b, 667b \n\t" \
4ecac3fd
AK		 789 ".popsection"
790
e930bffe
AA		 791#define KVM_ARCH_WANT_MMU_NOTIFIER
792int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
793int kvm_age_hva(struct kvm *kvm, unsigned long hva);
794
1965aae3 795#endif /* _ASM_X86_KVM_HOST_H */
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