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KVM: PIT: provide an option to disable interrupt reinjection
[mirror_ubuntu-jammy-kernel.git] / arch / x86 / include / asm / kvm_host.h
CommitLineData
a656c8ef 1/*
043405e1
CO		 2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
1965aae3
PA		 11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
043405e1 13
34c16eec
ZX		 14#include <linux/types.h>
15#include <linux/mm.h>
e930bffe 16#include <linux/mmu_notifier.h>
34c16eec
ZX		 17
18#include <linux/kvm.h>
19#include <linux/kvm_para.h>
edf88417 20#include <linux/kvm_types.h>
34c16eec 21
50d0a0f9 22#include <asm/pvclock-abi.h>
e01a1b57 23#include <asm/desc.h>
0bed3b56 24#include <asm/mtrr.h>
9962d032 25#include <asm/msr-index.h>
e01a1b57 26
69a9f69b
AK		 27#define KVM_MAX_VCPUS 16
28#define KVM_MEMORY_SLOTS 32
29/* memory slots that does not exposed to userspace */
30#define KVM_PRIVATE_MEM_SLOTS 4
31
32#define KVM_PIO_PAGE_OFFSET 1
542472b5 33#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
69a9f69b 34
cd6e8f87
ZX		 35#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
36#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
7d76b4d3
JP		 37#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
38 0xFFFFFF0000000000ULL)
cd6e8f87 39
7d76b4d3 40#define KVM_GUEST_CR0_MASK \
cd6e8f87
ZX		 41 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
42 | X86_CR0_NW | X86_CR0_CD)
7d76b4d3 43#define KVM_VM_CR0_ALWAYS_ON \
cd6e8f87
ZX		 44 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
45 | X86_CR0_MP)
7d76b4d3 46#define KVM_GUEST_CR4_MASK \
cd6e8f87
ZX		 47 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
48#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
49#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
50
51#define INVALID_PAGE (~(hpa_t)0)
52#define UNMAPPED_GVA (~(gpa_t)0)
53
05da4558
MT		 54/* shadow tables are PAE even on non-PAE hosts */
55#define KVM_HPAGE_SHIFT 21
56#define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT)
57#define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1))
58
59#define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE)
60
cd6e8f87 61#define DE_VECTOR 0
19bd8afd 62#define DB_VECTOR 1
77ab6db0
JK		 63#define BP_VECTOR 3
64#define OF_VECTOR 4
65#define BR_VECTOR 5
cd6e8f87
ZX		 66#define UD_VECTOR 6
67#define NM_VECTOR 7
68#define DF_VECTOR 8
69#define TS_VECTOR 10
70#define NP_VECTOR 11
71#define SS_VECTOR 12
72#define GP_VECTOR 13
73#define PF_VECTOR 14
77ab6db0 74#define MF_VECTOR 16
53371b50 75#define MC_VECTOR 18
cd6e8f87
ZX		 76
77#define SELECTOR_TI_MASK (1 << 2)
78#define SELECTOR_RPL_MASK 0x03
79
80#define IOPL_SHIFT 12
81
d69fb81f
ZX		 82#define KVM_ALIAS_SLOTS 4
83
d657a98e
ZX		 84#define KVM_PERMILLE_MMU_PAGES 20
85#define KVM_MIN_ALLOC_MMU_PAGES 64
1ae0a13d
DE		 86#define KVM_MMU_HASH_SHIFT 10
87#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
d657a98e
ZX		 88#define KVM_MIN_FREE_MMU_PAGES 5
89#define KVM_REFILL_PAGES 25
90#define KVM_MAX_CPUID_ENTRIES 40
0bed3b56 91#define KVM_NR_FIXED_MTRR_REGION 88
9ba075a6 92#define KVM_NR_VAR_MTRR 8
d657a98e 93
e9b11c17
ZX		 94extern spinlock_t kvm_lock;
95extern struct list_head vm_list;
96
d657a98e
ZX		 97struct kvm_vcpu;
98struct kvm;
99
5fdbf976 100enum kvm_reg {
2b3ccfa0
ZX		 101 VCPU_REGS_RAX = 0,
102 VCPU_REGS_RCX = 1,
103 VCPU_REGS_RDX = 2,
104 VCPU_REGS_RBX = 3,
105 VCPU_REGS_RSP = 4,
106 VCPU_REGS_RBP = 5,
107 VCPU_REGS_RSI = 6,
108 VCPU_REGS_RDI = 7,
109#ifdef CONFIG_X86_64
110 VCPU_REGS_R8 = 8,
111 VCPU_REGS_R9 = 9,
112 VCPU_REGS_R10 = 10,
113 VCPU_REGS_R11 = 11,
114 VCPU_REGS_R12 = 12,
115 VCPU_REGS_R13 = 13,
116 VCPU_REGS_R14 = 14,
117 VCPU_REGS_R15 = 15,
118#endif
5fdbf976 119 VCPU_REGS_RIP,
2b3ccfa0
ZX		 120 NR_VCPU_REGS
121};
122
123enum {
81609e3e 124 VCPU_SREG_ES,
2b3ccfa0 125 VCPU_SREG_CS,
81609e3e 126 VCPU_SREG_SS,
2b3ccfa0 127 VCPU_SREG_DS,
2b3ccfa0
ZX		 128 VCPU_SREG_FS,
129 VCPU_SREG_GS,
2b3ccfa0
ZX		 130 VCPU_SREG_TR,
131 VCPU_SREG_LDTR,
132};
133
edf88417 134#include <asm/kvm_x86_emulate.h>
2b3ccfa0 135
d657a98e
ZX		 136#define KVM_NR_MEM_OBJS 40
137
42dbaa5a
JK		 138#define KVM_NR_DB_REGS 4
139
140#define DR6_BD (1 << 13)
141#define DR6_BS (1 << 14)
142#define DR6_FIXED_1 0xffff0ff0
143#define DR6_VOLATILE 0x0000e00f
144
145#define DR7_BP_EN_MASK 0x000000ff
146#define DR7_GE (1 << 9)
147#define DR7_GD (1 << 13)
148#define DR7_FIXED_1 0x00000400
149#define DR7_VOLATILE 0xffff23ff
150
d657a98e
ZX		 151/*
152 * We don't want allocation failures within the mmu code, so we preallocate
153 * enough memory for a single page fault in a cache.
154 */
155struct kvm_mmu_memory_cache {
156 int nobjs;
157 void *objects[KVM_NR_MEM_OBJS];
158};
159
160#define NR_PTE_CHAIN_ENTRIES 5
161
162struct kvm_pte_chain {
163 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
164 struct hlist_node link;
165};
166
167/*
168 * kvm_mmu_page_role, below, is defined as:
169 *
170 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
171 * bits 4:7 - page table level for this shadow (1-4)
172 * bits 8:9 - page table quadrant for 2-level guests
173 * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
174 * bits 17:19 - common access permissions for all ptes in this shadow page
175 */
176union kvm_mmu_page_role {
177 unsigned word;
178 struct {
7d76b4d3
JP		 179 unsigned glevels:4;
180 unsigned level:4;
181 unsigned quadrant:2;
182 unsigned pad_for_nice_hex_output:6;
183 unsigned metaphysical:1;
184 unsigned access:3;
2e53d63a 185 unsigned invalid:1;
2f0b3d60 186 unsigned cr4_pge:1;
d657a98e
ZX		 187 };
188};
189
190struct kvm_mmu_page {
191 struct list_head link;
192 struct hlist_node hash_link;
193
6cffe8ca
MT		 194 struct list_head oos_link;
195
d657a98e
ZX		 196 /*
197 * The following two entries are used to key the shadow page in the
198 * hash table.
199 */
200 gfn_t gfn;
201 union kvm_mmu_page_role role;
202
203 u64 *spt;
204 /* hold the gfn of each spte inside spt */
205 gfn_t *gfns;
291f26bc
SY		 206 /*
207 * One bit set per slot which has memory
208 * in this shadow page.
209 */
210 DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
d657a98e
ZX		 211 int multimapped; /* More than one parent_pte? */
212 int root_count; /* Currently serving as active root */
4731d4c7 213 bool unsync;
6cffe8ca 214 bool global;
60c8aec6 215 unsigned int unsync_children;
d657a98e
ZX		 216 union {
217 u64 *parent_pte; /* !multimapped */
218 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
219 };
0074ff63 220 DECLARE_BITMAP(unsync_child_bitmap, 512);
d657a98e
ZX		 221};
222
6ad18fba
DH		 223struct kvm_pv_mmu_op_buffer {
224 void *ptr;
225 unsigned len;
226 unsigned processed;
227 char buf[512] __aligned(sizeof(long));
228};
229
d657a98e
ZX		 230/*
231 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
232 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
233 * mode.
234 */
235struct kvm_mmu {
236 void (*new_cr3)(struct kvm_vcpu *vcpu);
237 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
238 void (*free)(struct kvm_vcpu *vcpu);
239 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
240 void (*prefetch_page)(struct kvm_vcpu *vcpu,
241 struct kvm_mmu_page *page);
e8bc217a
MT		 242 int (*sync_page)(struct kvm_vcpu *vcpu,
243 struct kvm_mmu_page *sp);
a7052897 244 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
d657a98e
ZX		 245 hpa_t root_hpa;
246 int root_level;
247 int shadow_root_level;
a770f6f2 248 union kvm_mmu_page_role base_role;
d657a98e
ZX		 249
250 u64 *pae_root;
251};
252
ad312c7c 253struct kvm_vcpu_arch {
34c16eec
ZX		 254 u64 host_tsc;
255 int interrupt_window_open;
256 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
257 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
5fdbf976
MT		 258 /*
259 * rip and regs accesses must go through
260 * kvm_{register,rip}_{read,write} functions.
261 */
262 unsigned long regs[NR_VCPU_REGS];
263 u32 regs_avail;
264 u32 regs_dirty;
34c16eec
ZX		 265
266 unsigned long cr0;
267 unsigned long cr2;
268 unsigned long cr3;
269 unsigned long cr4;
270 unsigned long cr8;
1371d904 271 u32 hflags;
34c16eec
ZX		 272 u64 pdptrs[4]; /* pae */
273 u64 shadow_efer;
274 u64 apic_base;
275 struct kvm_lapic *apic; /* kernel irqchip context */
34c16eec
ZX		 276 int mp_state;
277 int sipi_vector;
278 u64 ia32_misc_enable_msr;
b209749f 279 bool tpr_access_reporting;
34c16eec
ZX		 280
281 struct kvm_mmu mmu;
6ad18fba
DH		 282 /* only needed in kvm_pv_mmu_op() path, but it's hot so
283 * put it here to avoid allocation */
284 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
34c16eec
ZX		 285
286 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
287 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
288 struct kvm_mmu_memory_cache mmu_page_cache;
289 struct kvm_mmu_memory_cache mmu_page_header_cache;
290
291 gfn_t last_pt_write_gfn;
292 int last_pt_write_count;
293 u64 *last_pte_updated;
1b7fcd32 294 gfn_t last_pte_gfn;
34c16eec 295
d7824fff 296 struct {
35149e21
AL		 297 gfn_t gfn; /* presumed gfn during guest pte update */
298 pfn_t pfn; /* pfn corresponding to that gfn */
05da4558 299 int largepage;
e930bffe 300 unsigned long mmu_seq;
d7824fff
AK		 301 } update_pte;
302
34c16eec
ZX		 303 struct i387_fxsave_struct host_fx_image;
304 struct i387_fxsave_struct guest_fx_image;
305
306 gva_t mmio_fault_cr2;
307 struct kvm_pio_request pio;
308 void *pio_data;
309
298101da
AK		 310 struct kvm_queued_exception {
311 bool pending;
312 bool has_error_code;
313 u8 nr;
314 u32 error_code;
315 } exception;
316
937a7eae
AK		 317 struct kvm_queued_interrupt {
318 bool pending;
319 u8 nr;
320 } interrupt;
321
34c16eec
ZX		 322 struct {
323 int active;
324 u8 save_iopl;
325 struct kvm_save_segment {
326 u16 selector;
327 unsigned long base;
328 u32 limit;
329 u32 ar;
330 } tr, es, ds, fs, gs;
331 } rmode;
332 int halt_request; /* real mode on Intel only */
333
334 int cpuid_nent;
07716717 335 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
34c16eec
ZX		 336 /* emulate context */
337
338 struct x86_emulate_ctxt emulate_ctxt;
18068523
GOC		 339
340 gpa_t time;
50d0a0f9
GH		 341 struct pvclock_vcpu_time_info hv_clock;
342 unsigned int hv_clock_tsc_khz;
18068523
GOC		 343 unsigned int time_offset;
344 struct page *time_page;
3419ffc8
SY		 345
346 bool nmi_pending;
668f612f 347 bool nmi_injected;
33f089ca 348 bool nmi_window_open;
9ba075a6 349
0bed3b56
SY		 350 struct mtrr_state_type mtrr_state;
351 u32 pat;
42dbaa5a
JK		 352
353 int switch_db_regs;
354 unsigned long host_db[KVM_NR_DB_REGS];
355 unsigned long host_dr6;
356 unsigned long host_dr7;
357 unsigned long db[KVM_NR_DB_REGS];
358 unsigned long dr6;
359 unsigned long dr7;
360 unsigned long eff_db[KVM_NR_DB_REGS];
34c16eec
ZX		 361};
362
d69fb81f
ZX		 363struct kvm_mem_alias {
364 gfn_t base_gfn;
365 unsigned long npages;
366 gfn_t target_gfn;
367};
368
369struct kvm_arch{
370 int naliases;
371 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
f05e70ac
ZX		 372
373 unsigned int n_free_mmu_pages;
374 unsigned int n_requested_mmu_pages;
375 unsigned int n_alloc_mmu_pages;
376 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
377 /*
378 * Hash table of struct kvm_mmu_page.
379 */
380 struct list_head active_mmu_pages;
4d5c5d0f 381 struct list_head assigned_dev_head;
6cffe8ca 382 struct list_head oos_global_pages;
19de40a8 383 struct iommu_domain *iommu_domain;
d7deeeb0
ZX		 384 struct kvm_pic *vpic;
385 struct kvm_ioapic *vioapic;
7837699f 386 struct kvm_pit *vpit;
564f1537 387 struct hlist_head irq_ack_notifier_list;
cc6e462c 388 int vapics_in_nmi_mode;
bfc6d222
ZX		 389
390 int round_robin_prev_vcpu;
391 unsigned int tss_addr;
392 struct page *apic_access_page;
18068523
GOC		 393
394 gpa_t wall_clock;
b7ebfb05
SY		 395
396 struct page *ept_identity_pagetable;
397 bool ept_identity_pagetable_done;
5550af4d
SY		 398
399 unsigned long irq_sources_bitmap;
400 unsigned long irq_states[KVM_IOAPIC_NUM_PINS];
53f658b3 401 u64 vm_init_tsc;
d69fb81f
ZX		 402};
403
0711456c
ZX		 404struct kvm_vm_stat {
405 u32 mmu_shadow_zapped;
406 u32 mmu_pte_write;
407 u32 mmu_pte_updated;
408 u32 mmu_pde_zapped;
409 u32 mmu_flooded;
410 u32 mmu_recycled;
dfc5aa00 411 u32 mmu_cache_miss;
4731d4c7 412 u32 mmu_unsync;
6cffe8ca 413 u32 mmu_unsync_global;
0711456c 414 u32 remote_tlb_flush;
05da4558 415 u32 lpages;
0711456c
ZX		 416};
417
77b4c255
ZX		 418struct kvm_vcpu_stat {
419 u32 pf_fixed;
420 u32 pf_guest;
421 u32 tlb_flush;
422 u32 invlpg;
423
424 u32 exits;
425 u32 io_exits;
426 u32 mmio_exits;
427 u32 signal_exits;
428 u32 irq_window_exits;
f08864b4 429 u32 nmi_window_exits;
77b4c255
ZX		 430 u32 halt_exits;
431 u32 halt_wakeup;
432 u32 request_irq_exits;
c4abb7c9 433 u32 request_nmi_exits;
77b4c255
ZX		 434 u32 irq_exits;
435 u32 host_state_reload;
436 u32 efer_reload;
437 u32 fpu_reload;
438 u32 insn_emulation;
439 u32 insn_emulation_fail;
f11c3a8d 440 u32 hypercalls;
fa89a817 441 u32 irq_injections;
c4abb7c9 442 u32 nmi_injections;
77b4c255 443};
ad312c7c 444
e01a1b57
HB		 445struct descriptor_table {
446 u16 limit;
447 unsigned long base;
448} __attribute__((packed));
449
ea4a5ff8
ZX		 450struct kvm_x86_ops {
451 int (*cpu_has_kvm_support)(void); /* __init */
452 int (*disabled_by_bios)(void); /* __init */
453 void (*hardware_enable)(void *dummy); /* __init */
454 void (*hardware_disable)(void *dummy);
455 void (*check_processor_compatibility)(void *rtn);
456 int (*hardware_setup)(void); /* __init */
457 void (*hardware_unsetup)(void); /* __exit */
774ead3a 458 bool (*cpu_has_accelerated_tpr)(void);
ea4a5ff8
ZX		 459
460 /* Create, but do not attach this VCPU */
461 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
462 void (*vcpu_free)(struct kvm_vcpu *vcpu);
463 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
464
465 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
466 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
467 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 468
469 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
d0bfb940 470 struct kvm_guest_debug *dbg);
ea4a5ff8
ZX		 471 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
472 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
473 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
474 void (*get_segment)(struct kvm_vcpu *vcpu,
475 struct kvm_segment *var, int seg);
2e4d2653 476 int (*get_cpl)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 477 void (*set_segment)(struct kvm_vcpu *vcpu,
478 struct kvm_segment *var, int seg);
479 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
480 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
481 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
482 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
483 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
484 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
485 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
486 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
487 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
488 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
489 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
490 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
491 int *exception);
5fdbf976 492 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
ea4a5ff8
ZX		 493 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
494 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
495
496 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 497
ea4a5ff8
ZX		 498 void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
499 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
500 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
501 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
502 unsigned char *hypercall_addr);
503 int (*get_irq)(struct kvm_vcpu *vcpu);
504 void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
298101da
AK		 505 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
506 bool has_error_code, u32 error_code);
507 bool (*exception_injected)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 508 void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
509 void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
510 struct kvm_run *run);
511
512 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 513 int (*get_tdp_level)(void);
64d4d521 514 int (*get_mt_mask_shift)(void);
ea4a5ff8
ZX		 515};
516
97896d04
ZX		 517extern struct kvm_x86_ops *kvm_x86_ops;
518
54f1585a
ZX		 519int kvm_mmu_module_init(void);
520void kvm_mmu_module_exit(void);
521
522void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
523int kvm_mmu_create(struct kvm_vcpu *vcpu);
524int kvm_mmu_setup(struct kvm_vcpu *vcpu);
525void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e
SY		 526void kvm_mmu_set_base_ptes(u64 base_pte);
527void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 528 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask);
54f1585a
ZX		 529
530int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
531void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
532void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 533unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a
ZX		 534void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
535
cc4b6871
JR		 536int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
537
3200f405 538int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 539 const void *val, int bytes);
2f333bcb
MT		 540int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
541 gpa_t addr, unsigned long *ret);
542
543extern bool tdp_enabled;
9f811285 544
54f1585a
ZX		 545enum emulation_result {
546 EMULATE_DONE, /* no further processing */
547 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
548 EMULATE_FAIL, /* can't emulate this instruction */
549};
550
571008da
SY		 551#define EMULTYPE_NO_DECODE (1 << 0)
552#define EMULTYPE_TRAP_UD (1 << 1)
54f1585a 553int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
571008da 554 unsigned long cr2, u16 error_code, int emulation_type);
54f1585a
ZX		 555void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
556void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
557void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
558void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
559 unsigned long *rflags);
560
561unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
562void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
563 unsigned long *rflags);
f2b4b7dd 564void kvm_enable_efer_bits(u64);
54f1585a
ZX		 565int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
566int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
567
568struct x86_emulate_ctxt;
569
570int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
571 int size, unsigned port);
572int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
573 int size, unsigned long count, int down,
574 gva_t address, int rep, unsigned port);
575void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
576int kvm_emulate_halt(struct kvm_vcpu *vcpu);
577int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
578int emulate_clts(struct kvm_vcpu *vcpu);
579int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
580 unsigned long *dest);
581int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
582 unsigned long value);
583
3e6e0aab
GT		 584void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
585int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
586 int type_bits, int seg);
587
37817f29
IE		 588int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
589
2d3ad1f4 590void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
9c20456a
JR		 591void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
592void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
593void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2d3ad1f4
AK		 594unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
595void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a
ZX		 596void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
597
598int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
599int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
600
298101da
AK		 601void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
602void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee
AK		 603void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
604 u32 error_code);
298101da 605
3de42dc0
XZ		 606void kvm_pic_set_irq(void *opaque, int irq, int level);
607
3419ffc8
SY		 608void kvm_inject_nmi(struct kvm_vcpu *vcpu);
609
54f1585a
ZX		 610void fx_init(struct kvm_vcpu *vcpu);
611
54f1585a
ZX		 612int emulator_write_emulated(unsigned long addr,
613 const void *val,
614 unsigned int bytes,
615 struct kvm_vcpu *vcpu);
616
617unsigned long segment_base(u16 selector);
618
d835dfec 619void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a 620void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT		 621 const u8 *new, int bytes,
622 bool guest_initiated);
54f1585a
ZX		 623int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
624void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
625int kvm_mmu_load(struct kvm_vcpu *vcpu);
626void kvm_mmu_unload(struct kvm_vcpu *vcpu);
0ba73cda 627void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
6cffe8ca 628void kvm_mmu_sync_global(struct kvm_vcpu *vcpu);
54f1585a
ZX		 629
630int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
631
632int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
633
3067714c 634int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
a7052897 635void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
34c16eec 636
18552672 637void kvm_enable_tdp(void);
5f4cb662 638void kvm_disable_tdp(void);
18552672 639
a03490ed 640int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a 641int complete_pio(struct kvm_vcpu *vcpu);
ec6d273d 642
2843099f
IE		 643struct kvm_memory_slot *gfn_to_memslot_unaliased(struct kvm *kvm, gfn_t gfn);
644
ec6d273d
ZX		 645static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
646{
647 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
648
649 return (struct kvm_mmu_page *)page_private(page);
650}
651
d6e88aec 652static inline u16 kvm_read_fs(void)
ec6d273d
ZX		 653{
654 u16 seg;
655 asm("mov %%fs, %0" : "=g"(seg));
656 return seg;
657}
658
d6e88aec 659static inline u16 kvm_read_gs(void)
ec6d273d
ZX		 660{
661 u16 seg;
662 asm("mov %%gs, %0" : "=g"(seg));
663 return seg;
664}
665
d6e88aec 666static inline u16 kvm_read_ldt(void)
ec6d273d
ZX		 667{
668 u16 ldt;
669 asm("sldt %0" : "=g"(ldt));
670 return ldt;
671}
672
d6e88aec 673static inline void kvm_load_fs(u16 sel)
ec6d273d
ZX		 674{
675 asm("mov %0, %%fs" : : "rm"(sel));
676}
677
d6e88aec 678static inline void kvm_load_gs(u16 sel)
ec6d273d
ZX		 679{
680 asm("mov %0, %%gs" : : "rm"(sel));
681}
682
d6e88aec 683static inline void kvm_load_ldt(u16 sel)
ec6d273d
ZX		 684{
685 asm("lldt %0" : : "rm"(sel));
686}
ec6d273d 687
d6e88aec 688static inline void kvm_get_idt(struct descriptor_table *table)
ec6d273d
ZX		 689{
690 asm("sidt %0" : "=m"(*table));
691}
692
d6e88aec 693static inline void kvm_get_gdt(struct descriptor_table *table)
ec6d273d
ZX		 694{
695 asm("sgdt %0" : "=m"(*table));
696}
697
d6e88aec 698static inline unsigned long kvm_read_tr_base(void)
ec6d273d
ZX		 699{
700 u16 tr;
701 asm("str %0" : "=g"(tr));
702 return segment_base(tr);
703}
704
705#ifdef CONFIG_X86_64
706static inline unsigned long read_msr(unsigned long msr)
707{
708 u64 value;
709
710 rdmsrl(msr, value);
711 return value;
712}
713#endif
714
d6e88aec 715static inline void kvm_fx_save(struct i387_fxsave_struct *image)
ec6d273d
ZX		 716{
717 asm("fxsave (%0)":: "r" (image));
718}
719
d6e88aec 720static inline void kvm_fx_restore(struct i387_fxsave_struct *image)
ec6d273d
ZX		 721{
722 asm("fxrstor (%0)":: "r" (image));
723}
724
d6e88aec 725static inline void kvm_fx_finit(void)
ec6d273d
ZX		 726{
727 asm("finit");
728}
729
730static inline u32 get_rdx_init_val(void)
731{
732 return 0x600; /* P6 family */
733}
734
c1a5d4f9
AK		 735static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
736{
737 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
738}
739
ec6d273d
ZX		 740#define MSR_IA32_TIME_STAMP_COUNTER 0x010
741
742#define TSS_IOPB_BASE_OFFSET 0x66
743#define TSS_BASE_SIZE 0x68
744#define TSS_IOPB_SIZE (65536 / 8)
745#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP		 746#define RMODE_TSS_SIZE \
747 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 748
37817f29
IE		 749enum {
750 TASK_SWITCH_CALL = 0,
751 TASK_SWITCH_IRET = 1,
752 TASK_SWITCH_JMP = 2,
753 TASK_SWITCH_GATE = 3,
754};
755
1371d904 756#define HF_GIF_MASK (1 << 0)
3d6368ef
AG		 757#define HF_HIF_MASK (1 << 1)
758#define HF_VINTR_MASK (1 << 2)
1371d904 759
4ecac3fd
AK		 760/*
761 * Hardware virtualization extension instructions may fault if a
762 * reboot turns off virtualization while processes are running.
763 * Trap the fault and ignore the instruction if that happens.
764 */
765asmlinkage void kvm_handle_fault_on_reboot(void);
766
767#define __kvm_handle_fault_on_reboot(insn) \
768 "666: " insn "\n\t" \
18b13e54 769 ".pushsection .fixup, \"ax\" \n" \
4ecac3fd 770 "667: \n\t" \
8ceed347 771 __ASM_SIZE(push) " $666b \n\t" \
4ecac3fd
AK		 772 "jmp kvm_handle_fault_on_reboot \n\t" \
773 ".popsection \n\t" \
774 ".pushsection __ex_table, \"a\" \n\t" \
8ceed347 775 _ASM_PTR " 666b, 667b \n\t" \
4ecac3fd
AK		 776 ".popsection"
777
e930bffe
AA		 778#define KVM_ARCH_WANT_MMU_NOTIFIER
779int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
780int kvm_age_hva(struct kvm *kvm, unsigned long hva);
781
1965aae3 782#endif /* _ASM_X86_KVM_HOST_H */
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