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Commit | Line | Data |
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a656c8ef | 1 | /* |
043405e1 CO |
2 | * Kernel-based Virtual Machine driver for Linux |
3 | * | |
4 | * This header defines architecture specific interfaces, x86 version | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
7 | * the COPYING file in the top-level directory. | |
8 | * | |
9 | */ | |
10 | ||
1965aae3 PA |
11 | #ifndef _ASM_X86_KVM_HOST_H |
12 | #define _ASM_X86_KVM_HOST_H | |
043405e1 | 13 | |
34c16eec ZX |
14 | #include <linux/types.h> |
15 | #include <linux/mm.h> | |
e930bffe | 16 | #include <linux/mmu_notifier.h> |
229456fc | 17 | #include <linux/tracepoint.h> |
f5f48ee1 | 18 | #include <linux/cpumask.h> |
34c16eec ZX |
19 | |
20 | #include <linux/kvm.h> | |
21 | #include <linux/kvm_para.h> | |
edf88417 | 22 | #include <linux/kvm_types.h> |
34c16eec | 23 | |
50d0a0f9 | 24 | #include <asm/pvclock-abi.h> |
e01a1b57 | 25 | #include <asm/desc.h> |
0bed3b56 | 26 | #include <asm/mtrr.h> |
9962d032 | 27 | #include <asm/msr-index.h> |
e01a1b57 | 28 | |
0680fe52 | 29 | #define KVM_MAX_VCPUS 64 |
69a9f69b AK |
30 | #define KVM_MEMORY_SLOTS 32 |
31 | /* memory slots that does not exposed to userspace */ | |
32 | #define KVM_PRIVATE_MEM_SLOTS 4 | |
33 | ||
34 | #define KVM_PIO_PAGE_OFFSET 1 | |
542472b5 | 35 | #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 |
69a9f69b | 36 | |
cd6e8f87 ZX |
37 | #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) |
38 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) | |
7d76b4d3 JP |
39 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ |
40 | 0xFFFFFF0000000000ULL) | |
cd6e8f87 | 41 | |
cd6e8f87 | 42 | #define INVALID_PAGE (~(hpa_t)0) |
dd180b3e XG |
43 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
44 | ||
cd6e8f87 ZX |
45 | #define UNMAPPED_GVA (~(gpa_t)0) |
46 | ||
ec04b260 | 47 | /* KVM Hugepage definitions for x86 */ |
04326caa | 48 | #define KVM_NR_PAGE_SIZES 3 |
82855413 JR |
49 | #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9) |
50 | #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x)) | |
ec04b260 JR |
51 | #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x)) |
52 | #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1)) | |
53 | #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE) | |
05da4558 | 54 | |
cd6e8f87 | 55 | #define DE_VECTOR 0 |
19bd8afd | 56 | #define DB_VECTOR 1 |
77ab6db0 JK |
57 | #define BP_VECTOR 3 |
58 | #define OF_VECTOR 4 | |
59 | #define BR_VECTOR 5 | |
cd6e8f87 ZX |
60 | #define UD_VECTOR 6 |
61 | #define NM_VECTOR 7 | |
62 | #define DF_VECTOR 8 | |
63 | #define TS_VECTOR 10 | |
64 | #define NP_VECTOR 11 | |
65 | #define SS_VECTOR 12 | |
66 | #define GP_VECTOR 13 | |
67 | #define PF_VECTOR 14 | |
77ab6db0 | 68 | #define MF_VECTOR 16 |
53371b50 | 69 | #define MC_VECTOR 18 |
cd6e8f87 ZX |
70 | |
71 | #define SELECTOR_TI_MASK (1 << 2) | |
72 | #define SELECTOR_RPL_MASK 0x03 | |
73 | ||
74 | #define IOPL_SHIFT 12 | |
75 | ||
d657a98e ZX |
76 | #define KVM_PERMILLE_MMU_PAGES 20 |
77 | #define KVM_MIN_ALLOC_MMU_PAGES 64 | |
1ae0a13d DE |
78 | #define KVM_MMU_HASH_SHIFT 10 |
79 | #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) | |
d657a98e ZX |
80 | #define KVM_MIN_FREE_MMU_PAGES 5 |
81 | #define KVM_REFILL_PAGES 25 | |
73c1160c | 82 | #define KVM_MAX_CPUID_ENTRIES 80 |
0bed3b56 | 83 | #define KVM_NR_FIXED_MTRR_REGION 88 |
9ba075a6 | 84 | #define KVM_NR_VAR_MTRR 8 |
d657a98e | 85 | |
af585b92 GN |
86 | #define ASYNC_PF_PER_VCPU 64 |
87 | ||
e9b11c17 ZX |
88 | extern spinlock_t kvm_lock; |
89 | extern struct list_head vm_list; | |
90 | ||
d657a98e ZX |
91 | struct kvm_vcpu; |
92 | struct kvm; | |
af585b92 | 93 | struct kvm_async_pf; |
d657a98e | 94 | |
5fdbf976 | 95 | enum kvm_reg { |
2b3ccfa0 ZX |
96 | VCPU_REGS_RAX = 0, |
97 | VCPU_REGS_RCX = 1, | |
98 | VCPU_REGS_RDX = 2, | |
99 | VCPU_REGS_RBX = 3, | |
100 | VCPU_REGS_RSP = 4, | |
101 | VCPU_REGS_RBP = 5, | |
102 | VCPU_REGS_RSI = 6, | |
103 | VCPU_REGS_RDI = 7, | |
104 | #ifdef CONFIG_X86_64 | |
105 | VCPU_REGS_R8 = 8, | |
106 | VCPU_REGS_R9 = 9, | |
107 | VCPU_REGS_R10 = 10, | |
108 | VCPU_REGS_R11 = 11, | |
109 | VCPU_REGS_R12 = 12, | |
110 | VCPU_REGS_R13 = 13, | |
111 | VCPU_REGS_R14 = 14, | |
112 | VCPU_REGS_R15 = 15, | |
113 | #endif | |
5fdbf976 | 114 | VCPU_REGS_RIP, |
2b3ccfa0 ZX |
115 | NR_VCPU_REGS |
116 | }; | |
117 | ||
6de4f3ad AK |
118 | enum kvm_reg_ex { |
119 | VCPU_EXREG_PDPTR = NR_VCPU_REGS, | |
120 | }; | |
121 | ||
2b3ccfa0 | 122 | enum { |
81609e3e | 123 | VCPU_SREG_ES, |
2b3ccfa0 | 124 | VCPU_SREG_CS, |
81609e3e | 125 | VCPU_SREG_SS, |
2b3ccfa0 | 126 | VCPU_SREG_DS, |
2b3ccfa0 ZX |
127 | VCPU_SREG_FS, |
128 | VCPU_SREG_GS, | |
2b3ccfa0 ZX |
129 | VCPU_SREG_TR, |
130 | VCPU_SREG_LDTR, | |
131 | }; | |
132 | ||
56e82318 | 133 | #include <asm/kvm_emulate.h> |
2b3ccfa0 | 134 | |
d657a98e ZX |
135 | #define KVM_NR_MEM_OBJS 40 |
136 | ||
42dbaa5a JK |
137 | #define KVM_NR_DB_REGS 4 |
138 | ||
139 | #define DR6_BD (1 << 13) | |
140 | #define DR6_BS (1 << 14) | |
141 | #define DR6_FIXED_1 0xffff0ff0 | |
142 | #define DR6_VOLATILE 0x0000e00f | |
143 | ||
144 | #define DR7_BP_EN_MASK 0x000000ff | |
145 | #define DR7_GE (1 << 9) | |
146 | #define DR7_GD (1 << 13) | |
147 | #define DR7_FIXED_1 0x00000400 | |
148 | #define DR7_VOLATILE 0xffff23ff | |
149 | ||
d657a98e ZX |
150 | /* |
151 | * We don't want allocation failures within the mmu code, so we preallocate | |
152 | * enough memory for a single page fault in a cache. | |
153 | */ | |
154 | struct kvm_mmu_memory_cache { | |
155 | int nobjs; | |
156 | void *objects[KVM_NR_MEM_OBJS]; | |
157 | }; | |
158 | ||
159 | #define NR_PTE_CHAIN_ENTRIES 5 | |
160 | ||
161 | struct kvm_pte_chain { | |
162 | u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES]; | |
163 | struct hlist_node link; | |
164 | }; | |
165 | ||
166 | /* | |
167 | * kvm_mmu_page_role, below, is defined as: | |
168 | * | |
169 | * bits 0:3 - total guest paging levels (2-4, or zero for real mode) | |
170 | * bits 4:7 - page table level for this shadow (1-4) | |
171 | * bits 8:9 - page table quadrant for 2-level guests | |
f6e2c02b AK |
172 | * bit 16 - direct mapping of virtual to physical mapping at gfn |
173 | * used for real mode and two-dimensional paging | |
d657a98e ZX |
174 | * bits 17:19 - common access permissions for all ptes in this shadow page |
175 | */ | |
176 | union kvm_mmu_page_role { | |
177 | unsigned word; | |
178 | struct { | |
7d76b4d3 | 179 | unsigned level:4; |
5b7e0102 | 180 | unsigned cr4_pae:1; |
7d76b4d3 JP |
181 | unsigned quadrant:2; |
182 | unsigned pad_for_nice_hex_output:6; | |
f6e2c02b | 183 | unsigned direct:1; |
7d76b4d3 | 184 | unsigned access:3; |
2e53d63a | 185 | unsigned invalid:1; |
9645bb56 | 186 | unsigned nxe:1; |
3dbe1415 | 187 | unsigned cr0_wp:1; |
d657a98e ZX |
188 | }; |
189 | }; | |
190 | ||
191 | struct kvm_mmu_page { | |
192 | struct list_head link; | |
193 | struct hlist_node hash_link; | |
194 | ||
195 | /* | |
196 | * The following two entries are used to key the shadow page in the | |
197 | * hash table. | |
198 | */ | |
199 | gfn_t gfn; | |
200 | union kvm_mmu_page_role role; | |
201 | ||
202 | u64 *spt; | |
203 | /* hold the gfn of each spte inside spt */ | |
204 | gfn_t *gfns; | |
291f26bc SY |
205 | /* |
206 | * One bit set per slot which has memory | |
207 | * in this shadow page. | |
208 | */ | |
209 | DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS); | |
0571d366 | 210 | bool multimapped; /* More than one parent_pte? */ |
4731d4c7 | 211 | bool unsync; |
0571d366 | 212 | int root_count; /* Currently serving as active root */ |
60c8aec6 | 213 | unsigned int unsync_children; |
d657a98e ZX |
214 | union { |
215 | u64 *parent_pte; /* !multimapped */ | |
216 | struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */ | |
217 | }; | |
0074ff63 | 218 | DECLARE_BITMAP(unsync_child_bitmap, 512); |
d657a98e ZX |
219 | }; |
220 | ||
6ad18fba DH |
221 | struct kvm_pv_mmu_op_buffer { |
222 | void *ptr; | |
223 | unsigned len; | |
224 | unsigned processed; | |
225 | char buf[512] __aligned(sizeof(long)); | |
226 | }; | |
227 | ||
1c08364c AK |
228 | struct kvm_pio_request { |
229 | unsigned long count; | |
1c08364c AK |
230 | int in; |
231 | int port; | |
232 | int size; | |
1c08364c AK |
233 | }; |
234 | ||
d657a98e ZX |
235 | /* |
236 | * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level | |
237 | * 32-bit). The kvm_mmu structure abstracts the details of the current mmu | |
238 | * mode. | |
239 | */ | |
240 | struct kvm_mmu { | |
241 | void (*new_cr3)(struct kvm_vcpu *vcpu); | |
f43addd4 | 242 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root); |
5777ed34 | 243 | unsigned long (*get_cr3)(struct kvm_vcpu *vcpu); |
56028d08 | 244 | int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err, bool no_apf); |
8df25a32 | 245 | void (*inject_page_fault)(struct kvm_vcpu *vcpu); |
d657a98e | 246 | void (*free)(struct kvm_vcpu *vcpu); |
1871c602 GN |
247 | gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access, |
248 | u32 *error); | |
c30a358d | 249 | gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access); |
d657a98e ZX |
250 | void (*prefetch_page)(struct kvm_vcpu *vcpu, |
251 | struct kvm_mmu_page *page); | |
e8bc217a | 252 | int (*sync_page)(struct kvm_vcpu *vcpu, |
be71e061 | 253 | struct kvm_mmu_page *sp, bool clear_unsync); |
a7052897 | 254 | void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva); |
d657a98e ZX |
255 | hpa_t root_hpa; |
256 | int root_level; | |
257 | int shadow_root_level; | |
a770f6f2 | 258 | union kvm_mmu_page_role base_role; |
c5a78f2b | 259 | bool direct_map; |
d657a98e ZX |
260 | |
261 | u64 *pae_root; | |
81407ca5 | 262 | u64 *lm_root; |
82725b20 | 263 | u64 rsvd_bits_mask[2][4]; |
ff03a073 | 264 | |
2d48a985 JR |
265 | bool nx; |
266 | ||
ff03a073 | 267 | u64 pdptrs[4]; /* pae */ |
d657a98e ZX |
268 | }; |
269 | ||
ad312c7c | 270 | struct kvm_vcpu_arch { |
5fdbf976 MT |
271 | /* |
272 | * rip and regs accesses must go through | |
273 | * kvm_{register,rip}_{read,write} functions. | |
274 | */ | |
275 | unsigned long regs[NR_VCPU_REGS]; | |
276 | u32 regs_avail; | |
277 | u32 regs_dirty; | |
34c16eec ZX |
278 | |
279 | unsigned long cr0; | |
e8467fda | 280 | unsigned long cr0_guest_owned_bits; |
34c16eec ZX |
281 | unsigned long cr2; |
282 | unsigned long cr3; | |
283 | unsigned long cr4; | |
fc78f519 | 284 | unsigned long cr4_guest_owned_bits; |
34c16eec | 285 | unsigned long cr8; |
1371d904 | 286 | u32 hflags; |
f6801dff | 287 | u64 efer; |
34c16eec ZX |
288 | u64 apic_base; |
289 | struct kvm_lapic *apic; /* kernel irqchip context */ | |
e1035715 | 290 | int32_t apic_arb_prio; |
34c16eec ZX |
291 | int mp_state; |
292 | int sipi_vector; | |
293 | u64 ia32_misc_enable_msr; | |
b209749f | 294 | bool tpr_access_reporting; |
34c16eec | 295 | |
14dfe855 JR |
296 | /* |
297 | * Paging state of the vcpu | |
298 | * | |
299 | * If the vcpu runs in guest mode with two level paging this still saves | |
300 | * the paging mode of the l1 guest. This context is always used to | |
301 | * handle faults. | |
302 | */ | |
34c16eec | 303 | struct kvm_mmu mmu; |
8df25a32 | 304 | |
6539e738 JR |
305 | /* |
306 | * Paging state of an L2 guest (used for nested npt) | |
307 | * | |
308 | * This context will save all necessary information to walk page tables | |
309 | * of the an L2 guest. This context is only initialized for page table | |
310 | * walking and not for faulting since we never handle l2 page faults on | |
311 | * the host. | |
312 | */ | |
313 | struct kvm_mmu nested_mmu; | |
314 | ||
14dfe855 JR |
315 | /* |
316 | * Pointer to the mmu context currently used for | |
317 | * gva_to_gpa translations. | |
318 | */ | |
319 | struct kvm_mmu *walk_mmu; | |
320 | ||
8df25a32 JR |
321 | /* |
322 | * This struct is filled with the necessary information to propagate a | |
323 | * page fault into the guest | |
324 | */ | |
325 | struct { | |
326 | u64 address; | |
327 | unsigned error_code; | |
0959ffac | 328 | bool nested; |
8df25a32 JR |
329 | } fault; |
330 | ||
6ad18fba DH |
331 | /* only needed in kvm_pv_mmu_op() path, but it's hot so |
332 | * put it here to avoid allocation */ | |
333 | struct kvm_pv_mmu_op_buffer mmu_op_buffer; | |
34c16eec ZX |
334 | |
335 | struct kvm_mmu_memory_cache mmu_pte_chain_cache; | |
336 | struct kvm_mmu_memory_cache mmu_rmap_desc_cache; | |
337 | struct kvm_mmu_memory_cache mmu_page_cache; | |
338 | struct kvm_mmu_memory_cache mmu_page_header_cache; | |
339 | ||
340 | gfn_t last_pt_write_gfn; | |
341 | int last_pt_write_count; | |
342 | u64 *last_pte_updated; | |
1b7fcd32 | 343 | gfn_t last_pte_gfn; |
34c16eec | 344 | |
d7824fff | 345 | struct { |
35149e21 AL |
346 | gfn_t gfn; /* presumed gfn during guest pte update */ |
347 | pfn_t pfn; /* pfn corresponding to that gfn */ | |
e930bffe | 348 | unsigned long mmu_seq; |
d7824fff AK |
349 | } update_pte; |
350 | ||
98918833 | 351 | struct fpu guest_fpu; |
2acf923e | 352 | u64 xcr0; |
34c16eec ZX |
353 | |
354 | gva_t mmio_fault_cr2; | |
355 | struct kvm_pio_request pio; | |
356 | void *pio_data; | |
357 | ||
66fd3f7f GN |
358 | u8 event_exit_inst_len; |
359 | ||
298101da AK |
360 | struct kvm_queued_exception { |
361 | bool pending; | |
362 | bool has_error_code; | |
ce7ddec4 | 363 | bool reinject; |
298101da AK |
364 | u8 nr; |
365 | u32 error_code; | |
366 | } exception; | |
367 | ||
937a7eae AK |
368 | struct kvm_queued_interrupt { |
369 | bool pending; | |
66fd3f7f | 370 | bool soft; |
937a7eae AK |
371 | u8 nr; |
372 | } interrupt; | |
373 | ||
34c16eec ZX |
374 | int halt_request; /* real mode on Intel only */ |
375 | ||
376 | int cpuid_nent; | |
07716717 | 377 | struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; |
34c16eec ZX |
378 | /* emulate context */ |
379 | ||
380 | struct x86_emulate_ctxt emulate_ctxt; | |
18068523 GOC |
381 | |
382 | gpa_t time; | |
50d0a0f9 | 383 | struct pvclock_vcpu_time_info hv_clock; |
e48672fa | 384 | unsigned int hw_tsc_khz; |
18068523 GOC |
385 | unsigned int time_offset; |
386 | struct page *time_page; | |
e48672fa | 387 | u64 last_host_tsc; |
1d5f066e ZA |
388 | u64 last_guest_tsc; |
389 | u64 last_kernel_ns; | |
c285545f ZA |
390 | u64 last_tsc_nsec; |
391 | u64 last_tsc_write; | |
392 | bool tsc_catchup; | |
3419ffc8 SY |
393 | |
394 | bool nmi_pending; | |
668f612f | 395 | bool nmi_injected; |
9ba075a6 | 396 | |
0bed3b56 SY |
397 | struct mtrr_state_type mtrr_state; |
398 | u32 pat; | |
42dbaa5a JK |
399 | |
400 | int switch_db_regs; | |
42dbaa5a JK |
401 | unsigned long db[KVM_NR_DB_REGS]; |
402 | unsigned long dr6; | |
403 | unsigned long dr7; | |
404 | unsigned long eff_db[KVM_NR_DB_REGS]; | |
890ca9ae HY |
405 | |
406 | u64 mcg_cap; | |
407 | u64 mcg_status; | |
408 | u64 mcg_ctl; | |
409 | u64 *mce_banks; | |
94fe45da JK |
410 | |
411 | /* used for guest single stepping over the given code position */ | |
94fe45da | 412 | unsigned long singlestep_rip; |
f92653ee | 413 | |
10388a07 GN |
414 | /* fields used by HYPER-V emulation */ |
415 | u64 hv_vapic; | |
f5f48ee1 SY |
416 | |
417 | cpumask_var_t wbinvd_dirty_mask; | |
af585b92 GN |
418 | |
419 | struct { | |
420 | bool halted; | |
421 | gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)]; | |
344d9588 GN |
422 | struct gfn_to_hva_cache data; |
423 | u64 msr_val; | |
af585b92 | 424 | } apf; |
34c16eec ZX |
425 | }; |
426 | ||
fef9cce0 | 427 | struct kvm_arch { |
49d5ca26 | 428 | unsigned int n_used_mmu_pages; |
f05e70ac | 429 | unsigned int n_requested_mmu_pages; |
39de71ec | 430 | unsigned int n_max_mmu_pages; |
08e850c6 | 431 | atomic_t invlpg_counter; |
f05e70ac ZX |
432 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; |
433 | /* | |
434 | * Hash table of struct kvm_mmu_page. | |
435 | */ | |
436 | struct list_head active_mmu_pages; | |
4d5c5d0f | 437 | struct list_head assigned_dev_head; |
19de40a8 | 438 | struct iommu_domain *iommu_domain; |
522c68c4 | 439 | int iommu_flags; |
d7deeeb0 ZX |
440 | struct kvm_pic *vpic; |
441 | struct kvm_ioapic *vioapic; | |
7837699f | 442 | struct kvm_pit *vpit; |
cc6e462c | 443 | int vapics_in_nmi_mode; |
bfc6d222 | 444 | |
bfc6d222 ZX |
445 | unsigned int tss_addr; |
446 | struct page *apic_access_page; | |
18068523 GOC |
447 | |
448 | gpa_t wall_clock; | |
b7ebfb05 SY |
449 | |
450 | struct page *ept_identity_pagetable; | |
451 | bool ept_identity_pagetable_done; | |
b927a3ce | 452 | gpa_t ept_identity_map_addr; |
5550af4d SY |
453 | |
454 | unsigned long irq_sources_bitmap; | |
afbcf7ab | 455 | s64 kvmclock_offset; |
99e3e30a | 456 | spinlock_t tsc_write_lock; |
f38e098f ZA |
457 | u64 last_tsc_nsec; |
458 | u64 last_tsc_offset; | |
459 | u64 last_tsc_write; | |
c285545f ZA |
460 | u32 virtual_tsc_khz; |
461 | u32 virtual_tsc_mult; | |
462 | s8 virtual_tsc_shift; | |
ffde22ac ES |
463 | |
464 | struct kvm_xen_hvm_config xen_hvm_config; | |
55cd8e5a GN |
465 | |
466 | /* fields used by HYPER-V emulation */ | |
467 | u64 hv_guest_os_id; | |
468 | u64 hv_hypercall; | |
d69fb81f ZX |
469 | }; |
470 | ||
0711456c ZX |
471 | struct kvm_vm_stat { |
472 | u32 mmu_shadow_zapped; | |
473 | u32 mmu_pte_write; | |
474 | u32 mmu_pte_updated; | |
475 | u32 mmu_pde_zapped; | |
476 | u32 mmu_flooded; | |
477 | u32 mmu_recycled; | |
dfc5aa00 | 478 | u32 mmu_cache_miss; |
4731d4c7 | 479 | u32 mmu_unsync; |
0711456c | 480 | u32 remote_tlb_flush; |
05da4558 | 481 | u32 lpages; |
0711456c ZX |
482 | }; |
483 | ||
77b4c255 ZX |
484 | struct kvm_vcpu_stat { |
485 | u32 pf_fixed; | |
486 | u32 pf_guest; | |
487 | u32 tlb_flush; | |
488 | u32 invlpg; | |
489 | ||
490 | u32 exits; | |
491 | u32 io_exits; | |
492 | u32 mmio_exits; | |
493 | u32 signal_exits; | |
494 | u32 irq_window_exits; | |
f08864b4 | 495 | u32 nmi_window_exits; |
77b4c255 ZX |
496 | u32 halt_exits; |
497 | u32 halt_wakeup; | |
498 | u32 request_irq_exits; | |
499 | u32 irq_exits; | |
500 | u32 host_state_reload; | |
501 | u32 efer_reload; | |
502 | u32 fpu_reload; | |
503 | u32 insn_emulation; | |
504 | u32 insn_emulation_fail; | |
f11c3a8d | 505 | u32 hypercalls; |
fa89a817 | 506 | u32 irq_injections; |
c4abb7c9 | 507 | u32 nmi_injections; |
77b4c255 | 508 | }; |
ad312c7c | 509 | |
ea4a5ff8 ZX |
510 | struct kvm_x86_ops { |
511 | int (*cpu_has_kvm_support)(void); /* __init */ | |
512 | int (*disabled_by_bios)(void); /* __init */ | |
10474ae8 | 513 | int (*hardware_enable)(void *dummy); |
ea4a5ff8 ZX |
514 | void (*hardware_disable)(void *dummy); |
515 | void (*check_processor_compatibility)(void *rtn); | |
516 | int (*hardware_setup)(void); /* __init */ | |
517 | void (*hardware_unsetup)(void); /* __exit */ | |
774ead3a | 518 | bool (*cpu_has_accelerated_tpr)(void); |
0e851880 | 519 | void (*cpuid_update)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
520 | |
521 | /* Create, but do not attach this VCPU */ | |
522 | struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); | |
523 | void (*vcpu_free)(struct kvm_vcpu *vcpu); | |
524 | int (*vcpu_reset)(struct kvm_vcpu *vcpu); | |
525 | ||
526 | void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); | |
527 | void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); | |
528 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 529 | |
355be0b9 JK |
530 | void (*set_guest_debug)(struct kvm_vcpu *vcpu, |
531 | struct kvm_guest_debug *dbg); | |
ea4a5ff8 ZX |
532 | int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); |
533 | int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
534 | u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); | |
535 | void (*get_segment)(struct kvm_vcpu *vcpu, | |
536 | struct kvm_segment *var, int seg); | |
2e4d2653 | 537 | int (*get_cpl)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
538 | void (*set_segment)(struct kvm_vcpu *vcpu, |
539 | struct kvm_segment *var, int seg); | |
540 | void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); | |
e8467fda | 541 | void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
542 | void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); |
543 | void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); | |
544 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | |
545 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | |
546 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | |
89a27f4d GN |
547 | void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); |
548 | void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); | |
549 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); | |
550 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt); | |
020df079 | 551 | void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value); |
5fdbf976 | 552 | void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); |
ea4a5ff8 ZX |
553 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); |
554 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | |
6b52d186 | 555 | void (*fpu_activate)(struct kvm_vcpu *vcpu); |
02daab21 | 556 | void (*fpu_deactivate)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
557 | |
558 | void (*tlb_flush)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 559 | |
851ba692 AK |
560 | void (*run)(struct kvm_vcpu *vcpu); |
561 | int (*handle_exit)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 562 | void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); |
2809f5d2 GC |
563 | void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); |
564 | u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask); | |
ea4a5ff8 ZX |
565 | void (*patch_hypercall)(struct kvm_vcpu *vcpu, |
566 | unsigned char *hypercall_addr); | |
66fd3f7f | 567 | void (*set_irq)(struct kvm_vcpu *vcpu); |
95ba8273 | 568 | void (*set_nmi)(struct kvm_vcpu *vcpu); |
298101da | 569 | void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, |
ce7ddec4 JR |
570 | bool has_error_code, u32 error_code, |
571 | bool reinject); | |
b463a6f7 | 572 | void (*cancel_injection)(struct kvm_vcpu *vcpu); |
78646121 | 573 | int (*interrupt_allowed)(struct kvm_vcpu *vcpu); |
95ba8273 | 574 | int (*nmi_allowed)(struct kvm_vcpu *vcpu); |
3cfc3092 JK |
575 | bool (*get_nmi_mask)(struct kvm_vcpu *vcpu); |
576 | void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked); | |
95ba8273 GN |
577 | void (*enable_nmi_window)(struct kvm_vcpu *vcpu); |
578 | void (*enable_irq_window)(struct kvm_vcpu *vcpu); | |
579 | void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr); | |
ea4a5ff8 | 580 | int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); |
67253af5 | 581 | int (*get_tdp_level)(void); |
4b12f0de | 582 | u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio); |
17cc3935 | 583 | int (*get_lpage_level)(void); |
4e47c7a6 | 584 | bool (*rdtscp_supported)(void); |
e48672fa | 585 | void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment); |
344f414f | 586 | |
1c97f0a0 JR |
587 | void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); |
588 | ||
d4330ef2 JR |
589 | void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry); |
590 | ||
f5f48ee1 SY |
591 | bool (*has_wbinvd_exit)(void); |
592 | ||
99e3e30a ZA |
593 | void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset); |
594 | ||
229456fc | 595 | const struct trace_print_flags *exit_reasons_str; |
ea4a5ff8 ZX |
596 | }; |
597 | ||
af585b92 GN |
598 | struct kvm_arch_async_pf { |
599 | gfn_t gfn; | |
600 | }; | |
601 | ||
97896d04 ZX |
602 | extern struct kvm_x86_ops *kvm_x86_ops; |
603 | ||
54f1585a ZX |
604 | int kvm_mmu_module_init(void); |
605 | void kvm_mmu_module_exit(void); | |
606 | ||
607 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); | |
608 | int kvm_mmu_create(struct kvm_vcpu *vcpu); | |
609 | int kvm_mmu_setup(struct kvm_vcpu *vcpu); | |
610 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte); | |
7b52345e SY |
611 | void kvm_mmu_set_base_ptes(u64 base_pte); |
612 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
4b12f0de | 613 | u64 dirty_mask, u64 nx_mask, u64 x_mask); |
54f1585a ZX |
614 | |
615 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); | |
616 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); | |
617 | void kvm_mmu_zap_all(struct kvm *kvm); | |
3ad82a7e | 618 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); |
54f1585a ZX |
619 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); |
620 | ||
ff03a073 | 621 | int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3); |
cc4b6871 | 622 | |
3200f405 | 623 | int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, |
9f811285 | 624 | const void *val, int bytes); |
2f333bcb MT |
625 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, |
626 | gpa_t addr, unsigned long *ret); | |
4b12f0de | 627 | u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn); |
2f333bcb MT |
628 | |
629 | extern bool tdp_enabled; | |
9f811285 | 630 | |
54f1585a ZX |
631 | enum emulation_result { |
632 | EMULATE_DONE, /* no further processing */ | |
633 | EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ | |
634 | EMULATE_FAIL, /* can't emulate this instruction */ | |
635 | }; | |
636 | ||
571008da SY |
637 | #define EMULTYPE_NO_DECODE (1 << 0) |
638 | #define EMULTYPE_TRAP_UD (1 << 1) | |
ba8afb6b | 639 | #define EMULTYPE_SKIP (1 << 2) |
851ba692 | 640 | int emulate_instruction(struct kvm_vcpu *vcpu, |
571008da | 641 | unsigned long cr2, u16 error_code, int emulation_type); |
54f1585a ZX |
642 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); |
643 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
54f1585a | 644 | |
f2b4b7dd | 645 | void kvm_enable_efer_bits(u64); |
54f1585a ZX |
646 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); |
647 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
648 | ||
649 | struct x86_emulate_ctxt; | |
650 | ||
cf8f70bf | 651 | int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port); |
54f1585a ZX |
652 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); |
653 | int kvm_emulate_halt(struct kvm_vcpu *vcpu); | |
654 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); | |
655 | int emulate_clts(struct kvm_vcpu *vcpu); | |
f5f48ee1 | 656 | int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu); |
54f1585a | 657 | |
3e6e0aab | 658 | void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); |
c697518a | 659 | int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg); |
3e6e0aab | 660 | |
e269fb21 JK |
661 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason, |
662 | bool has_error_code, u32 error_code); | |
37817f29 | 663 | |
49a9b07e | 664 | int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); |
2390218b | 665 | int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); |
a83b29c6 | 666 | int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); |
9c20456a | 667 | void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); |
020df079 GN |
668 | int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val); |
669 | int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val); | |
2d3ad1f4 AK |
670 | unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); |
671 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | |
54f1585a | 672 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); |
2acf923e | 673 | int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr); |
54f1585a ZX |
674 | |
675 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); | |
676 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data); | |
677 | ||
91586a3b JK |
678 | unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu); |
679 | void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags); | |
680 | ||
298101da AK |
681 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); |
682 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |
ce7ddec4 JR |
683 | void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr); |
684 | void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |
8df25a32 | 685 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu); |
ec92fe44 JR |
686 | int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, |
687 | gfn_t gfn, void *data, int offset, int len, | |
688 | u32 access); | |
d4f8cf66 | 689 | void kvm_propagate_fault(struct kvm_vcpu *vcpu); |
0a79b009 | 690 | bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl); |
298101da | 691 | |
4925663a | 692 | int kvm_pic_set_irq(void *opaque, int irq, int level); |
3de42dc0 | 693 | |
3419ffc8 SY |
694 | void kvm_inject_nmi(struct kvm_vcpu *vcpu); |
695 | ||
10ab25cd | 696 | int fx_init(struct kvm_vcpu *vcpu); |
54f1585a | 697 | |
d835dfec | 698 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); |
54f1585a | 699 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
ad218f85 MT |
700 | const u8 *new, int bytes, |
701 | bool guest_initiated); | |
54f1585a ZX |
702 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); |
703 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); | |
704 | int kvm_mmu_load(struct kvm_vcpu *vcpu); | |
705 | void kvm_mmu_unload(struct kvm_vcpu *vcpu); | |
0ba73cda | 706 | void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu); |
1871c602 GN |
707 | gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error); |
708 | gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error); | |
709 | gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error); | |
710 | gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error); | |
54f1585a ZX |
711 | |
712 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); | |
713 | ||
714 | int kvm_fix_hypercall(struct kvm_vcpu *vcpu); | |
715 | ||
3067714c | 716 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code); |
a7052897 | 717 | void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva); |
34c16eec | 718 | |
18552672 | 719 | void kvm_enable_tdp(void); |
5f4cb662 | 720 | void kvm_disable_tdp(void); |
18552672 | 721 | |
de7d789a | 722 | int complete_pio(struct kvm_vcpu *vcpu); |
f850e2e6 | 723 | bool kvm_check_iopl(struct kvm_vcpu *vcpu); |
ec6d273d ZX |
724 | |
725 | static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) | |
726 | { | |
727 | struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); | |
728 | ||
729 | return (struct kvm_mmu_page *)page_private(page); | |
730 | } | |
731 | ||
d6e88aec | 732 | static inline u16 kvm_read_ldt(void) |
ec6d273d ZX |
733 | { |
734 | u16 ldt; | |
735 | asm("sldt %0" : "=g"(ldt)); | |
736 | return ldt; | |
737 | } | |
738 | ||
d6e88aec | 739 | static inline void kvm_load_ldt(u16 sel) |
ec6d273d ZX |
740 | { |
741 | asm("lldt %0" : : "rm"(sel)); | |
742 | } | |
ec6d273d | 743 | |
ec6d273d ZX |
744 | #ifdef CONFIG_X86_64 |
745 | static inline unsigned long read_msr(unsigned long msr) | |
746 | { | |
747 | u64 value; | |
748 | ||
749 | rdmsrl(msr, value); | |
750 | return value; | |
751 | } | |
752 | #endif | |
753 | ||
ec6d273d ZX |
754 | static inline u32 get_rdx_init_val(void) |
755 | { | |
756 | return 0x600; /* P6 family */ | |
757 | } | |
758 | ||
c1a5d4f9 AK |
759 | static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) |
760 | { | |
761 | kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); | |
762 | } | |
763 | ||
ec6d273d ZX |
764 | #define TSS_IOPB_BASE_OFFSET 0x66 |
765 | #define TSS_BASE_SIZE 0x68 | |
766 | #define TSS_IOPB_SIZE (65536 / 8) | |
767 | #define TSS_REDIRECTION_SIZE (256 / 8) | |
7d76b4d3 JP |
768 | #define RMODE_TSS_SIZE \ |
769 | (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) | |
53e0aa7b | 770 | |
37817f29 IE |
771 | enum { |
772 | TASK_SWITCH_CALL = 0, | |
773 | TASK_SWITCH_IRET = 1, | |
774 | TASK_SWITCH_JMP = 2, | |
775 | TASK_SWITCH_GATE = 3, | |
776 | }; | |
777 | ||
1371d904 | 778 | #define HF_GIF_MASK (1 << 0) |
3d6368ef AG |
779 | #define HF_HIF_MASK (1 << 1) |
780 | #define HF_VINTR_MASK (1 << 2) | |
95ba8273 | 781 | #define HF_NMI_MASK (1 << 3) |
44c11430 | 782 | #define HF_IRET_MASK (1 << 4) |
1371d904 | 783 | |
4ecac3fd AK |
784 | /* |
785 | * Hardware virtualization extension instructions may fault if a | |
786 | * reboot turns off virtualization while processes are running. | |
787 | * Trap the fault and ignore the instruction if that happens. | |
788 | */ | |
789 | asmlinkage void kvm_handle_fault_on_reboot(void); | |
790 | ||
791 | #define __kvm_handle_fault_on_reboot(insn) \ | |
792 | "666: " insn "\n\t" \ | |
18b13e54 | 793 | ".pushsection .fixup, \"ax\" \n" \ |
4ecac3fd | 794 | "667: \n\t" \ |
8ceed347 | 795 | __ASM_SIZE(push) " $666b \n\t" \ |
4ecac3fd AK |
796 | "jmp kvm_handle_fault_on_reboot \n\t" \ |
797 | ".popsection \n\t" \ | |
798 | ".pushsection __ex_table, \"a\" \n\t" \ | |
8ceed347 | 799 | _ASM_PTR " 666b, 667b \n\t" \ |
4ecac3fd AK |
800 | ".popsection" |
801 | ||
e930bffe AA |
802 | #define KVM_ARCH_WANT_MMU_NOTIFIER |
803 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); | |
804 | int kvm_age_hva(struct kvm *kvm, unsigned long hva); | |
3da0dd43 | 805 | void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte); |
82725b20 | 806 | int cpuid_maxphyaddr(struct kvm_vcpu *vcpu); |
a1b37100 GN |
807 | int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu); |
808 | int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu); | |
0b71785d | 809 | int kvm_cpu_get_interrupt(struct kvm_vcpu *v); |
e930bffe | 810 | |
18863bdd | 811 | void kvm_define_shared_msr(unsigned index, u32 msr); |
d5696725 | 812 | void kvm_set_shared_msr(unsigned index, u64 val, u64 mask); |
18863bdd | 813 | |
f92653ee JK |
814 | bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip); |
815 | ||
af585b92 GN |
816 | void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu, |
817 | struct kvm_async_pf *work); | |
818 | void kvm_arch_async_page_present(struct kvm_vcpu *vcpu, | |
819 | struct kvm_async_pf *work); | |
56028d08 GN |
820 | void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, |
821 | struct kvm_async_pf *work); | |
af585b92 GN |
822 | extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn); |
823 | ||
1965aae3 | 824 | #endif /* _ASM_X86_KVM_HOST_H */ |