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KVM: x86: Fix and refactor NMI watchdog emulation
[mirror_ubuntu-jammy-kernel.git] / arch / x86 / include / asm / kvm_host.h
CommitLineData
a656c8ef 1/*
043405e1
CO		 2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
1965aae3
PA		 11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
043405e1 13
34c16eec
ZX		 14#include <linux/types.h>
15#include <linux/mm.h>
e930bffe 16#include <linux/mmu_notifier.h>
34c16eec
ZX		 17
18#include <linux/kvm.h>
19#include <linux/kvm_para.h>
edf88417 20#include <linux/kvm_types.h>
34c16eec 21
50d0a0f9 22#include <asm/pvclock-abi.h>
e01a1b57 23#include <asm/desc.h>
0bed3b56 24#include <asm/mtrr.h>
e01a1b57 25
69a9f69b
AK		 26#define KVM_MAX_VCPUS 16
27#define KVM_MEMORY_SLOTS 32
28/* memory slots that does not exposed to userspace */
29#define KVM_PRIVATE_MEM_SLOTS 4
30
31#define KVM_PIO_PAGE_OFFSET 1
542472b5 32#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
69a9f69b 33
cd6e8f87
ZX		 34#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
35#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
7d76b4d3
JP		 36#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
37 0xFFFFFF0000000000ULL)
cd6e8f87 38
7d76b4d3 39#define KVM_GUEST_CR0_MASK \
cd6e8f87
ZX		 40 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
41 | X86_CR0_NW | X86_CR0_CD)
7d76b4d3 42#define KVM_VM_CR0_ALWAYS_ON \
cd6e8f87
ZX		 43 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
44 | X86_CR0_MP)
7d76b4d3 45#define KVM_GUEST_CR4_MASK \
cd6e8f87
ZX		 46 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
47#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
48#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
49
50#define INVALID_PAGE (~(hpa_t)0)
51#define UNMAPPED_GVA (~(gpa_t)0)
52
05da4558
MT		 53/* shadow tables are PAE even on non-PAE hosts */
54#define KVM_HPAGE_SHIFT 21
55#define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT)
56#define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1))
57
58#define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE)
59
cd6e8f87 60#define DE_VECTOR 0
19bd8afd 61#define DB_VECTOR 1
77ab6db0
JK		 62#define BP_VECTOR 3
63#define OF_VECTOR 4
64#define BR_VECTOR 5
cd6e8f87
ZX		 65#define UD_VECTOR 6
66#define NM_VECTOR 7
67#define DF_VECTOR 8
68#define TS_VECTOR 10
69#define NP_VECTOR 11
70#define SS_VECTOR 12
71#define GP_VECTOR 13
72#define PF_VECTOR 14
77ab6db0 73#define MF_VECTOR 16
53371b50 74#define MC_VECTOR 18
cd6e8f87
ZX		 75
76#define SELECTOR_TI_MASK (1 << 2)
77#define SELECTOR_RPL_MASK 0x03
78
79#define IOPL_SHIFT 12
80
d69fb81f
ZX		 81#define KVM_ALIAS_SLOTS 4
82
d657a98e
ZX		 83#define KVM_PERMILLE_MMU_PAGES 20
84#define KVM_MIN_ALLOC_MMU_PAGES 64
1ae0a13d
DE		 85#define KVM_MMU_HASH_SHIFT 10
86#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
d657a98e
ZX		 87#define KVM_MIN_FREE_MMU_PAGES 5
88#define KVM_REFILL_PAGES 25
89#define KVM_MAX_CPUID_ENTRIES 40
0bed3b56 90#define KVM_NR_FIXED_MTRR_REGION 88
9ba075a6 91#define KVM_NR_VAR_MTRR 8
d657a98e 92
e9b11c17
ZX		 93extern spinlock_t kvm_lock;
94extern struct list_head vm_list;
95
d657a98e
ZX		 96struct kvm_vcpu;
97struct kvm;
98
5fdbf976 99enum kvm_reg {
2b3ccfa0
ZX		 100 VCPU_REGS_RAX = 0,
101 VCPU_REGS_RCX = 1,
102 VCPU_REGS_RDX = 2,
103 VCPU_REGS_RBX = 3,
104 VCPU_REGS_RSP = 4,
105 VCPU_REGS_RBP = 5,
106 VCPU_REGS_RSI = 6,
107 VCPU_REGS_RDI = 7,
108#ifdef CONFIG_X86_64
109 VCPU_REGS_R8 = 8,
110 VCPU_REGS_R9 = 9,
111 VCPU_REGS_R10 = 10,
112 VCPU_REGS_R11 = 11,
113 VCPU_REGS_R12 = 12,
114 VCPU_REGS_R13 = 13,
115 VCPU_REGS_R14 = 14,
116 VCPU_REGS_R15 = 15,
117#endif
5fdbf976 118 VCPU_REGS_RIP,
2b3ccfa0
ZX		 119 NR_VCPU_REGS
120};
121
122enum {
81609e3e 123 VCPU_SREG_ES,
2b3ccfa0 124 VCPU_SREG_CS,
81609e3e 125 VCPU_SREG_SS,
2b3ccfa0 126 VCPU_SREG_DS,
2b3ccfa0
ZX		 127 VCPU_SREG_FS,
128 VCPU_SREG_GS,
2b3ccfa0
ZX		 129 VCPU_SREG_TR,
130 VCPU_SREG_LDTR,
131};
132
edf88417 133#include <asm/kvm_x86_emulate.h>
2b3ccfa0 134
d657a98e
ZX		 135#define KVM_NR_MEM_OBJS 40
136
69a9f69b
AK		 137struct kvm_guest_debug {
138 int enabled;
139 unsigned long bp[4];
140 int singlestep;
141};
142
d657a98e
ZX		 143/*
144 * We don't want allocation failures within the mmu code, so we preallocate
145 * enough memory for a single page fault in a cache.
146 */
147struct kvm_mmu_memory_cache {
148 int nobjs;
149 void *objects[KVM_NR_MEM_OBJS];
150};
151
152#define NR_PTE_CHAIN_ENTRIES 5
153
154struct kvm_pte_chain {
155 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
156 struct hlist_node link;
157};
158
159/*
160 * kvm_mmu_page_role, below, is defined as:
161 *
162 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
163 * bits 4:7 - page table level for this shadow (1-4)
164 * bits 8:9 - page table quadrant for 2-level guests
165 * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
166 * bits 17:19 - common access permissions for all ptes in this shadow page
167 */
168union kvm_mmu_page_role {
169 unsigned word;
170 struct {
7d76b4d3
JP		 171 unsigned glevels:4;
172 unsigned level:4;
173 unsigned quadrant:2;
174 unsigned pad_for_nice_hex_output:6;
175 unsigned metaphysical:1;
176 unsigned access:3;
2e53d63a 177 unsigned invalid:1;
d657a98e
ZX		 178 };
179};
180
181struct kvm_mmu_page {
182 struct list_head link;
183 struct hlist_node hash_link;
184
185 /*
186 * The following two entries are used to key the shadow page in the
187 * hash table.
188 */
189 gfn_t gfn;
190 union kvm_mmu_page_role role;
191
192 u64 *spt;
193 /* hold the gfn of each spte inside spt */
194 gfn_t *gfns;
291f26bc
SY		 195 /*
196 * One bit set per slot which has memory
197 * in this shadow page.
198 */
199 DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
d657a98e
ZX		 200 int multimapped; /* More than one parent_pte? */
201 int root_count; /* Currently serving as active root */
4731d4c7
MT		 202 bool unsync;
203 bool unsync_children;
d657a98e
ZX		 204 union {
205 u64 *parent_pte; /* !multimapped */
206 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
207 };
0074ff63 208 DECLARE_BITMAP(unsync_child_bitmap, 512);
d657a98e
ZX		 209};
210
6ad18fba
DH		 211struct kvm_pv_mmu_op_buffer {
212 void *ptr;
213 unsigned len;
214 unsigned processed;
215 char buf[512] __aligned(sizeof(long));
216};
217
d657a98e
ZX		 218/*
219 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
220 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
221 * mode.
222 */
223struct kvm_mmu {
224 void (*new_cr3)(struct kvm_vcpu *vcpu);
225 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
226 void (*free)(struct kvm_vcpu *vcpu);
227 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
228 void (*prefetch_page)(struct kvm_vcpu *vcpu,
229 struct kvm_mmu_page *page);
e8bc217a
MT		 230 int (*sync_page)(struct kvm_vcpu *vcpu,
231 struct kvm_mmu_page *sp);
a7052897 232 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
d657a98e
ZX		 233 hpa_t root_hpa;
234 int root_level;
235 int shadow_root_level;
236
237 u64 *pae_root;
238};
239
ad312c7c 240struct kvm_vcpu_arch {
34c16eec
ZX		 241 u64 host_tsc;
242 int interrupt_window_open;
243 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
244 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
5fdbf976
MT		 245 /*
246 * rip and regs accesses must go through
247 * kvm_{register,rip}_{read,write} functions.
248 */
249 unsigned long regs[NR_VCPU_REGS];
250 u32 regs_avail;
251 u32 regs_dirty;
34c16eec
ZX		 252
253 unsigned long cr0;
254 unsigned long cr2;
255 unsigned long cr3;
256 unsigned long cr4;
257 unsigned long cr8;
258 u64 pdptrs[4]; /* pae */
259 u64 shadow_efer;
260 u64 apic_base;
261 struct kvm_lapic *apic; /* kernel irqchip context */
34c16eec
ZX		 262 int mp_state;
263 int sipi_vector;
264 u64 ia32_misc_enable_msr;
b209749f 265 bool tpr_access_reporting;
34c16eec
ZX		 266
267 struct kvm_mmu mmu;
6ad18fba
DH		 268 /* only needed in kvm_pv_mmu_op() path, but it's hot so
269 * put it here to avoid allocation */
270 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
34c16eec
ZX		 271
272 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
273 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
274 struct kvm_mmu_memory_cache mmu_page_cache;
275 struct kvm_mmu_memory_cache mmu_page_header_cache;
276
277 gfn_t last_pt_write_gfn;
278 int last_pt_write_count;
279 u64 *last_pte_updated;
1b7fcd32 280 gfn_t last_pte_gfn;
34c16eec 281
d7824fff 282 struct {
35149e21
AL		 283 gfn_t gfn; /* presumed gfn during guest pte update */
284 pfn_t pfn; /* pfn corresponding to that gfn */
05da4558 285 int largepage;
e930bffe 286 unsigned long mmu_seq;
d7824fff
AK		 287 } update_pte;
288
34c16eec
ZX		 289 struct i387_fxsave_struct host_fx_image;
290 struct i387_fxsave_struct guest_fx_image;
291
292 gva_t mmio_fault_cr2;
293 struct kvm_pio_request pio;
294 void *pio_data;
295
298101da
AK		 296 struct kvm_queued_exception {
297 bool pending;
298 bool has_error_code;
299 u8 nr;
300 u32 error_code;
301 } exception;
302
937a7eae
AK		 303 struct kvm_queued_interrupt {
304 bool pending;
305 u8 nr;
306 } interrupt;
307
34c16eec
ZX		 308 struct {
309 int active;
310 u8 save_iopl;
311 struct kvm_save_segment {
312 u16 selector;
313 unsigned long base;
314 u32 limit;
315 u32 ar;
316 } tr, es, ds, fs, gs;
317 } rmode;
318 int halt_request; /* real mode on Intel only */
319
320 int cpuid_nent;
07716717 321 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
34c16eec
ZX		 322 /* emulate context */
323
324 struct x86_emulate_ctxt emulate_ctxt;
18068523
GOC		 325
326 gpa_t time;
50d0a0f9
GH		 327 struct pvclock_vcpu_time_info hv_clock;
328 unsigned int hv_clock_tsc_khz;
18068523
GOC		 329 unsigned int time_offset;
330 struct page *time_page;
3419ffc8
SY		 331
332 bool nmi_pending;
668f612f 333 bool nmi_injected;
33f089ca 334 bool nmi_window_open;
9ba075a6 335
0bed3b56
SY		 336 struct mtrr_state_type mtrr_state;
337 u32 pat;
34c16eec
ZX		 338};
339
d69fb81f
ZX		 340struct kvm_mem_alias {
341 gfn_t base_gfn;
342 unsigned long npages;
343 gfn_t target_gfn;
344};
345
346struct kvm_arch{
347 int naliases;
348 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
f05e70ac
ZX		 349
350 unsigned int n_free_mmu_pages;
351 unsigned int n_requested_mmu_pages;
352 unsigned int n_alloc_mmu_pages;
353 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
354 /*
355 * Hash table of struct kvm_mmu_page.
356 */
357 struct list_head active_mmu_pages;
4d5c5d0f 358 struct list_head assigned_dev_head;
62c476c7 359 struct dmar_domain *intel_iommu_domain;
d7deeeb0
ZX		 360 struct kvm_pic *vpic;
361 struct kvm_ioapic *vioapic;
7837699f 362 struct kvm_pit *vpit;
564f1537 363 struct hlist_head irq_ack_notifier_list;
bfc6d222
ZX		 364
365 int round_robin_prev_vcpu;
366 unsigned int tss_addr;
367 struct page *apic_access_page;
18068523
GOC		 368
369 gpa_t wall_clock;
b7ebfb05
SY		 370
371 struct page *ept_identity_pagetable;
372 bool ept_identity_pagetable_done;
5550af4d
SY		 373
374 unsigned long irq_sources_bitmap;
375 unsigned long irq_states[KVM_IOAPIC_NUM_PINS];
d69fb81f
ZX		 376};
377
0711456c
ZX		 378struct kvm_vm_stat {
379 u32 mmu_shadow_zapped;
380 u32 mmu_pte_write;
381 u32 mmu_pte_updated;
382 u32 mmu_pde_zapped;
383 u32 mmu_flooded;
384 u32 mmu_recycled;
dfc5aa00 385 u32 mmu_cache_miss;
4731d4c7 386 u32 mmu_unsync;
0711456c 387 u32 remote_tlb_flush;
05da4558 388 u32 lpages;
0711456c
ZX		 389};
390
77b4c255
ZX		 391struct kvm_vcpu_stat {
392 u32 pf_fixed;
393 u32 pf_guest;
394 u32 tlb_flush;
395 u32 invlpg;
396
397 u32 exits;
398 u32 io_exits;
399 u32 mmio_exits;
400 u32 signal_exits;
401 u32 irq_window_exits;
f08864b4 402 u32 nmi_window_exits;
77b4c255
ZX		 403 u32 halt_exits;
404 u32 halt_wakeup;
405 u32 request_irq_exits;
c4abb7c9 406 u32 request_nmi_exits;
77b4c255
ZX		 407 u32 irq_exits;
408 u32 host_state_reload;
409 u32 efer_reload;
410 u32 fpu_reload;
411 u32 insn_emulation;
412 u32 insn_emulation_fail;
f11c3a8d 413 u32 hypercalls;
fa89a817 414 u32 irq_injections;
c4abb7c9 415 u32 nmi_injections;
77b4c255 416};
ad312c7c 417
e01a1b57
HB		 418struct descriptor_table {
419 u16 limit;
420 unsigned long base;
421} __attribute__((packed));
422
ea4a5ff8
ZX		 423struct kvm_x86_ops {
424 int (*cpu_has_kvm_support)(void); /* __init */
425 int (*disabled_by_bios)(void); /* __init */
426 void (*hardware_enable)(void *dummy); /* __init */
427 void (*hardware_disable)(void *dummy);
428 void (*check_processor_compatibility)(void *rtn);
429 int (*hardware_setup)(void); /* __init */
430 void (*hardware_unsetup)(void); /* __exit */
774ead3a 431 bool (*cpu_has_accelerated_tpr)(void);
ea4a5ff8
ZX		 432
433 /* Create, but do not attach this VCPU */
434 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
435 void (*vcpu_free)(struct kvm_vcpu *vcpu);
436 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
437
438 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
439 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
440 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 441
442 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
443 struct kvm_debug_guest *dbg);
444 void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
445 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
446 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
447 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
448 void (*get_segment)(struct kvm_vcpu *vcpu,
449 struct kvm_segment *var, int seg);
2e4d2653 450 int (*get_cpl)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 451 void (*set_segment)(struct kvm_vcpu *vcpu,
452 struct kvm_segment *var, int seg);
453 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
454 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
455 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
456 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
457 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
458 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
459 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
460 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
461 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
462 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
463 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
464 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
465 int *exception);
5fdbf976 466 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
ea4a5ff8
ZX		 467 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
468 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
469
470 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 471
ea4a5ff8
ZX		 472 void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
473 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
474 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
475 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
476 unsigned char *hypercall_addr);
477 int (*get_irq)(struct kvm_vcpu *vcpu);
478 void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
298101da
AK		 479 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
480 bool has_error_code, u32 error_code);
481 bool (*exception_injected)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 482 void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
483 void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
484 struct kvm_run *run);
485
486 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 487 int (*get_tdp_level)(void);
64d4d521 488 int (*get_mt_mask_shift)(void);
ea4a5ff8
ZX		 489};
490
97896d04
ZX		 491extern struct kvm_x86_ops *kvm_x86_ops;
492
54f1585a
ZX		 493int kvm_mmu_module_init(void);
494void kvm_mmu_module_exit(void);
495
496void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
497int kvm_mmu_create(struct kvm_vcpu *vcpu);
498int kvm_mmu_setup(struct kvm_vcpu *vcpu);
499void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e
SY		 500void kvm_mmu_set_base_ptes(u64 base_pte);
501void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 502 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask);
54f1585a
ZX		 503
504int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
505void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
506void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 507unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a
ZX		 508void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
509
cc4b6871
JR		 510int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
511
3200f405 512int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 513 const void *val, int bytes);
2f333bcb
MT		 514int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
515 gpa_t addr, unsigned long *ret);
516
517extern bool tdp_enabled;
9f811285 518
54f1585a
ZX		 519enum emulation_result {
520 EMULATE_DONE, /* no further processing */
521 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
522 EMULATE_FAIL, /* can't emulate this instruction */
523};
524
571008da
SY		 525#define EMULTYPE_NO_DECODE (1 << 0)
526#define EMULTYPE_TRAP_UD (1 << 1)
54f1585a 527int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
571008da 528 unsigned long cr2, u16 error_code, int emulation_type);
54f1585a
ZX		 529void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
530void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
531void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
532void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
533 unsigned long *rflags);
534
535unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
536void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
537 unsigned long *rflags);
f2b4b7dd 538void kvm_enable_efer_bits(u64);
54f1585a
ZX		 539int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
540int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
541
542struct x86_emulate_ctxt;
543
544int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
545 int size, unsigned port);
546int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
547 int size, unsigned long count, int down,
548 gva_t address, int rep, unsigned port);
549void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
550int kvm_emulate_halt(struct kvm_vcpu *vcpu);
551int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
552int emulate_clts(struct kvm_vcpu *vcpu);
553int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
554 unsigned long *dest);
555int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
556 unsigned long value);
557
3e6e0aab
GT		 558void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
559int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
560 int type_bits, int seg);
561
37817f29
IE		 562int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
563
2d3ad1f4 564void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
9c20456a
JR		 565void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
566void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
567void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2d3ad1f4
AK		 568unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
569void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a
ZX		 570void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
571
572int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
573int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
574
298101da
AK		 575void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
576void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee
AK		 577void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
578 u32 error_code);
298101da 579
3de42dc0
XZ		 580void kvm_pic_set_irq(void *opaque, int irq, int level);
581
3419ffc8
SY		 582void kvm_inject_nmi(struct kvm_vcpu *vcpu);
583
54f1585a
ZX		 584void fx_init(struct kvm_vcpu *vcpu);
585
586int emulator_read_std(unsigned long addr,
587 void *val,
588 unsigned int bytes,
589 struct kvm_vcpu *vcpu);
590int emulator_write_emulated(unsigned long addr,
591 const void *val,
592 unsigned int bytes,
593 struct kvm_vcpu *vcpu);
594
595unsigned long segment_base(u16 selector);
596
d835dfec 597void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a
ZX		 598void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
599 const u8 *new, int bytes);
600int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
601void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
602int kvm_mmu_load(struct kvm_vcpu *vcpu);
603void kvm_mmu_unload(struct kvm_vcpu *vcpu);
0ba73cda 604void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
54f1585a
ZX		 605
606int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
607
608int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
609
3067714c 610int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
a7052897 611void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
34c16eec 612
18552672 613void kvm_enable_tdp(void);
5f4cb662 614void kvm_disable_tdp(void);
18552672 615
a03490ed 616int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a 617int complete_pio(struct kvm_vcpu *vcpu);
ec6d273d
ZX		 618
619static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
620{
621 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
622
623 return (struct kvm_mmu_page *)page_private(page);
624}
625
d6e88aec 626static inline u16 kvm_read_fs(void)
ec6d273d
ZX		 627{
628 u16 seg;
629 asm("mov %%fs, %0" : "=g"(seg));
630 return seg;
631}
632
d6e88aec 633static inline u16 kvm_read_gs(void)
ec6d273d
ZX		 634{
635 u16 seg;
636 asm("mov %%gs, %0" : "=g"(seg));
637 return seg;
638}
639
d6e88aec 640static inline u16 kvm_read_ldt(void)
ec6d273d
ZX		 641{
642 u16 ldt;
643 asm("sldt %0" : "=g"(ldt));
644 return ldt;
645}
646
d6e88aec 647static inline void kvm_load_fs(u16 sel)
ec6d273d
ZX		 648{
649 asm("mov %0, %%fs" : : "rm"(sel));
650}
651
d6e88aec 652static inline void kvm_load_gs(u16 sel)
ec6d273d
ZX		 653{
654 asm("mov %0, %%gs" : : "rm"(sel));
655}
656
d6e88aec 657static inline void kvm_load_ldt(u16 sel)
ec6d273d
ZX		 658{
659 asm("lldt %0" : : "rm"(sel));
660}
ec6d273d 661
d6e88aec 662static inline void kvm_get_idt(struct descriptor_table *table)
ec6d273d
ZX		 663{
664 asm("sidt %0" : "=m"(*table));
665}
666
d6e88aec 667static inline void kvm_get_gdt(struct descriptor_table *table)
ec6d273d
ZX		 668{
669 asm("sgdt %0" : "=m"(*table));
670}
671
d6e88aec 672static inline unsigned long kvm_read_tr_base(void)
ec6d273d
ZX		 673{
674 u16 tr;
675 asm("str %0" : "=g"(tr));
676 return segment_base(tr);
677}
678
679#ifdef CONFIG_X86_64
680static inline unsigned long read_msr(unsigned long msr)
681{
682 u64 value;
683
684 rdmsrl(msr, value);
685 return value;
686}
687#endif
688
d6e88aec 689static inline void kvm_fx_save(struct i387_fxsave_struct *image)
ec6d273d
ZX		 690{
691 asm("fxsave (%0)":: "r" (image));
692}
693
d6e88aec 694static inline void kvm_fx_restore(struct i387_fxsave_struct *image)
ec6d273d
ZX		 695{
696 asm("fxrstor (%0)":: "r" (image));
697}
698
d6e88aec 699static inline void kvm_fx_finit(void)
ec6d273d
ZX		 700{
701 asm("finit");
702}
703
704static inline u32 get_rdx_init_val(void)
705{
706 return 0x600; /* P6 family */
707}
708
c1a5d4f9
AK		 709static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
710{
711 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
712}
713
ec6d273d
ZX		 714#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
715#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
716#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
717#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
718#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
719#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
720#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
721#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
722#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
1439442c 723#define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08"
2384d2b3 724#define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"
ec6d273d
ZX		 725
726#define MSR_IA32_TIME_STAMP_COUNTER 0x010
727
728#define TSS_IOPB_BASE_OFFSET 0x66
729#define TSS_BASE_SIZE 0x68
730#define TSS_IOPB_SIZE (65536 / 8)
731#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP		 732#define RMODE_TSS_SIZE \
733 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 734
37817f29
IE		 735enum {
736 TASK_SWITCH_CALL = 0,
737 TASK_SWITCH_IRET = 1,
738 TASK_SWITCH_JMP = 2,
739 TASK_SWITCH_GATE = 3,
740};
741
4ecac3fd
AK		 742/*
743 * Hardware virtualization extension instructions may fault if a
744 * reboot turns off virtualization while processes are running.
745 * Trap the fault and ignore the instruction if that happens.
746 */
747asmlinkage void kvm_handle_fault_on_reboot(void);
748
749#define __kvm_handle_fault_on_reboot(insn) \
750 "666: " insn "\n\t" \
18b13e54 751 ".pushsection .fixup, \"ax\" \n" \
4ecac3fd 752 "667: \n\t" \
8ceed347 753 __ASM_SIZE(push) " $666b \n\t" \
4ecac3fd
AK		 754 "jmp kvm_handle_fault_on_reboot \n\t" \
755 ".popsection \n\t" \
756 ".pushsection __ex_table, \"a\" \n\t" \
8ceed347 757 _ASM_PTR " 666b, 667b \n\t" \
4ecac3fd
AK		 758 ".popsection"
759
e930bffe
AA		 760#define KVM_ARCH_WANT_MMU_NOTIFIER
761int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
762int kvm_age_hva(struct kvm *kvm, unsigned long hva);
763
1965aae3 764#endif /* _ASM_X86_KVM_HOST_H */
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