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KVM: Wake up waitqueue before calling get_cpu()
[mirror_ubuntu-hirsute-kernel.git] / arch / x86 / include / asm / kvm_host.h
CommitLineData
a656c8ef 1/*
043405e1
CO		 2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
1965aae3
PA		 11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
043405e1 13
34c16eec
ZX		 14#include <linux/types.h>
15#include <linux/mm.h>
e930bffe 16#include <linux/mmu_notifier.h>
34c16eec
ZX		 17
18#include <linux/kvm.h>
19#include <linux/kvm_para.h>
edf88417 20#include <linux/kvm_types.h>
34c16eec 21
50d0a0f9 22#include <asm/pvclock-abi.h>
e01a1b57 23#include <asm/desc.h>
0bed3b56 24#include <asm/mtrr.h>
9962d032 25#include <asm/msr-index.h>
e01a1b57 26
69a9f69b
AK		 27#define KVM_MAX_VCPUS 16
28#define KVM_MEMORY_SLOTS 32
29/* memory slots that does not exposed to userspace */
30#define KVM_PRIVATE_MEM_SLOTS 4
31
32#define KVM_PIO_PAGE_OFFSET 1
542472b5 33#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
69a9f69b 34
cd6e8f87
ZX		 35#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
36#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
7d76b4d3
JP		 37#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
38 0xFFFFFF0000000000ULL)
cd6e8f87 39
7d76b4d3 40#define KVM_GUEST_CR0_MASK \
cd6e8f87
ZX		 41 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
42 | X86_CR0_NW | X86_CR0_CD)
7d76b4d3 43#define KVM_VM_CR0_ALWAYS_ON \
cd6e8f87
ZX		 44 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
45 | X86_CR0_MP)
7d76b4d3 46#define KVM_GUEST_CR4_MASK \
cd6e8f87
ZX		 47 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
48#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
49#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
50
51#define INVALID_PAGE (~(hpa_t)0)
52#define UNMAPPED_GVA (~(gpa_t)0)
53
05da4558
MT		 54/* shadow tables are PAE even on non-PAE hosts */
55#define KVM_HPAGE_SHIFT 21
56#define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT)
57#define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1))
58
59#define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE)
60
cd6e8f87 61#define DE_VECTOR 0
19bd8afd 62#define DB_VECTOR 1
77ab6db0
JK		 63#define BP_VECTOR 3
64#define OF_VECTOR 4
65#define BR_VECTOR 5
cd6e8f87
ZX		 66#define UD_VECTOR 6
67#define NM_VECTOR 7
68#define DF_VECTOR 8
69#define TS_VECTOR 10
70#define NP_VECTOR 11
71#define SS_VECTOR 12
72#define GP_VECTOR 13
73#define PF_VECTOR 14
77ab6db0 74#define MF_VECTOR 16
53371b50 75#define MC_VECTOR 18
cd6e8f87
ZX		 76
77#define SELECTOR_TI_MASK (1 << 2)
78#define SELECTOR_RPL_MASK 0x03
79
80#define IOPL_SHIFT 12
81
d69fb81f
ZX		 82#define KVM_ALIAS_SLOTS 4
83
d657a98e
ZX		 84#define KVM_PERMILLE_MMU_PAGES 20
85#define KVM_MIN_ALLOC_MMU_PAGES 64
1ae0a13d
DE		 86#define KVM_MMU_HASH_SHIFT 10
87#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
d657a98e
ZX		 88#define KVM_MIN_FREE_MMU_PAGES 5
89#define KVM_REFILL_PAGES 25
90#define KVM_MAX_CPUID_ENTRIES 40
0bed3b56 91#define KVM_NR_FIXED_MTRR_REGION 88
9ba075a6 92#define KVM_NR_VAR_MTRR 8
d657a98e 93
e9b11c17
ZX		 94extern spinlock_t kvm_lock;
95extern struct list_head vm_list;
96
d657a98e
ZX		 97struct kvm_vcpu;
98struct kvm;
99
5fdbf976 100enum kvm_reg {
2b3ccfa0
ZX		 101 VCPU_REGS_RAX = 0,
102 VCPU_REGS_RCX = 1,
103 VCPU_REGS_RDX = 2,
104 VCPU_REGS_RBX = 3,
105 VCPU_REGS_RSP = 4,
106 VCPU_REGS_RBP = 5,
107 VCPU_REGS_RSI = 6,
108 VCPU_REGS_RDI = 7,
109#ifdef CONFIG_X86_64
110 VCPU_REGS_R8 = 8,
111 VCPU_REGS_R9 = 9,
112 VCPU_REGS_R10 = 10,
113 VCPU_REGS_R11 = 11,
114 VCPU_REGS_R12 = 12,
115 VCPU_REGS_R13 = 13,
116 VCPU_REGS_R14 = 14,
117 VCPU_REGS_R15 = 15,
118#endif
5fdbf976 119 VCPU_REGS_RIP,
2b3ccfa0
ZX		 120 NR_VCPU_REGS
121};
122
123enum {
81609e3e 124 VCPU_SREG_ES,
2b3ccfa0 125 VCPU_SREG_CS,
81609e3e 126 VCPU_SREG_SS,
2b3ccfa0 127 VCPU_SREG_DS,
2b3ccfa0
ZX		 128 VCPU_SREG_FS,
129 VCPU_SREG_GS,
2b3ccfa0
ZX		 130 VCPU_SREG_TR,
131 VCPU_SREG_LDTR,
132};
133
edf88417 134#include <asm/kvm_x86_emulate.h>
2b3ccfa0 135
d657a98e
ZX		 136#define KVM_NR_MEM_OBJS 40
137
42dbaa5a
JK		 138#define KVM_NR_DB_REGS 4
139
140#define DR6_BD (1 << 13)
141#define DR6_BS (1 << 14)
142#define DR6_FIXED_1 0xffff0ff0
143#define DR6_VOLATILE 0x0000e00f
144
145#define DR7_BP_EN_MASK 0x000000ff
146#define DR7_GE (1 << 9)
147#define DR7_GD (1 << 13)
148#define DR7_FIXED_1 0x00000400
149#define DR7_VOLATILE 0xffff23ff
150
d657a98e
ZX		 151/*
152 * We don't want allocation failures within the mmu code, so we preallocate
153 * enough memory for a single page fault in a cache.
154 */
155struct kvm_mmu_memory_cache {
156 int nobjs;
157 void *objects[KVM_NR_MEM_OBJS];
158};
159
160#define NR_PTE_CHAIN_ENTRIES 5
161
162struct kvm_pte_chain {
163 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
164 struct hlist_node link;
165};
166
167/*
168 * kvm_mmu_page_role, below, is defined as:
169 *
170 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
171 * bits 4:7 - page table level for this shadow (1-4)
172 * bits 8:9 - page table quadrant for 2-level guests
f6e2c02b
AK		 173 * bit 16 - direct mapping of virtual to physical mapping at gfn
174 * used for real mode and two-dimensional paging
d657a98e
ZX		 175 * bits 17:19 - common access permissions for all ptes in this shadow page
176 */
177union kvm_mmu_page_role {
178 unsigned word;
179 struct {
7d76b4d3
JP		 180 unsigned glevels:4;
181 unsigned level:4;
182 unsigned quadrant:2;
183 unsigned pad_for_nice_hex_output:6;
f6e2c02b 184 unsigned direct:1;
7d76b4d3 185 unsigned access:3;
2e53d63a 186 unsigned invalid:1;
2f0b3d60 187 unsigned cr4_pge:1;
9645bb56 188 unsigned nxe:1;
d657a98e
ZX		 189 };
190};
191
192struct kvm_mmu_page {
193 struct list_head link;
194 struct hlist_node hash_link;
195
6cffe8ca
MT		 196 struct list_head oos_link;
197
d657a98e
ZX		 198 /*
199 * The following two entries are used to key the shadow page in the
200 * hash table.
201 */
202 gfn_t gfn;
203 union kvm_mmu_page_role role;
204
205 u64 *spt;
206 /* hold the gfn of each spte inside spt */
207 gfn_t *gfns;
291f26bc
SY		 208 /*
209 * One bit set per slot which has memory
210 * in this shadow page.
211 */
212 DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
d657a98e
ZX		 213 int multimapped; /* More than one parent_pte? */
214 int root_count; /* Currently serving as active root */
4731d4c7 215 bool unsync;
60c8aec6 216 unsigned int unsync_children;
d657a98e
ZX		 217 union {
218 u64 *parent_pte; /* !multimapped */
219 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
220 };
0074ff63 221 DECLARE_BITMAP(unsync_child_bitmap, 512);
d657a98e
ZX		 222};
223
6ad18fba
DH		 224struct kvm_pv_mmu_op_buffer {
225 void *ptr;
226 unsigned len;
227 unsigned processed;
228 char buf[512] __aligned(sizeof(long));
229};
230
1c08364c
AK		 231struct kvm_pio_request {
232 unsigned long count;
233 int cur_count;
234 gva_t guest_gva;
235 int in;
236 int port;
237 int size;
238 int string;
239 int down;
240 int rep;
241};
242
d657a98e
ZX		 243/*
244 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
245 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
246 * mode.
247 */
248struct kvm_mmu {
249 void (*new_cr3)(struct kvm_vcpu *vcpu);
250 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
251 void (*free)(struct kvm_vcpu *vcpu);
252 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
253 void (*prefetch_page)(struct kvm_vcpu *vcpu,
254 struct kvm_mmu_page *page);
e8bc217a
MT		 255 int (*sync_page)(struct kvm_vcpu *vcpu,
256 struct kvm_mmu_page *sp);
a7052897 257 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
d657a98e
ZX		 258 hpa_t root_hpa;
259 int root_level;
260 int shadow_root_level;
a770f6f2 261 union kvm_mmu_page_role base_role;
d657a98e
ZX		 262
263 u64 *pae_root;
82725b20 264 u64 rsvd_bits_mask[2][4];
d657a98e
ZX		 265};
266
ad312c7c 267struct kvm_vcpu_arch {
34c16eec 268 u64 host_tsc;
34c16eec
ZX		 269 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
270 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
5fdbf976
MT		 271 /*
272 * rip and regs accesses must go through
273 * kvm_{register,rip}_{read,write} functions.
274 */
275 unsigned long regs[NR_VCPU_REGS];
276 u32 regs_avail;
277 u32 regs_dirty;
34c16eec
ZX		 278
279 unsigned long cr0;
280 unsigned long cr2;
281 unsigned long cr3;
282 unsigned long cr4;
283 unsigned long cr8;
1371d904 284 u32 hflags;
34c16eec
ZX		 285 u64 pdptrs[4]; /* pae */
286 u64 shadow_efer;
287 u64 apic_base;
288 struct kvm_lapic *apic; /* kernel irqchip context */
e1035715 289 int32_t apic_arb_prio;
34c16eec
ZX		 290 int mp_state;
291 int sipi_vector;
292 u64 ia32_misc_enable_msr;
b209749f 293 bool tpr_access_reporting;
34c16eec
ZX		 294
295 struct kvm_mmu mmu;
6ad18fba
DH		 296 /* only needed in kvm_pv_mmu_op() path, but it's hot so
297 * put it here to avoid allocation */
298 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
34c16eec
ZX		 299
300 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
301 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
302 struct kvm_mmu_memory_cache mmu_page_cache;
303 struct kvm_mmu_memory_cache mmu_page_header_cache;
304
305 gfn_t last_pt_write_gfn;
306 int last_pt_write_count;
307 u64 *last_pte_updated;
1b7fcd32 308 gfn_t last_pte_gfn;
34c16eec 309
d7824fff 310 struct {
35149e21
AL		 311 gfn_t gfn; /* presumed gfn during guest pte update */
312 pfn_t pfn; /* pfn corresponding to that gfn */
05da4558 313 int largepage;
e930bffe 314 unsigned long mmu_seq;
d7824fff
AK		 315 } update_pte;
316
34c16eec
ZX		 317 struct i387_fxsave_struct host_fx_image;
318 struct i387_fxsave_struct guest_fx_image;
319
320 gva_t mmio_fault_cr2;
321 struct kvm_pio_request pio;
322 void *pio_data;
323
298101da
AK		 324 struct kvm_queued_exception {
325 bool pending;
326 bool has_error_code;
327 u8 nr;
328 u32 error_code;
329 } exception;
330
937a7eae
AK		 331 struct kvm_queued_interrupt {
332 bool pending;
333 u8 nr;
334 } interrupt;
335
34c16eec
ZX		 336 struct {
337 int active;
338 u8 save_iopl;
339 struct kvm_save_segment {
340 u16 selector;
341 unsigned long base;
342 u32 limit;
343 u32 ar;
344 } tr, es, ds, fs, gs;
345 } rmode;
346 int halt_request; /* real mode on Intel only */
347
348 int cpuid_nent;
07716717 349 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
34c16eec
ZX		 350 /* emulate context */
351
352 struct x86_emulate_ctxt emulate_ctxt;
18068523
GOC		 353
354 gpa_t time;
50d0a0f9
GH		 355 struct pvclock_vcpu_time_info hv_clock;
356 unsigned int hv_clock_tsc_khz;
18068523
GOC		 357 unsigned int time_offset;
358 struct page *time_page;
3419ffc8
SY		 359
360 bool nmi_pending;
668f612f 361 bool nmi_injected;
9ba075a6 362
0bed3b56
SY		 363 struct mtrr_state_type mtrr_state;
364 u32 pat;
42dbaa5a
JK		 365
366 int switch_db_regs;
367 unsigned long host_db[KVM_NR_DB_REGS];
368 unsigned long host_dr6;
369 unsigned long host_dr7;
370 unsigned long db[KVM_NR_DB_REGS];
371 unsigned long dr6;
372 unsigned long dr7;
373 unsigned long eff_db[KVM_NR_DB_REGS];
34c16eec
ZX		 374};
375
d69fb81f
ZX		 376struct kvm_mem_alias {
377 gfn_t base_gfn;
378 unsigned long npages;
379 gfn_t target_gfn;
380};
381
382struct kvm_arch{
383 int naliases;
384 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
f05e70ac
ZX		 385
386 unsigned int n_free_mmu_pages;
387 unsigned int n_requested_mmu_pages;
388 unsigned int n_alloc_mmu_pages;
389 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
390 /*
391 * Hash table of struct kvm_mmu_page.
392 */
393 struct list_head active_mmu_pages;
4d5c5d0f 394 struct list_head assigned_dev_head;
19de40a8 395 struct iommu_domain *iommu_domain;
d7deeeb0
ZX		 396 struct kvm_pic *vpic;
397 struct kvm_ioapic *vioapic;
7837699f 398 struct kvm_pit *vpit;
564f1537 399 struct hlist_head irq_ack_notifier_list;
cc6e462c 400 int vapics_in_nmi_mode;
bfc6d222 401
bfc6d222
ZX		 402 unsigned int tss_addr;
403 struct page *apic_access_page;
18068523
GOC		 404
405 gpa_t wall_clock;
b7ebfb05
SY		 406
407 struct page *ept_identity_pagetable;
408 bool ept_identity_pagetable_done;
5550af4d
SY		 409
410 unsigned long irq_sources_bitmap;
411 unsigned long irq_states[KVM_IOAPIC_NUM_PINS];
53f658b3 412 u64 vm_init_tsc;
d69fb81f
ZX		 413};
414
0711456c
ZX		 415struct kvm_vm_stat {
416 u32 mmu_shadow_zapped;
417 u32 mmu_pte_write;
418 u32 mmu_pte_updated;
419 u32 mmu_pde_zapped;
420 u32 mmu_flooded;
421 u32 mmu_recycled;
dfc5aa00 422 u32 mmu_cache_miss;
4731d4c7 423 u32 mmu_unsync;
0711456c 424 u32 remote_tlb_flush;
05da4558 425 u32 lpages;
0711456c
ZX		 426};
427
77b4c255
ZX		 428struct kvm_vcpu_stat {
429 u32 pf_fixed;
430 u32 pf_guest;
431 u32 tlb_flush;
432 u32 invlpg;
433
434 u32 exits;
435 u32 io_exits;
436 u32 mmio_exits;
437 u32 signal_exits;
438 u32 irq_window_exits;
f08864b4 439 u32 nmi_window_exits;
77b4c255
ZX		 440 u32 halt_exits;
441 u32 halt_wakeup;
442 u32 request_irq_exits;
c4abb7c9 443 u32 request_nmi_exits;
77b4c255
ZX		 444 u32 irq_exits;
445 u32 host_state_reload;
446 u32 efer_reload;
447 u32 fpu_reload;
448 u32 insn_emulation;
449 u32 insn_emulation_fail;
f11c3a8d 450 u32 hypercalls;
fa89a817 451 u32 irq_injections;
c4abb7c9 452 u32 nmi_injections;
77b4c255 453};
ad312c7c 454
e01a1b57
HB		 455struct descriptor_table {
456 u16 limit;
457 unsigned long base;
458} __attribute__((packed));
459
ea4a5ff8
ZX		 460struct kvm_x86_ops {
461 int (*cpu_has_kvm_support)(void); /* __init */
462 int (*disabled_by_bios)(void); /* __init */
463 void (*hardware_enable)(void *dummy); /* __init */
464 void (*hardware_disable)(void *dummy);
465 void (*check_processor_compatibility)(void *rtn);
466 int (*hardware_setup)(void); /* __init */
467 void (*hardware_unsetup)(void); /* __exit */
774ead3a 468 bool (*cpu_has_accelerated_tpr)(void);
ea4a5ff8
ZX		 469
470 /* Create, but do not attach this VCPU */
471 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
472 void (*vcpu_free)(struct kvm_vcpu *vcpu);
473 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
474
475 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
476 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
477 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 478
479 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
d0bfb940 480 struct kvm_guest_debug *dbg);
ea4a5ff8
ZX		 481 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
482 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
483 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
484 void (*get_segment)(struct kvm_vcpu *vcpu,
485 struct kvm_segment *var, int seg);
2e4d2653 486 int (*get_cpl)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 487 void (*set_segment)(struct kvm_vcpu *vcpu,
488 struct kvm_segment *var, int seg);
489 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
490 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
491 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
492 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
493 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
494 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
495 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
496 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
497 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
498 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
499 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
500 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
501 int *exception);
5fdbf976 502 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
ea4a5ff8
ZX		 503 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
504 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
505
506 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 507
ea4a5ff8
ZX		 508 void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
509 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
510 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
511 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
512 unsigned char *hypercall_addr);
ea4a5ff8 513 void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
95ba8273 514 void (*set_nmi)(struct kvm_vcpu *vcpu);
298101da
AK		 515 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
516 bool has_error_code, u32 error_code);
78646121 517 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
95ba8273
GN		 518 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
519 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
520 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
521 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
522 void (*drop_interrupt_shadow)(struct kvm_vcpu *vcpu);
ea4a5ff8 523 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 524 int (*get_tdp_level)(void);
64d4d521 525 int (*get_mt_mask_shift)(void);
ea4a5ff8
ZX		 526};
527
97896d04
ZX		 528extern struct kvm_x86_ops *kvm_x86_ops;
529
54f1585a
ZX		 530int kvm_mmu_module_init(void);
531void kvm_mmu_module_exit(void);
532
533void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
534int kvm_mmu_create(struct kvm_vcpu *vcpu);
535int kvm_mmu_setup(struct kvm_vcpu *vcpu);
536void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e
SY		 537void kvm_mmu_set_base_ptes(u64 base_pte);
538void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 539 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask);
54f1585a
ZX		 540
541int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
542void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
543void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 544unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a
ZX		 545void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
546
cc4b6871
JR		 547int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
548
3200f405 549int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 550 const void *val, int bytes);
2f333bcb
MT		 551int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
552 gpa_t addr, unsigned long *ret);
553
554extern bool tdp_enabled;
9f811285 555
54f1585a
ZX		 556enum emulation_result {
557 EMULATE_DONE, /* no further processing */
558 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
559 EMULATE_FAIL, /* can't emulate this instruction */
560};
561
571008da
SY		 562#define EMULTYPE_NO_DECODE (1 << 0)
563#define EMULTYPE_TRAP_UD (1 << 1)
ba8afb6b 564#define EMULTYPE_SKIP (1 << 2)
54f1585a 565int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
571008da 566 unsigned long cr2, u16 error_code, int emulation_type);
54f1585a
ZX		 567void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
568void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
569void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
570void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
571 unsigned long *rflags);
572
573unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
574void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
575 unsigned long *rflags);
f2b4b7dd 576void kvm_enable_efer_bits(u64);
54f1585a
ZX		 577int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
578int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
579
580struct x86_emulate_ctxt;
581
582int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
583 int size, unsigned port);
584int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
585 int size, unsigned long count, int down,
586 gva_t address, int rep, unsigned port);
587void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
588int kvm_emulate_halt(struct kvm_vcpu *vcpu);
589int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
590int emulate_clts(struct kvm_vcpu *vcpu);
591int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
592 unsigned long *dest);
593int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
594 unsigned long value);
595
3e6e0aab
GT		 596void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
597int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
598 int type_bits, int seg);
599
37817f29
IE		 600int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
601
2d3ad1f4 602void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
9c20456a
JR		 603void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
604void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
605void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2d3ad1f4
AK		 606unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
607void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a
ZX		 608void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
609
610int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
611int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
612
298101da
AK		 613void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
614void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee
AK		 615void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
616 u32 error_code);
298101da 617
4925663a 618int kvm_pic_set_irq(void *opaque, int irq, int level);
3de42dc0 619
3419ffc8
SY		 620void kvm_inject_nmi(struct kvm_vcpu *vcpu);
621
54f1585a
ZX		 622void fx_init(struct kvm_vcpu *vcpu);
623
54f1585a
ZX		 624int emulator_write_emulated(unsigned long addr,
625 const void *val,
626 unsigned int bytes,
627 struct kvm_vcpu *vcpu);
628
629unsigned long segment_base(u16 selector);
630
d835dfec 631void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a 632void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT		 633 const u8 *new, int bytes,
634 bool guest_initiated);
54f1585a
ZX		 635int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
636void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
637int kvm_mmu_load(struct kvm_vcpu *vcpu);
638void kvm_mmu_unload(struct kvm_vcpu *vcpu);
0ba73cda 639void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
54f1585a
ZX		 640
641int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
642
643int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
644
3067714c 645int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
a7052897 646void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
34c16eec 647
18552672 648void kvm_enable_tdp(void);
5f4cb662 649void kvm_disable_tdp(void);
18552672 650
a03490ed 651int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a 652int complete_pio(struct kvm_vcpu *vcpu);
ec6d273d 653
2843099f
IE		 654struct kvm_memory_slot *gfn_to_memslot_unaliased(struct kvm *kvm, gfn_t gfn);
655
ec6d273d
ZX		 656static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
657{
658 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
659
660 return (struct kvm_mmu_page *)page_private(page);
661}
662
d6e88aec 663static inline u16 kvm_read_fs(void)
ec6d273d
ZX		 664{
665 u16 seg;
666 asm("mov %%fs, %0" : "=g"(seg));
667 return seg;
668}
669
d6e88aec 670static inline u16 kvm_read_gs(void)
ec6d273d
ZX		 671{
672 u16 seg;
673 asm("mov %%gs, %0" : "=g"(seg));
674 return seg;
675}
676
d6e88aec 677static inline u16 kvm_read_ldt(void)
ec6d273d
ZX		 678{
679 u16 ldt;
680 asm("sldt %0" : "=g"(ldt));
681 return ldt;
682}
683
d6e88aec 684static inline void kvm_load_fs(u16 sel)
ec6d273d
ZX		 685{
686 asm("mov %0, %%fs" : : "rm"(sel));
687}
688
d6e88aec 689static inline void kvm_load_gs(u16 sel)
ec6d273d
ZX		 690{
691 asm("mov %0, %%gs" : : "rm"(sel));
692}
693
d6e88aec 694static inline void kvm_load_ldt(u16 sel)
ec6d273d
ZX		 695{
696 asm("lldt %0" : : "rm"(sel));
697}
ec6d273d 698
d6e88aec 699static inline void kvm_get_idt(struct descriptor_table *table)
ec6d273d
ZX		 700{
701 asm("sidt %0" : "=m"(*table));
702}
703
d6e88aec 704static inline void kvm_get_gdt(struct descriptor_table *table)
ec6d273d
ZX		 705{
706 asm("sgdt %0" : "=m"(*table));
707}
708
d6e88aec 709static inline unsigned long kvm_read_tr_base(void)
ec6d273d
ZX		 710{
711 u16 tr;
712 asm("str %0" : "=g"(tr));
713 return segment_base(tr);
714}
715
716#ifdef CONFIG_X86_64
717static inline unsigned long read_msr(unsigned long msr)
718{
719 u64 value;
720
721 rdmsrl(msr, value);
722 return value;
723}
724#endif
725
d6e88aec 726static inline void kvm_fx_save(struct i387_fxsave_struct *image)
ec6d273d
ZX		 727{
728 asm("fxsave (%0)":: "r" (image));
729}
730
d6e88aec 731static inline void kvm_fx_restore(struct i387_fxsave_struct *image)
ec6d273d
ZX		 732{
733 asm("fxrstor (%0)":: "r" (image));
734}
735
d6e88aec 736static inline void kvm_fx_finit(void)
ec6d273d
ZX		 737{
738 asm("finit");
739}
740
741static inline u32 get_rdx_init_val(void)
742{
743 return 0x600; /* P6 family */
744}
745
c1a5d4f9
AK		 746static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
747{
748 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
749}
750
ec6d273d
ZX		 751#define MSR_IA32_TIME_STAMP_COUNTER 0x010
752
753#define TSS_IOPB_BASE_OFFSET 0x66
754#define TSS_BASE_SIZE 0x68
755#define TSS_IOPB_SIZE (65536 / 8)
756#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP		 757#define RMODE_TSS_SIZE \
758 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 759
37817f29
IE		 760enum {
761 TASK_SWITCH_CALL = 0,
762 TASK_SWITCH_IRET = 1,
763 TASK_SWITCH_JMP = 2,
764 TASK_SWITCH_GATE = 3,
765};
766
1371d904 767#define HF_GIF_MASK (1 << 0)
3d6368ef
AG		 768#define HF_HIF_MASK (1 << 1)
769#define HF_VINTR_MASK (1 << 2)
95ba8273 770#define HF_NMI_MASK (1 << 3)
1371d904 771
4ecac3fd
AK		 772/*
773 * Hardware virtualization extension instructions may fault if a
774 * reboot turns off virtualization while processes are running.
775 * Trap the fault and ignore the instruction if that happens.
776 */
777asmlinkage void kvm_handle_fault_on_reboot(void);
778
779#define __kvm_handle_fault_on_reboot(insn) \
780 "666: " insn "\n\t" \
18b13e54 781 ".pushsection .fixup, \"ax\" \n" \
4ecac3fd 782 "667: \n\t" \
8ceed347 783 __ASM_SIZE(push) " $666b \n\t" \
4ecac3fd
AK		 784 "jmp kvm_handle_fault_on_reboot \n\t" \
785 ".popsection \n\t" \
786 ".pushsection __ex_table, \"a\" \n\t" \
8ceed347 787 _ASM_PTR " 666b, 667b \n\t" \
4ecac3fd
AK		 788 ".popsection"
789
e930bffe
AA		 790#define KVM_ARCH_WANT_MMU_NOTIFIER
791int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
792int kvm_age_hva(struct kvm *kvm, unsigned long hva);
82725b20 793int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
e930bffe 794
1965aae3 795#endif /* _ASM_X86_KVM_HOST_H */
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