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KVM: Fix mov cr4 #GP at wrong instruction
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a656c8ef 1/*
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2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
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11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
043405e1 13
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14#include <linux/types.h>
15#include <linux/mm.h>
e930bffe 16#include <linux/mmu_notifier.h>
229456fc 17#include <linux/tracepoint.h>
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18
19#include <linux/kvm.h>
20#include <linux/kvm_para.h>
edf88417 21#include <linux/kvm_types.h>
34c16eec 22
50d0a0f9 23#include <asm/pvclock-abi.h>
e01a1b57 24#include <asm/desc.h>
0bed3b56 25#include <asm/mtrr.h>
9962d032 26#include <asm/msr-index.h>
e01a1b57 27
0680fe52 28#define KVM_MAX_VCPUS 64
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29#define KVM_MEMORY_SLOTS 32
30/* memory slots that does not exposed to userspace */
31#define KVM_PRIVATE_MEM_SLOTS 4
32
33#define KVM_PIO_PAGE_OFFSET 1
542472b5 34#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
69a9f69b 35
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36#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
37#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
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38#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
39 0xFFFFFF0000000000ULL)
cd6e8f87 40
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41#define INVALID_PAGE (~(hpa_t)0)
42#define UNMAPPED_GVA (~(gpa_t)0)
43
ec04b260 44/* KVM Hugepage definitions for x86 */
04326caa 45#define KVM_NR_PAGE_SIZES 3
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46#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + (((x) - 1) * 9))
47#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
48#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
49#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
05da4558 50
cd6e8f87 51#define DE_VECTOR 0
19bd8afd 52#define DB_VECTOR 1
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53#define BP_VECTOR 3
54#define OF_VECTOR 4
55#define BR_VECTOR 5
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56#define UD_VECTOR 6
57#define NM_VECTOR 7
58#define DF_VECTOR 8
59#define TS_VECTOR 10
60#define NP_VECTOR 11
61#define SS_VECTOR 12
62#define GP_VECTOR 13
63#define PF_VECTOR 14
77ab6db0 64#define MF_VECTOR 16
53371b50 65#define MC_VECTOR 18
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66
67#define SELECTOR_TI_MASK (1 << 2)
68#define SELECTOR_RPL_MASK 0x03
69
70#define IOPL_SHIFT 12
71
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72#define KVM_ALIAS_SLOTS 4
73
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74#define KVM_PERMILLE_MMU_PAGES 20
75#define KVM_MIN_ALLOC_MMU_PAGES 64
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76#define KVM_MMU_HASH_SHIFT 10
77#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
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78#define KVM_MIN_FREE_MMU_PAGES 5
79#define KVM_REFILL_PAGES 25
80#define KVM_MAX_CPUID_ENTRIES 40
0bed3b56 81#define KVM_NR_FIXED_MTRR_REGION 88
9ba075a6 82#define KVM_NR_VAR_MTRR 8
d657a98e 83
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84extern spinlock_t kvm_lock;
85extern struct list_head vm_list;
86
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87struct kvm_vcpu;
88struct kvm;
89
5fdbf976 90enum kvm_reg {
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91 VCPU_REGS_RAX = 0,
92 VCPU_REGS_RCX = 1,
93 VCPU_REGS_RDX = 2,
94 VCPU_REGS_RBX = 3,
95 VCPU_REGS_RSP = 4,
96 VCPU_REGS_RBP = 5,
97 VCPU_REGS_RSI = 6,
98 VCPU_REGS_RDI = 7,
99#ifdef CONFIG_X86_64
100 VCPU_REGS_R8 = 8,
101 VCPU_REGS_R9 = 9,
102 VCPU_REGS_R10 = 10,
103 VCPU_REGS_R11 = 11,
104 VCPU_REGS_R12 = 12,
105 VCPU_REGS_R13 = 13,
106 VCPU_REGS_R14 = 14,
107 VCPU_REGS_R15 = 15,
108#endif
5fdbf976 109 VCPU_REGS_RIP,
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110 NR_VCPU_REGS
111};
112
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113enum kvm_reg_ex {
114 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
115};
116
2b3ccfa0 117enum {
81609e3e 118 VCPU_SREG_ES,
2b3ccfa0 119 VCPU_SREG_CS,
81609e3e 120 VCPU_SREG_SS,
2b3ccfa0 121 VCPU_SREG_DS,
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122 VCPU_SREG_FS,
123 VCPU_SREG_GS,
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124 VCPU_SREG_TR,
125 VCPU_SREG_LDTR,
126};
127
56e82318 128#include <asm/kvm_emulate.h>
2b3ccfa0 129
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130#define KVM_NR_MEM_OBJS 40
131
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132#define KVM_NR_DB_REGS 4
133
134#define DR6_BD (1 << 13)
135#define DR6_BS (1 << 14)
136#define DR6_FIXED_1 0xffff0ff0
137#define DR6_VOLATILE 0x0000e00f
138
139#define DR7_BP_EN_MASK 0x000000ff
140#define DR7_GE (1 << 9)
141#define DR7_GD (1 << 13)
142#define DR7_FIXED_1 0x00000400
143#define DR7_VOLATILE 0xffff23ff
144
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145/*
146 * We don't want allocation failures within the mmu code, so we preallocate
147 * enough memory for a single page fault in a cache.
148 */
149struct kvm_mmu_memory_cache {
150 int nobjs;
151 void *objects[KVM_NR_MEM_OBJS];
152};
153
154#define NR_PTE_CHAIN_ENTRIES 5
155
156struct kvm_pte_chain {
157 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
158 struct hlist_node link;
159};
160
161/*
162 * kvm_mmu_page_role, below, is defined as:
163 *
164 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
165 * bits 4:7 - page table level for this shadow (1-4)
166 * bits 8:9 - page table quadrant for 2-level guests
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167 * bit 16 - direct mapping of virtual to physical mapping at gfn
168 * used for real mode and two-dimensional paging
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169 * bits 17:19 - common access permissions for all ptes in this shadow page
170 */
171union kvm_mmu_page_role {
172 unsigned word;
173 struct {
7d76b4d3 174 unsigned level:4;
5b7e0102 175 unsigned cr4_pae:1;
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176 unsigned quadrant:2;
177 unsigned pad_for_nice_hex_output:6;
f6e2c02b 178 unsigned direct:1;
7d76b4d3 179 unsigned access:3;
2e53d63a 180 unsigned invalid:1;
9645bb56 181 unsigned nxe:1;
3dbe1415 182 unsigned cr0_wp:1;
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183 };
184};
185
186struct kvm_mmu_page {
187 struct list_head link;
188 struct hlist_node hash_link;
189
190 /*
191 * The following two entries are used to key the shadow page in the
192 * hash table.
193 */
194 gfn_t gfn;
195 union kvm_mmu_page_role role;
196
197 u64 *spt;
198 /* hold the gfn of each spte inside spt */
199 gfn_t *gfns;
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200 /*
201 * One bit set per slot which has memory
202 * in this shadow page.
203 */
204 DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
0571d366 205 bool multimapped; /* More than one parent_pte? */
4731d4c7 206 bool unsync;
0571d366 207 int root_count; /* Currently serving as active root */
60c8aec6 208 unsigned int unsync_children;
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209 union {
210 u64 *parent_pte; /* !multimapped */
211 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
212 };
0074ff63 213 DECLARE_BITMAP(unsync_child_bitmap, 512);
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214};
215
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216struct kvm_pv_mmu_op_buffer {
217 void *ptr;
218 unsigned len;
219 unsigned processed;
220 char buf[512] __aligned(sizeof(long));
221};
222
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223struct kvm_pio_request {
224 unsigned long count;
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225 int in;
226 int port;
227 int size;
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228};
229
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230/*
231 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
232 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
233 * mode.
234 */
235struct kvm_mmu {
236 void (*new_cr3)(struct kvm_vcpu *vcpu);
237 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
238 void (*free)(struct kvm_vcpu *vcpu);
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239 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
240 u32 *error);
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241 void (*prefetch_page)(struct kvm_vcpu *vcpu,
242 struct kvm_mmu_page *page);
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243 int (*sync_page)(struct kvm_vcpu *vcpu,
244 struct kvm_mmu_page *sp);
a7052897 245 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
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246 hpa_t root_hpa;
247 int root_level;
248 int shadow_root_level;
a770f6f2 249 union kvm_mmu_page_role base_role;
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250
251 u64 *pae_root;
82725b20 252 u64 rsvd_bits_mask[2][4];
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253};
254
ad312c7c 255struct kvm_vcpu_arch {
34c16eec 256 u64 host_tsc;
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257 /*
258 * rip and regs accesses must go through
259 * kvm_{register,rip}_{read,write} functions.
260 */
261 unsigned long regs[NR_VCPU_REGS];
262 u32 regs_avail;
263 u32 regs_dirty;
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264
265 unsigned long cr0;
e8467fda 266 unsigned long cr0_guest_owned_bits;
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267 unsigned long cr2;
268 unsigned long cr3;
269 unsigned long cr4;
fc78f519 270 unsigned long cr4_guest_owned_bits;
34c16eec 271 unsigned long cr8;
1371d904 272 u32 hflags;
34c16eec 273 u64 pdptrs[4]; /* pae */
f6801dff 274 u64 efer;
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275 u64 apic_base;
276 struct kvm_lapic *apic; /* kernel irqchip context */
e1035715 277 int32_t apic_arb_prio;
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278 int mp_state;
279 int sipi_vector;
280 u64 ia32_misc_enable_msr;
b209749f 281 bool tpr_access_reporting;
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282
283 struct kvm_mmu mmu;
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284 /* only needed in kvm_pv_mmu_op() path, but it's hot so
285 * put it here to avoid allocation */
286 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
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287
288 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
289 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
290 struct kvm_mmu_memory_cache mmu_page_cache;
291 struct kvm_mmu_memory_cache mmu_page_header_cache;
292
293 gfn_t last_pt_write_gfn;
294 int last_pt_write_count;
295 u64 *last_pte_updated;
1b7fcd32 296 gfn_t last_pte_gfn;
34c16eec 297
d7824fff 298 struct {
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299 gfn_t gfn; /* presumed gfn during guest pte update */
300 pfn_t pfn; /* pfn corresponding to that gfn */
e930bffe 301 unsigned long mmu_seq;
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302 } update_pte;
303
98918833 304 struct fpu guest_fpu;
2acf923e 305 u64 xcr0;
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306
307 gva_t mmio_fault_cr2;
308 struct kvm_pio_request pio;
309 void *pio_data;
310
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311 u8 event_exit_inst_len;
312
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313 struct kvm_queued_exception {
314 bool pending;
315 bool has_error_code;
ce7ddec4 316 bool reinject;
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317 u8 nr;
318 u32 error_code;
319 } exception;
320
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321 struct kvm_queued_interrupt {
322 bool pending;
66fd3f7f 323 bool soft;
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324 u8 nr;
325 } interrupt;
326
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327 int halt_request; /* real mode on Intel only */
328
329 int cpuid_nent;
07716717 330 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
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331 /* emulate context */
332
333 struct x86_emulate_ctxt emulate_ctxt;
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334
335 gpa_t time;
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336 struct pvclock_vcpu_time_info hv_clock;
337 unsigned int hv_clock_tsc_khz;
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338 unsigned int time_offset;
339 struct page *time_page;
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340
341 bool nmi_pending;
668f612f 342 bool nmi_injected;
9ba075a6 343
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344 struct mtrr_state_type mtrr_state;
345 u32 pat;
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346
347 int switch_db_regs;
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348 unsigned long db[KVM_NR_DB_REGS];
349 unsigned long dr6;
350 unsigned long dr7;
351 unsigned long eff_db[KVM_NR_DB_REGS];
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352
353 u64 mcg_cap;
354 u64 mcg_status;
355 u64 mcg_ctl;
356 u64 *mce_banks;
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357
358 /* used for guest single stepping over the given code position */
94fe45da 359 unsigned long singlestep_rip;
f92653ee 360
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361 /* fields used by HYPER-V emulation */
362 u64 hv_vapic;
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363};
364
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365struct kvm_mem_alias {
366 gfn_t base_gfn;
367 unsigned long npages;
368 gfn_t target_gfn;
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369#define KVM_ALIAS_INVALID 1UL
370 unsigned long flags;
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371};
372
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373#define KVM_ARCH_HAS_UNALIAS_INSTANTIATION
374
fef9cce0 375struct kvm_mem_aliases {
d69fb81f 376 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
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377 int naliases;
378};
379
380struct kvm_arch {
381 struct kvm_mem_aliases *aliases;
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382
383 unsigned int n_free_mmu_pages;
384 unsigned int n_requested_mmu_pages;
385 unsigned int n_alloc_mmu_pages;
08e850c6 386 atomic_t invlpg_counter;
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387 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
388 /*
389 * Hash table of struct kvm_mmu_page.
390 */
391 struct list_head active_mmu_pages;
4d5c5d0f 392 struct list_head assigned_dev_head;
19de40a8 393 struct iommu_domain *iommu_domain;
522c68c4 394 int iommu_flags;
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395 struct kvm_pic *vpic;
396 struct kvm_ioapic *vioapic;
7837699f 397 struct kvm_pit *vpit;
cc6e462c 398 int vapics_in_nmi_mode;
bfc6d222 399
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400 unsigned int tss_addr;
401 struct page *apic_access_page;
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402
403 gpa_t wall_clock;
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404
405 struct page *ept_identity_pagetable;
406 bool ept_identity_pagetable_done;
b927a3ce 407 gpa_t ept_identity_map_addr;
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408
409 unsigned long irq_sources_bitmap;
53f658b3 410 u64 vm_init_tsc;
afbcf7ab 411 s64 kvmclock_offset;
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412
413 struct kvm_xen_hvm_config xen_hvm_config;
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414
415 /* fields used by HYPER-V emulation */
416 u64 hv_guest_os_id;
417 u64 hv_hypercall;
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418};
419
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420struct kvm_vm_stat {
421 u32 mmu_shadow_zapped;
422 u32 mmu_pte_write;
423 u32 mmu_pte_updated;
424 u32 mmu_pde_zapped;
425 u32 mmu_flooded;
426 u32 mmu_recycled;
dfc5aa00 427 u32 mmu_cache_miss;
4731d4c7 428 u32 mmu_unsync;
0711456c 429 u32 remote_tlb_flush;
05da4558 430 u32 lpages;
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431};
432
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433struct kvm_vcpu_stat {
434 u32 pf_fixed;
435 u32 pf_guest;
436 u32 tlb_flush;
437 u32 invlpg;
438
439 u32 exits;
440 u32 io_exits;
441 u32 mmio_exits;
442 u32 signal_exits;
443 u32 irq_window_exits;
f08864b4 444 u32 nmi_window_exits;
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445 u32 halt_exits;
446 u32 halt_wakeup;
447 u32 request_irq_exits;
448 u32 irq_exits;
449 u32 host_state_reload;
450 u32 efer_reload;
451 u32 fpu_reload;
452 u32 insn_emulation;
453 u32 insn_emulation_fail;
f11c3a8d 454 u32 hypercalls;
fa89a817 455 u32 irq_injections;
c4abb7c9 456 u32 nmi_injections;
77b4c255 457};
ad312c7c 458
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459struct kvm_x86_ops {
460 int (*cpu_has_kvm_support)(void); /* __init */
461 int (*disabled_by_bios)(void); /* __init */
10474ae8 462 int (*hardware_enable)(void *dummy);
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463 void (*hardware_disable)(void *dummy);
464 void (*check_processor_compatibility)(void *rtn);
465 int (*hardware_setup)(void); /* __init */
466 void (*hardware_unsetup)(void); /* __exit */
774ead3a 467 bool (*cpu_has_accelerated_tpr)(void);
0e851880 468 void (*cpuid_update)(struct kvm_vcpu *vcpu);
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469
470 /* Create, but do not attach this VCPU */
471 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
472 void (*vcpu_free)(struct kvm_vcpu *vcpu);
473 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
474
475 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
476 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
477 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8 478
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479 void (*set_guest_debug)(struct kvm_vcpu *vcpu,
480 struct kvm_guest_debug *dbg);
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481 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
482 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
483 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
484 void (*get_segment)(struct kvm_vcpu *vcpu,
485 struct kvm_segment *var, int seg);
2e4d2653 486 int (*get_cpl)(struct kvm_vcpu *vcpu);
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487 void (*set_segment)(struct kvm_vcpu *vcpu,
488 struct kvm_segment *var, int seg);
489 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
e8467fda 490 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
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491 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
492 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
493 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
494 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
495 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
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496 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
497 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
498 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
499 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
020df079 500 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
5fdbf976 501 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
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502 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
503 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
6b52d186 504 void (*fpu_activate)(struct kvm_vcpu *vcpu);
02daab21 505 void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
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506
507 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 508
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509 void (*run)(struct kvm_vcpu *vcpu);
510 int (*handle_exit)(struct kvm_vcpu *vcpu);
ea4a5ff8 511 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
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512 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
513 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
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514 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
515 unsigned char *hypercall_addr);
66fd3f7f 516 void (*set_irq)(struct kvm_vcpu *vcpu);
95ba8273 517 void (*set_nmi)(struct kvm_vcpu *vcpu);
298101da 518 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
ce7ddec4
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519 bool has_error_code, u32 error_code,
520 bool reinject);
78646121 521 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
95ba8273 522 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
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523 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
524 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
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525 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
526 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
527 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
ea4a5ff8 528 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 529 int (*get_tdp_level)(void);
4b12f0de 530 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
17cc3935 531 int (*get_lpage_level)(void);
4e47c7a6 532 bool (*rdtscp_supported)(void);
344f414f 533
d4330ef2
JR
534 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
535
229456fc 536 const struct trace_print_flags *exit_reasons_str;
ea4a5ff8
ZX
537};
538
97896d04
ZX
539extern struct kvm_x86_ops *kvm_x86_ops;
540
54f1585a
ZX
541int kvm_mmu_module_init(void);
542void kvm_mmu_module_exit(void);
543
544void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
545int kvm_mmu_create(struct kvm_vcpu *vcpu);
546int kvm_mmu_setup(struct kvm_vcpu *vcpu);
547void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e
SY
548void kvm_mmu_set_base_ptes(u64 base_pte);
549void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
4b12f0de 550 u64 dirty_mask, u64 nx_mask, u64 x_mask);
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ZX
551
552int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
553void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
554void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 555unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
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556void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
557
cc4b6871
JR
558int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
559
3200f405 560int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 561 const void *val, int bytes);
2f333bcb
MT
562int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
563 gpa_t addr, unsigned long *ret);
4b12f0de 564u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
2f333bcb
MT
565
566extern bool tdp_enabled;
9f811285 567
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568enum emulation_result {
569 EMULATE_DONE, /* no further processing */
570 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
571 EMULATE_FAIL, /* can't emulate this instruction */
572};
573
571008da
SY
574#define EMULTYPE_NO_DECODE (1 << 0)
575#define EMULTYPE_TRAP_UD (1 << 1)
ba8afb6b 576#define EMULTYPE_SKIP (1 << 2)
851ba692 577int emulate_instruction(struct kvm_vcpu *vcpu,
571008da 578 unsigned long cr2, u16 error_code, int emulation_type);
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579void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
580void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
54f1585a 581
f2b4b7dd 582void kvm_enable_efer_bits(u64);
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ZX
583int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
584int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
585
586struct x86_emulate_ctxt;
587
cf8f70bf 588int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
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589void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
590int kvm_emulate_halt(struct kvm_vcpu *vcpu);
591int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
592int emulate_clts(struct kvm_vcpu *vcpu);
54f1585a 593
3e6e0aab 594void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
c697518a 595int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
3e6e0aab 596
e269fb21
JK
597int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
598 bool has_error_code, u32 error_code);
37817f29 599
49a9b07e 600int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
9c20456a 601void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
a83b29c6 602int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
9c20456a 603void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
020df079
GN
604int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
605int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
2d3ad1f4
AK
606unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
607void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a 608void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
2acf923e 609int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
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610
611int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
612int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
613
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JK
614unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
615void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
616
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617void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
618void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
ce7ddec4
JR
619void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
620void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee
AK
621void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
622 u32 error_code);
0a79b009 623bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
298101da 624
4925663a 625int kvm_pic_set_irq(void *opaque, int irq, int level);
3de42dc0 626
3419ffc8
SY
627void kvm_inject_nmi(struct kvm_vcpu *vcpu);
628
10ab25cd 629int fx_init(struct kvm_vcpu *vcpu);
54f1585a 630
d835dfec 631void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a 632void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT
633 const u8 *new, int bytes,
634 bool guest_initiated);
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635int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
636void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
637int kvm_mmu_load(struct kvm_vcpu *vcpu);
638void kvm_mmu_unload(struct kvm_vcpu *vcpu);
0ba73cda 639void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1871c602
GN
640gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
641gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
642gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
643gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
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644
645int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
646
647int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
648
3067714c 649int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
a7052897 650void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
34c16eec 651
18552672 652void kvm_enable_tdp(void);
5f4cb662 653void kvm_disable_tdp(void);
18552672 654
de7d789a 655int complete_pio(struct kvm_vcpu *vcpu);
f850e2e6 656bool kvm_check_iopl(struct kvm_vcpu *vcpu);
ec6d273d 657
2843099f
IE
658struct kvm_memory_slot *gfn_to_memslot_unaliased(struct kvm *kvm, gfn_t gfn);
659
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660static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
661{
662 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
663
664 return (struct kvm_mmu_page *)page_private(page);
665}
666
d6e88aec 667static inline u16 kvm_read_fs(void)
ec6d273d
ZX
668{
669 u16 seg;
670 asm("mov %%fs, %0" : "=g"(seg));
671 return seg;
672}
673
d6e88aec 674static inline u16 kvm_read_gs(void)
ec6d273d
ZX
675{
676 u16 seg;
677 asm("mov %%gs, %0" : "=g"(seg));
678 return seg;
679}
680
d6e88aec 681static inline u16 kvm_read_ldt(void)
ec6d273d
ZX
682{
683 u16 ldt;
684 asm("sldt %0" : "=g"(ldt));
685 return ldt;
686}
687
d6e88aec 688static inline void kvm_load_fs(u16 sel)
ec6d273d
ZX
689{
690 asm("mov %0, %%fs" : : "rm"(sel));
691}
692
d6e88aec 693static inline void kvm_load_gs(u16 sel)
ec6d273d
ZX
694{
695 asm("mov %0, %%gs" : : "rm"(sel));
696}
697
d6e88aec 698static inline void kvm_load_ldt(u16 sel)
ec6d273d
ZX
699{
700 asm("lldt %0" : : "rm"(sel));
701}
ec6d273d 702
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ZX
703#ifdef CONFIG_X86_64
704static inline unsigned long read_msr(unsigned long msr)
705{
706 u64 value;
707
708 rdmsrl(msr, value);
709 return value;
710}
711#endif
712
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ZX
713static inline u32 get_rdx_init_val(void)
714{
715 return 0x600; /* P6 family */
716}
717
c1a5d4f9
AK
718static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
719{
720 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
721}
722
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723#define TSS_IOPB_BASE_OFFSET 0x66
724#define TSS_BASE_SIZE 0x68
725#define TSS_IOPB_SIZE (65536 / 8)
726#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP
727#define RMODE_TSS_SIZE \
728 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 729
37817f29
IE
730enum {
731 TASK_SWITCH_CALL = 0,
732 TASK_SWITCH_IRET = 1,
733 TASK_SWITCH_JMP = 2,
734 TASK_SWITCH_GATE = 3,
735};
736
1371d904 737#define HF_GIF_MASK (1 << 0)
3d6368ef
AG
738#define HF_HIF_MASK (1 << 1)
739#define HF_VINTR_MASK (1 << 2)
95ba8273 740#define HF_NMI_MASK (1 << 3)
44c11430 741#define HF_IRET_MASK (1 << 4)
1371d904 742
4ecac3fd
AK
743/*
744 * Hardware virtualization extension instructions may fault if a
745 * reboot turns off virtualization while processes are running.
746 * Trap the fault and ignore the instruction if that happens.
747 */
748asmlinkage void kvm_handle_fault_on_reboot(void);
749
750#define __kvm_handle_fault_on_reboot(insn) \
751 "666: " insn "\n\t" \
18b13e54 752 ".pushsection .fixup, \"ax\" \n" \
4ecac3fd 753 "667: \n\t" \
8ceed347 754 __ASM_SIZE(push) " $666b \n\t" \
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755 "jmp kvm_handle_fault_on_reboot \n\t" \
756 ".popsection \n\t" \
757 ".pushsection __ex_table, \"a\" \n\t" \
8ceed347 758 _ASM_PTR " 666b, 667b \n\t" \
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AK
759 ".popsection"
760
e930bffe
AA
761#define KVM_ARCH_WANT_MMU_NOTIFIER
762int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
763int kvm_age_hva(struct kvm *kvm, unsigned long hva);
3da0dd43 764void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
82725b20 765int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
a1b37100
GN
766int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
767int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
0b71785d 768int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
e930bffe 769
18863bdd 770void kvm_define_shared_msr(unsigned index, u32 msr);
d5696725 771void kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
18863bdd 772
f92653ee
JK
773bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
774
1965aae3 775#endif /* _ASM_X86_KVM_HOST_H */