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KVM: MMU: Make tdp_enabled a mmu-context parameter
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a656c8ef 1/*
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2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
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11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
043405e1 13
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14#include <linux/types.h>
15#include <linux/mm.h>
e930bffe 16#include <linux/mmu_notifier.h>
229456fc 17#include <linux/tracepoint.h>
f5f48ee1 18#include <linux/cpumask.h>
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19
20#include <linux/kvm.h>
21#include <linux/kvm_para.h>
edf88417 22#include <linux/kvm_types.h>
34c16eec 23
50d0a0f9 24#include <asm/pvclock-abi.h>
e01a1b57 25#include <asm/desc.h>
0bed3b56 26#include <asm/mtrr.h>
9962d032 27#include <asm/msr-index.h>
e01a1b57 28
0680fe52 29#define KVM_MAX_VCPUS 64
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30#define KVM_MEMORY_SLOTS 32
31/* memory slots that does not exposed to userspace */
32#define KVM_PRIVATE_MEM_SLOTS 4
33
34#define KVM_PIO_PAGE_OFFSET 1
542472b5 35#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
69a9f69b 36
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37#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
38#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
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39#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
40 0xFFFFFF0000000000ULL)
cd6e8f87 41
cd6e8f87 42#define INVALID_PAGE (~(hpa_t)0)
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43#define VALID_PAGE(x) ((x) != INVALID_PAGE)
44
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45#define UNMAPPED_GVA (~(gpa_t)0)
46
ec04b260 47/* KVM Hugepage definitions for x86 */
04326caa 48#define KVM_NR_PAGE_SIZES 3
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49#define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
50#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
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51#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
52#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
53#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
05da4558 54
cd6e8f87 55#define DE_VECTOR 0
19bd8afd 56#define DB_VECTOR 1
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57#define BP_VECTOR 3
58#define OF_VECTOR 4
59#define BR_VECTOR 5
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60#define UD_VECTOR 6
61#define NM_VECTOR 7
62#define DF_VECTOR 8
63#define TS_VECTOR 10
64#define NP_VECTOR 11
65#define SS_VECTOR 12
66#define GP_VECTOR 13
67#define PF_VECTOR 14
77ab6db0 68#define MF_VECTOR 16
53371b50 69#define MC_VECTOR 18
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70
71#define SELECTOR_TI_MASK (1 << 2)
72#define SELECTOR_RPL_MASK 0x03
73
74#define IOPL_SHIFT 12
75
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76#define KVM_PERMILLE_MMU_PAGES 20
77#define KVM_MIN_ALLOC_MMU_PAGES 64
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78#define KVM_MMU_HASH_SHIFT 10
79#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
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80#define KVM_MIN_FREE_MMU_PAGES 5
81#define KVM_REFILL_PAGES 25
82#define KVM_MAX_CPUID_ENTRIES 40
0bed3b56 83#define KVM_NR_FIXED_MTRR_REGION 88
9ba075a6 84#define KVM_NR_VAR_MTRR 8
d657a98e 85
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86extern spinlock_t kvm_lock;
87extern struct list_head vm_list;
88
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89struct kvm_vcpu;
90struct kvm;
91
5fdbf976 92enum kvm_reg {
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93 VCPU_REGS_RAX = 0,
94 VCPU_REGS_RCX = 1,
95 VCPU_REGS_RDX = 2,
96 VCPU_REGS_RBX = 3,
97 VCPU_REGS_RSP = 4,
98 VCPU_REGS_RBP = 5,
99 VCPU_REGS_RSI = 6,
100 VCPU_REGS_RDI = 7,
101#ifdef CONFIG_X86_64
102 VCPU_REGS_R8 = 8,
103 VCPU_REGS_R9 = 9,
104 VCPU_REGS_R10 = 10,
105 VCPU_REGS_R11 = 11,
106 VCPU_REGS_R12 = 12,
107 VCPU_REGS_R13 = 13,
108 VCPU_REGS_R14 = 14,
109 VCPU_REGS_R15 = 15,
110#endif
5fdbf976 111 VCPU_REGS_RIP,
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112 NR_VCPU_REGS
113};
114
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115enum kvm_reg_ex {
116 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
117};
118
2b3ccfa0 119enum {
81609e3e 120 VCPU_SREG_ES,
2b3ccfa0 121 VCPU_SREG_CS,
81609e3e 122 VCPU_SREG_SS,
2b3ccfa0 123 VCPU_SREG_DS,
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124 VCPU_SREG_FS,
125 VCPU_SREG_GS,
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126 VCPU_SREG_TR,
127 VCPU_SREG_LDTR,
128};
129
56e82318 130#include <asm/kvm_emulate.h>
2b3ccfa0 131
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132#define KVM_NR_MEM_OBJS 40
133
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134#define KVM_NR_DB_REGS 4
135
136#define DR6_BD (1 << 13)
137#define DR6_BS (1 << 14)
138#define DR6_FIXED_1 0xffff0ff0
139#define DR6_VOLATILE 0x0000e00f
140
141#define DR7_BP_EN_MASK 0x000000ff
142#define DR7_GE (1 << 9)
143#define DR7_GD (1 << 13)
144#define DR7_FIXED_1 0x00000400
145#define DR7_VOLATILE 0xffff23ff
146
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147/*
148 * We don't want allocation failures within the mmu code, so we preallocate
149 * enough memory for a single page fault in a cache.
150 */
151struct kvm_mmu_memory_cache {
152 int nobjs;
153 void *objects[KVM_NR_MEM_OBJS];
154};
155
156#define NR_PTE_CHAIN_ENTRIES 5
157
158struct kvm_pte_chain {
159 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
160 struct hlist_node link;
161};
162
163/*
164 * kvm_mmu_page_role, below, is defined as:
165 *
166 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
167 * bits 4:7 - page table level for this shadow (1-4)
168 * bits 8:9 - page table quadrant for 2-level guests
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169 * bit 16 - direct mapping of virtual to physical mapping at gfn
170 * used for real mode and two-dimensional paging
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171 * bits 17:19 - common access permissions for all ptes in this shadow page
172 */
173union kvm_mmu_page_role {
174 unsigned word;
175 struct {
7d76b4d3 176 unsigned level:4;
5b7e0102 177 unsigned cr4_pae:1;
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178 unsigned quadrant:2;
179 unsigned pad_for_nice_hex_output:6;
f6e2c02b 180 unsigned direct:1;
7d76b4d3 181 unsigned access:3;
2e53d63a 182 unsigned invalid:1;
9645bb56 183 unsigned nxe:1;
3dbe1415 184 unsigned cr0_wp:1;
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185 };
186};
187
188struct kvm_mmu_page {
189 struct list_head link;
190 struct hlist_node hash_link;
191
192 /*
193 * The following two entries are used to key the shadow page in the
194 * hash table.
195 */
196 gfn_t gfn;
197 union kvm_mmu_page_role role;
198
199 u64 *spt;
200 /* hold the gfn of each spte inside spt */
201 gfn_t *gfns;
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202 /*
203 * One bit set per slot which has memory
204 * in this shadow page.
205 */
206 DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
0571d366 207 bool multimapped; /* More than one parent_pte? */
4731d4c7 208 bool unsync;
0571d366 209 int root_count; /* Currently serving as active root */
60c8aec6 210 unsigned int unsync_children;
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211 union {
212 u64 *parent_pte; /* !multimapped */
213 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
214 };
0074ff63 215 DECLARE_BITMAP(unsync_child_bitmap, 512);
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216};
217
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218struct kvm_pv_mmu_op_buffer {
219 void *ptr;
220 unsigned len;
221 unsigned processed;
222 char buf[512] __aligned(sizeof(long));
223};
224
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225struct kvm_pio_request {
226 unsigned long count;
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227 int in;
228 int port;
229 int size;
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230};
231
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232/*
233 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
234 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
235 * mode.
236 */
237struct kvm_mmu {
238 void (*new_cr3)(struct kvm_vcpu *vcpu);
239 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
240 void (*free)(struct kvm_vcpu *vcpu);
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241 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
242 u32 *error);
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243 void (*prefetch_page)(struct kvm_vcpu *vcpu,
244 struct kvm_mmu_page *page);
e8bc217a 245 int (*sync_page)(struct kvm_vcpu *vcpu,
be71e061 246 struct kvm_mmu_page *sp, bool clear_unsync);
a7052897 247 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
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248 hpa_t root_hpa;
249 int root_level;
250 int shadow_root_level;
a770f6f2 251 union kvm_mmu_page_role base_role;
c5a78f2b 252 bool direct_map;
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253
254 u64 *pae_root;
82725b20 255 u64 rsvd_bits_mask[2][4];
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256};
257
ad312c7c 258struct kvm_vcpu_arch {
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259 /*
260 * rip and regs accesses must go through
261 * kvm_{register,rip}_{read,write} functions.
262 */
263 unsigned long regs[NR_VCPU_REGS];
264 u32 regs_avail;
265 u32 regs_dirty;
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266
267 unsigned long cr0;
e8467fda 268 unsigned long cr0_guest_owned_bits;
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269 unsigned long cr2;
270 unsigned long cr3;
271 unsigned long cr4;
fc78f519 272 unsigned long cr4_guest_owned_bits;
34c16eec 273 unsigned long cr8;
1371d904 274 u32 hflags;
34c16eec 275 u64 pdptrs[4]; /* pae */
f6801dff 276 u64 efer;
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277 u64 apic_base;
278 struct kvm_lapic *apic; /* kernel irqchip context */
e1035715 279 int32_t apic_arb_prio;
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280 int mp_state;
281 int sipi_vector;
282 u64 ia32_misc_enable_msr;
b209749f 283 bool tpr_access_reporting;
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284
285 struct kvm_mmu mmu;
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286 /* only needed in kvm_pv_mmu_op() path, but it's hot so
287 * put it here to avoid allocation */
288 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
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289
290 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
291 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
292 struct kvm_mmu_memory_cache mmu_page_cache;
293 struct kvm_mmu_memory_cache mmu_page_header_cache;
294
295 gfn_t last_pt_write_gfn;
296 int last_pt_write_count;
297 u64 *last_pte_updated;
1b7fcd32 298 gfn_t last_pte_gfn;
34c16eec 299
d7824fff 300 struct {
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301 gfn_t gfn; /* presumed gfn during guest pte update */
302 pfn_t pfn; /* pfn corresponding to that gfn */
e930bffe 303 unsigned long mmu_seq;
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304 } update_pte;
305
98918833 306 struct fpu guest_fpu;
2acf923e 307 u64 xcr0;
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308
309 gva_t mmio_fault_cr2;
310 struct kvm_pio_request pio;
311 void *pio_data;
312
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313 u8 event_exit_inst_len;
314
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315 struct kvm_queued_exception {
316 bool pending;
317 bool has_error_code;
ce7ddec4 318 bool reinject;
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319 u8 nr;
320 u32 error_code;
321 } exception;
322
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323 struct kvm_queued_interrupt {
324 bool pending;
66fd3f7f 325 bool soft;
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326 u8 nr;
327 } interrupt;
328
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329 int halt_request; /* real mode on Intel only */
330
331 int cpuid_nent;
07716717 332 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
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333 /* emulate context */
334
335 struct x86_emulate_ctxt emulate_ctxt;
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336
337 gpa_t time;
50d0a0f9 338 struct pvclock_vcpu_time_info hv_clock;
e48672fa 339 unsigned int hw_tsc_khz;
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340 unsigned int time_offset;
341 struct page *time_page;
e48672fa 342 u64 last_host_tsc;
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343 u64 last_guest_tsc;
344 u64 last_kernel_ns;
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345
346 bool nmi_pending;
668f612f 347 bool nmi_injected;
9ba075a6 348
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349 struct mtrr_state_type mtrr_state;
350 u32 pat;
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351
352 int switch_db_regs;
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353 unsigned long db[KVM_NR_DB_REGS];
354 unsigned long dr6;
355 unsigned long dr7;
356 unsigned long eff_db[KVM_NR_DB_REGS];
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357
358 u64 mcg_cap;
359 u64 mcg_status;
360 u64 mcg_ctl;
361 u64 *mce_banks;
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362
363 /* used for guest single stepping over the given code position */
94fe45da 364 unsigned long singlestep_rip;
f92653ee 365
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366 /* fields used by HYPER-V emulation */
367 u64 hv_vapic;
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368
369 cpumask_var_t wbinvd_dirty_mask;
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370};
371
fef9cce0 372struct kvm_arch {
49d5ca26 373 unsigned int n_used_mmu_pages;
f05e70ac 374 unsigned int n_requested_mmu_pages;
39de71ec 375 unsigned int n_max_mmu_pages;
08e850c6 376 atomic_t invlpg_counter;
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377 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
378 /*
379 * Hash table of struct kvm_mmu_page.
380 */
381 struct list_head active_mmu_pages;
4d5c5d0f 382 struct list_head assigned_dev_head;
19de40a8 383 struct iommu_domain *iommu_domain;
522c68c4 384 int iommu_flags;
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385 struct kvm_pic *vpic;
386 struct kvm_ioapic *vioapic;
7837699f 387 struct kvm_pit *vpit;
cc6e462c 388 int vapics_in_nmi_mode;
bfc6d222 389
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390 unsigned int tss_addr;
391 struct page *apic_access_page;
18068523
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392
393 gpa_t wall_clock;
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394
395 struct page *ept_identity_pagetable;
396 bool ept_identity_pagetable_done;
b927a3ce 397 gpa_t ept_identity_map_addr;
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SY
398
399 unsigned long irq_sources_bitmap;
afbcf7ab 400 s64 kvmclock_offset;
99e3e30a 401 spinlock_t tsc_write_lock;
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402 u64 last_tsc_nsec;
403 u64 last_tsc_offset;
404 u64 last_tsc_write;
ffde22ac
ES
405
406 struct kvm_xen_hvm_config xen_hvm_config;
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407
408 /* fields used by HYPER-V emulation */
409 u64 hv_guest_os_id;
410 u64 hv_hypercall;
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411};
412
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413struct kvm_vm_stat {
414 u32 mmu_shadow_zapped;
415 u32 mmu_pte_write;
416 u32 mmu_pte_updated;
417 u32 mmu_pde_zapped;
418 u32 mmu_flooded;
419 u32 mmu_recycled;
dfc5aa00 420 u32 mmu_cache_miss;
4731d4c7 421 u32 mmu_unsync;
0711456c 422 u32 remote_tlb_flush;
05da4558 423 u32 lpages;
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424};
425
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426struct kvm_vcpu_stat {
427 u32 pf_fixed;
428 u32 pf_guest;
429 u32 tlb_flush;
430 u32 invlpg;
431
432 u32 exits;
433 u32 io_exits;
434 u32 mmio_exits;
435 u32 signal_exits;
436 u32 irq_window_exits;
f08864b4 437 u32 nmi_window_exits;
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438 u32 halt_exits;
439 u32 halt_wakeup;
440 u32 request_irq_exits;
441 u32 irq_exits;
442 u32 host_state_reload;
443 u32 efer_reload;
444 u32 fpu_reload;
445 u32 insn_emulation;
446 u32 insn_emulation_fail;
f11c3a8d 447 u32 hypercalls;
fa89a817 448 u32 irq_injections;
c4abb7c9 449 u32 nmi_injections;
77b4c255 450};
ad312c7c 451
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452struct kvm_x86_ops {
453 int (*cpu_has_kvm_support)(void); /* __init */
454 int (*disabled_by_bios)(void); /* __init */
10474ae8 455 int (*hardware_enable)(void *dummy);
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456 void (*hardware_disable)(void *dummy);
457 void (*check_processor_compatibility)(void *rtn);
458 int (*hardware_setup)(void); /* __init */
459 void (*hardware_unsetup)(void); /* __exit */
774ead3a 460 bool (*cpu_has_accelerated_tpr)(void);
0e851880 461 void (*cpuid_update)(struct kvm_vcpu *vcpu);
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462
463 /* Create, but do not attach this VCPU */
464 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
465 void (*vcpu_free)(struct kvm_vcpu *vcpu);
466 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
467
468 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
469 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
470 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8 471
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472 void (*set_guest_debug)(struct kvm_vcpu *vcpu,
473 struct kvm_guest_debug *dbg);
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474 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
475 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
476 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
477 void (*get_segment)(struct kvm_vcpu *vcpu,
478 struct kvm_segment *var, int seg);
2e4d2653 479 int (*get_cpl)(struct kvm_vcpu *vcpu);
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480 void (*set_segment)(struct kvm_vcpu *vcpu,
481 struct kvm_segment *var, int seg);
482 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
e8467fda 483 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
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484 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
485 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
486 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
487 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
488 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
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GN
489 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
490 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
491 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
492 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
020df079 493 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
5fdbf976 494 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
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495 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
496 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
6b52d186 497 void (*fpu_activate)(struct kvm_vcpu *vcpu);
02daab21 498 void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
ea4a5ff8
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499
500 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 501
851ba692
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502 void (*run)(struct kvm_vcpu *vcpu);
503 int (*handle_exit)(struct kvm_vcpu *vcpu);
ea4a5ff8 504 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
2809f5d2
GC
505 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
506 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
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507 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
508 unsigned char *hypercall_addr);
66fd3f7f 509 void (*set_irq)(struct kvm_vcpu *vcpu);
95ba8273 510 void (*set_nmi)(struct kvm_vcpu *vcpu);
298101da 511 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
ce7ddec4
JR
512 bool has_error_code, u32 error_code,
513 bool reinject);
78646121 514 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
95ba8273 515 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
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JK
516 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
517 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
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GN
518 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
519 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
520 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
ea4a5ff8 521 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 522 int (*get_tdp_level)(void);
4b12f0de 523 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
17cc3935 524 int (*get_lpage_level)(void);
4e47c7a6 525 bool (*rdtscp_supported)(void);
e48672fa 526 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment);
344f414f 527
d4330ef2
JR
528 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
529
f5f48ee1
SY
530 bool (*has_wbinvd_exit)(void);
531
99e3e30a
ZA
532 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
533
229456fc 534 const struct trace_print_flags *exit_reasons_str;
ea4a5ff8
ZX
535};
536
97896d04
ZX
537extern struct kvm_x86_ops *kvm_x86_ops;
538
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539int kvm_mmu_module_init(void);
540void kvm_mmu_module_exit(void);
541
542void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
543int kvm_mmu_create(struct kvm_vcpu *vcpu);
544int kvm_mmu_setup(struct kvm_vcpu *vcpu);
545void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e
SY
546void kvm_mmu_set_base_ptes(u64 base_pte);
547void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
4b12f0de 548 u64 dirty_mask, u64 nx_mask, u64 x_mask);
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ZX
549
550int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
551void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
552void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 553unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
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ZX
554void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
555
cc4b6871
JR
556int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
557
3200f405 558int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 559 const void *val, int bytes);
2f333bcb
MT
560int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
561 gpa_t addr, unsigned long *ret);
4b12f0de 562u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
2f333bcb
MT
563
564extern bool tdp_enabled;
9f811285 565
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566enum emulation_result {
567 EMULATE_DONE, /* no further processing */
568 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
569 EMULATE_FAIL, /* can't emulate this instruction */
570};
571
571008da
SY
572#define EMULTYPE_NO_DECODE (1 << 0)
573#define EMULTYPE_TRAP_UD (1 << 1)
ba8afb6b 574#define EMULTYPE_SKIP (1 << 2)
851ba692 575int emulate_instruction(struct kvm_vcpu *vcpu,
571008da 576 unsigned long cr2, u16 error_code, int emulation_type);
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577void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
578void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
54f1585a 579
f2b4b7dd 580void kvm_enable_efer_bits(u64);
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581int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
582int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
583
584struct x86_emulate_ctxt;
585
cf8f70bf 586int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
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587void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
588int kvm_emulate_halt(struct kvm_vcpu *vcpu);
589int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
590int emulate_clts(struct kvm_vcpu *vcpu);
f5f48ee1 591int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
54f1585a 592
3e6e0aab 593void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
c697518a 594int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
3e6e0aab 595
e269fb21
JK
596int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
597 bool has_error_code, u32 error_code);
37817f29 598
49a9b07e 599int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
2390218b 600int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
a83b29c6 601int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
9c20456a 602void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
020df079
GN
603int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
604int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
2d3ad1f4
AK
605unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
606void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a 607void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
2acf923e 608int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
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609
610int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
611int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
612
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JK
613unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
614void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
615
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AK
616void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
617void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
ce7ddec4
JR
618void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
619void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee
AK
620void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
621 u32 error_code);
0a79b009 622bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
298101da 623
4925663a 624int kvm_pic_set_irq(void *opaque, int irq, int level);
3de42dc0 625
3419ffc8
SY
626void kvm_inject_nmi(struct kvm_vcpu *vcpu);
627
10ab25cd 628int fx_init(struct kvm_vcpu *vcpu);
54f1585a 629
d835dfec 630void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a 631void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT
632 const u8 *new, int bytes,
633 bool guest_initiated);
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ZX
634int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
635void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
636int kvm_mmu_load(struct kvm_vcpu *vcpu);
637void kvm_mmu_unload(struct kvm_vcpu *vcpu);
0ba73cda 638void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
1871c602
GN
639gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
640gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
641gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
642gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error);
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643
644int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
645
646int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
647
3067714c 648int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
a7052897 649void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
34c16eec 650
18552672 651void kvm_enable_tdp(void);
5f4cb662 652void kvm_disable_tdp(void);
18552672 653
de7d789a 654int complete_pio(struct kvm_vcpu *vcpu);
f850e2e6 655bool kvm_check_iopl(struct kvm_vcpu *vcpu);
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656
657static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
658{
659 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
660
661 return (struct kvm_mmu_page *)page_private(page);
662}
663
d6e88aec 664static inline u16 kvm_read_ldt(void)
ec6d273d
ZX
665{
666 u16 ldt;
667 asm("sldt %0" : "=g"(ldt));
668 return ldt;
669}
670
d6e88aec 671static inline void kvm_load_ldt(u16 sel)
ec6d273d
ZX
672{
673 asm("lldt %0" : : "rm"(sel));
674}
ec6d273d 675
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676#ifdef CONFIG_X86_64
677static inline unsigned long read_msr(unsigned long msr)
678{
679 u64 value;
680
681 rdmsrl(msr, value);
682 return value;
683}
684#endif
685
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686static inline u32 get_rdx_init_val(void)
687{
688 return 0x600; /* P6 family */
689}
690
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691static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
692{
693 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
694}
695
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696#define TSS_IOPB_BASE_OFFSET 0x66
697#define TSS_BASE_SIZE 0x68
698#define TSS_IOPB_SIZE (65536 / 8)
699#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP
700#define RMODE_TSS_SIZE \
701 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 702
37817f29
IE
703enum {
704 TASK_SWITCH_CALL = 0,
705 TASK_SWITCH_IRET = 1,
706 TASK_SWITCH_JMP = 2,
707 TASK_SWITCH_GATE = 3,
708};
709
1371d904 710#define HF_GIF_MASK (1 << 0)
3d6368ef
AG
711#define HF_HIF_MASK (1 << 1)
712#define HF_VINTR_MASK (1 << 2)
95ba8273 713#define HF_NMI_MASK (1 << 3)
44c11430 714#define HF_IRET_MASK (1 << 4)
1371d904 715
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716/*
717 * Hardware virtualization extension instructions may fault if a
718 * reboot turns off virtualization while processes are running.
719 * Trap the fault and ignore the instruction if that happens.
720 */
721asmlinkage void kvm_handle_fault_on_reboot(void);
722
723#define __kvm_handle_fault_on_reboot(insn) \
724 "666: " insn "\n\t" \
18b13e54 725 ".pushsection .fixup, \"ax\" \n" \
4ecac3fd 726 "667: \n\t" \
8ceed347 727 __ASM_SIZE(push) " $666b \n\t" \
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AK
728 "jmp kvm_handle_fault_on_reboot \n\t" \
729 ".popsection \n\t" \
730 ".pushsection __ex_table, \"a\" \n\t" \
8ceed347 731 _ASM_PTR " 666b, 667b \n\t" \
4ecac3fd
AK
732 ".popsection"
733
e930bffe
AA
734#define KVM_ARCH_WANT_MMU_NOTIFIER
735int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
736int kvm_age_hva(struct kvm *kvm, unsigned long hva);
3da0dd43 737void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
82725b20 738int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
a1b37100
GN
739int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
740int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
0b71785d 741int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
e930bffe 742
18863bdd 743void kvm_define_shared_msr(unsigned index, u32 msr);
d5696725 744void kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
18863bdd 745
f92653ee
JK
746bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
747
1965aae3 748#endif /* _ASM_X86_KVM_HOST_H */