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a656c8ef 1/*
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2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
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11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
043405e1 13
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14#include <linux/types.h>
15#include <linux/mm.h>
e930bffe 16#include <linux/mmu_notifier.h>
229456fc 17#include <linux/tracepoint.h>
f5f48ee1 18#include <linux/cpumask.h>
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19
20#include <linux/kvm.h>
21#include <linux/kvm_para.h>
edf88417 22#include <linux/kvm_types.h>
34c16eec 23
50d0a0f9 24#include <asm/pvclock-abi.h>
e01a1b57 25#include <asm/desc.h>
0bed3b56 26#include <asm/mtrr.h>
9962d032 27#include <asm/msr-index.h>
e01a1b57 28
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29#define KVM_MAX_VCPUS 254
30#define KVM_SOFT_MAX_VCPUS 64
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31#define KVM_MEMORY_SLOTS 32
32/* memory slots that does not exposed to userspace */
33#define KVM_PRIVATE_MEM_SLOTS 4
cef4dea0 34#define KVM_MMIO_SIZE 16
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35
36#define KVM_PIO_PAGE_OFFSET 1
542472b5 37#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
69a9f69b 38
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39#define CR0_RESERVED_BITS \
40 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
41 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
42 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
43
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44#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
45#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
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46#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
47 0xFFFFFF0000000000ULL)
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48#define CR4_RESERVED_BITS \
49 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
50 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
51 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
d9c3476d 52 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_RDWRGSFS \
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53 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
54
55#define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
56
57
cd6e8f87 58
cd6e8f87 59#define INVALID_PAGE (~(hpa_t)0)
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60#define VALID_PAGE(x) ((x) != INVALID_PAGE)
61
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62#define UNMAPPED_GVA (~(gpa_t)0)
63
ec04b260 64/* KVM Hugepage definitions for x86 */
04326caa 65#define KVM_NR_PAGE_SIZES 3
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66#define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
67#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
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68#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
69#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
70#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
05da4558 71
cd6e8f87 72#define DE_VECTOR 0
19bd8afd 73#define DB_VECTOR 1
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74#define BP_VECTOR 3
75#define OF_VECTOR 4
76#define BR_VECTOR 5
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77#define UD_VECTOR 6
78#define NM_VECTOR 7
79#define DF_VECTOR 8
80#define TS_VECTOR 10
81#define NP_VECTOR 11
82#define SS_VECTOR 12
83#define GP_VECTOR 13
84#define PF_VECTOR 14
77ab6db0 85#define MF_VECTOR 16
53371b50 86#define MC_VECTOR 18
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87
88#define SELECTOR_TI_MASK (1 << 2)
89#define SELECTOR_RPL_MASK 0x03
90
91#define IOPL_SHIFT 12
92
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93#define KVM_PERMILLE_MMU_PAGES 20
94#define KVM_MIN_ALLOC_MMU_PAGES 64
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95#define KVM_MMU_HASH_SHIFT 10
96#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
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97#define KVM_MIN_FREE_MMU_PAGES 5
98#define KVM_REFILL_PAGES 25
73c1160c 99#define KVM_MAX_CPUID_ENTRIES 80
0bed3b56 100#define KVM_NR_FIXED_MTRR_REGION 88
9ba075a6 101#define KVM_NR_VAR_MTRR 8
d657a98e 102
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103#define ASYNC_PF_PER_VCPU 64
104
e935b837 105extern raw_spinlock_t kvm_lock;
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106extern struct list_head vm_list;
107
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108struct kvm_vcpu;
109struct kvm;
af585b92 110struct kvm_async_pf;
d657a98e 111
5fdbf976 112enum kvm_reg {
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113 VCPU_REGS_RAX = 0,
114 VCPU_REGS_RCX = 1,
115 VCPU_REGS_RDX = 2,
116 VCPU_REGS_RBX = 3,
117 VCPU_REGS_RSP = 4,
118 VCPU_REGS_RBP = 5,
119 VCPU_REGS_RSI = 6,
120 VCPU_REGS_RDI = 7,
121#ifdef CONFIG_X86_64
122 VCPU_REGS_R8 = 8,
123 VCPU_REGS_R9 = 9,
124 VCPU_REGS_R10 = 10,
125 VCPU_REGS_R11 = 11,
126 VCPU_REGS_R12 = 12,
127 VCPU_REGS_R13 = 13,
128 VCPU_REGS_R14 = 14,
129 VCPU_REGS_R15 = 15,
130#endif
5fdbf976 131 VCPU_REGS_RIP,
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132 NR_VCPU_REGS
133};
134
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135enum kvm_reg_ex {
136 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
aff48baa 137 VCPU_EXREG_CR3,
6de12732 138 VCPU_EXREG_RFLAGS,
69c73028 139 VCPU_EXREG_CPL,
2fb92db1 140 VCPU_EXREG_SEGMENTS,
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141};
142
2b3ccfa0 143enum {
81609e3e 144 VCPU_SREG_ES,
2b3ccfa0 145 VCPU_SREG_CS,
81609e3e 146 VCPU_SREG_SS,
2b3ccfa0 147 VCPU_SREG_DS,
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148 VCPU_SREG_FS,
149 VCPU_SREG_GS,
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150 VCPU_SREG_TR,
151 VCPU_SREG_LDTR,
152};
153
56e82318 154#include <asm/kvm_emulate.h>
2b3ccfa0 155
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156#define KVM_NR_MEM_OBJS 40
157
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158#define KVM_NR_DB_REGS 4
159
160#define DR6_BD (1 << 13)
161#define DR6_BS (1 << 14)
162#define DR6_FIXED_1 0xffff0ff0
163#define DR6_VOLATILE 0x0000e00f
164
165#define DR7_BP_EN_MASK 0x000000ff
166#define DR7_GE (1 << 9)
167#define DR7_GD (1 << 13)
168#define DR7_FIXED_1 0x00000400
169#define DR7_VOLATILE 0xffff23ff
170
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171/*
172 * We don't want allocation failures within the mmu code, so we preallocate
173 * enough memory for a single page fault in a cache.
174 */
175struct kvm_mmu_memory_cache {
176 int nobjs;
177 void *objects[KVM_NR_MEM_OBJS];
178};
179
180#define NR_PTE_CHAIN_ENTRIES 5
181
182struct kvm_pte_chain {
183 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
184 struct hlist_node link;
185};
186
187/*
188 * kvm_mmu_page_role, below, is defined as:
189 *
190 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
191 * bits 4:7 - page table level for this shadow (1-4)
192 * bits 8:9 - page table quadrant for 2-level guests
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193 * bit 16 - direct mapping of virtual to physical mapping at gfn
194 * used for real mode and two-dimensional paging
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195 * bits 17:19 - common access permissions for all ptes in this shadow page
196 */
197union kvm_mmu_page_role {
198 unsigned word;
199 struct {
7d76b4d3 200 unsigned level:4;
5b7e0102 201 unsigned cr4_pae:1;
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202 unsigned quadrant:2;
203 unsigned pad_for_nice_hex_output:6;
f6e2c02b 204 unsigned direct:1;
7d76b4d3 205 unsigned access:3;
2e53d63a 206 unsigned invalid:1;
9645bb56 207 unsigned nxe:1;
3dbe1415 208 unsigned cr0_wp:1;
411c588d 209 unsigned smep_andnot_wp:1;
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210 };
211};
212
213struct kvm_mmu_page {
214 struct list_head link;
215 struct hlist_node hash_link;
216
217 /*
218 * The following two entries are used to key the shadow page in the
219 * hash table.
220 */
221 gfn_t gfn;
222 union kvm_mmu_page_role role;
223
224 u64 *spt;
225 /* hold the gfn of each spte inside spt */
226 gfn_t *gfns;
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227 /*
228 * One bit set per slot which has memory
229 * in this shadow page.
230 */
231 DECLARE_BITMAP(slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
4731d4c7 232 bool unsync;
0571d366 233 int root_count; /* Currently serving as active root */
60c8aec6 234 unsigned int unsync_children;
67052b35 235 unsigned long parent_ptes; /* Reverse mapping for parent_pte */
0074ff63 236 DECLARE_BITMAP(unsync_child_bitmap, 512);
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237
238#ifdef CONFIG_X86_32
239 int clear_spte_count;
240#endif
241
242 struct rcu_head rcu;
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243};
244
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245struct kvm_pv_mmu_op_buffer {
246 void *ptr;
247 unsigned len;
248 unsigned processed;
249 char buf[512] __aligned(sizeof(long));
250};
251
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252struct kvm_pio_request {
253 unsigned long count;
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254 int in;
255 int port;
256 int size;
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257};
258
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259/*
260 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
261 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
262 * mode.
263 */
264struct kvm_mmu {
265 void (*new_cr3)(struct kvm_vcpu *vcpu);
f43addd4 266 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
5777ed34 267 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
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268 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
269 bool prefault);
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270 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
271 struct x86_exception *fault);
d657a98e 272 void (*free)(struct kvm_vcpu *vcpu);
1871c602 273 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
ab9ae313 274 struct x86_exception *exception);
c30a358d 275 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
e8bc217a 276 int (*sync_page)(struct kvm_vcpu *vcpu,
a4a8e6f7 277 struct kvm_mmu_page *sp);
a7052897 278 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
0f53b5b1 279 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
7c562522 280 u64 *spte, const void *pte);
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281 hpa_t root_hpa;
282 int root_level;
283 int shadow_root_level;
a770f6f2 284 union kvm_mmu_page_role base_role;
c5a78f2b 285 bool direct_map;
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286
287 u64 *pae_root;
81407ca5 288 u64 *lm_root;
82725b20 289 u64 rsvd_bits_mask[2][4];
ff03a073 290
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291 bool nx;
292
ff03a073 293 u64 pdptrs[4]; /* pae */
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294};
295
ad312c7c 296struct kvm_vcpu_arch {
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297 /*
298 * rip and regs accesses must go through
299 * kvm_{register,rip}_{read,write} functions.
300 */
301 unsigned long regs[NR_VCPU_REGS];
302 u32 regs_avail;
303 u32 regs_dirty;
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304
305 unsigned long cr0;
e8467fda 306 unsigned long cr0_guest_owned_bits;
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307 unsigned long cr2;
308 unsigned long cr3;
309 unsigned long cr4;
fc78f519 310 unsigned long cr4_guest_owned_bits;
34c16eec 311 unsigned long cr8;
1371d904 312 u32 hflags;
f6801dff 313 u64 efer;
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314 u64 apic_base;
315 struct kvm_lapic *apic; /* kernel irqchip context */
e1035715 316 int32_t apic_arb_prio;
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317 int mp_state;
318 int sipi_vector;
319 u64 ia32_misc_enable_msr;
b209749f 320 bool tpr_access_reporting;
34c16eec 321
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322 /*
323 * Paging state of the vcpu
324 *
325 * If the vcpu runs in guest mode with two level paging this still saves
326 * the paging mode of the l1 guest. This context is always used to
327 * handle faults.
328 */
34c16eec 329 struct kvm_mmu mmu;
8df25a32 330
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331 /*
332 * Paging state of an L2 guest (used for nested npt)
333 *
334 * This context will save all necessary information to walk page tables
335 * of the an L2 guest. This context is only initialized for page table
336 * walking and not for faulting since we never handle l2 page faults on
337 * the host.
338 */
339 struct kvm_mmu nested_mmu;
340
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341 /*
342 * Pointer to the mmu context currently used for
343 * gva_to_gpa translations.
344 */
345 struct kvm_mmu *walk_mmu;
346
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347 /* only needed in kvm_pv_mmu_op() path, but it's hot so
348 * put it here to avoid allocation */
349 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
34c16eec 350
53c07b18 351 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
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352 struct kvm_mmu_memory_cache mmu_page_cache;
353 struct kvm_mmu_memory_cache mmu_page_header_cache;
354
355 gfn_t last_pt_write_gfn;
356 int last_pt_write_count;
357 u64 *last_pte_updated;
1b7fcd32 358 gfn_t last_pte_gfn;
34c16eec 359
98918833 360 struct fpu guest_fpu;
2acf923e 361 u64 xcr0;
34c16eec 362
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363 struct kvm_pio_request pio;
364 void *pio_data;
365
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366 u8 event_exit_inst_len;
367
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368 struct kvm_queued_exception {
369 bool pending;
370 bool has_error_code;
ce7ddec4 371 bool reinject;
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372 u8 nr;
373 u32 error_code;
374 } exception;
375
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376 struct kvm_queued_interrupt {
377 bool pending;
66fd3f7f 378 bool soft;
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379 u8 nr;
380 } interrupt;
381
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382 int halt_request; /* real mode on Intel only */
383
384 int cpuid_nent;
07716717 385 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
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386 /* emulate context */
387
388 struct x86_emulate_ctxt emulate_ctxt;
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389 bool emulate_regs_need_sync_to_vcpu;
390 bool emulate_regs_need_sync_from_vcpu;
18068523
GOC
391
392 gpa_t time;
50d0a0f9 393 struct pvclock_vcpu_time_info hv_clock;
e48672fa 394 unsigned int hw_tsc_khz;
18068523
GOC
395 unsigned int time_offset;
396 struct page *time_page;
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GC
397
398 struct {
399 u64 msr_val;
400 u64 last_steal;
401 u64 accum_steal;
402 struct gfn_to_hva_cache stime;
403 struct kvm_steal_time steal;
404 } st;
405
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406 u64 last_guest_tsc;
407 u64 last_kernel_ns;
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408 u64 last_tsc_nsec;
409 u64 last_tsc_write;
1e993611 410 u32 virtual_tsc_khz;
c285545f 411 bool tsc_catchup;
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412 u32 tsc_catchup_mult;
413 s8 tsc_catchup_shift;
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SY
414
415 bool nmi_pending;
668f612f 416 bool nmi_injected;
9ba075a6 417
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SY
418 struct mtrr_state_type mtrr_state;
419 u32 pat;
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420
421 int switch_db_regs;
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422 unsigned long db[KVM_NR_DB_REGS];
423 unsigned long dr6;
424 unsigned long dr7;
425 unsigned long eff_db[KVM_NR_DB_REGS];
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HY
426
427 u64 mcg_cap;
428 u64 mcg_status;
429 u64 mcg_ctl;
430 u64 *mce_banks;
94fe45da 431
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432 /* Cache MMIO info */
433 u64 mmio_gva;
434 unsigned access;
435 gfn_t mmio_gfn;
436
94fe45da 437 /* used for guest single stepping over the given code position */
94fe45da 438 unsigned long singlestep_rip;
f92653ee 439
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440 /* fields used by HYPER-V emulation */
441 u64 hv_vapic;
f5f48ee1
SY
442
443 cpumask_var_t wbinvd_dirty_mask;
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GN
444
445 struct {
446 bool halted;
447 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
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GN
448 struct gfn_to_hva_cache data;
449 u64 msr_val;
7c90705b 450 u32 id;
6adba527 451 bool send_user_only;
af585b92 452 } apf;
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453};
454
fef9cce0 455struct kvm_arch {
49d5ca26 456 unsigned int n_used_mmu_pages;
f05e70ac 457 unsigned int n_requested_mmu_pages;
39de71ec 458 unsigned int n_max_mmu_pages;
332b207d 459 unsigned int indirect_shadow_pages;
08e850c6 460 atomic_t invlpg_counter;
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461 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
462 /*
463 * Hash table of struct kvm_mmu_page.
464 */
465 struct list_head active_mmu_pages;
4d5c5d0f 466 struct list_head assigned_dev_head;
19de40a8 467 struct iommu_domain *iommu_domain;
522c68c4 468 int iommu_flags;
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469 struct kvm_pic *vpic;
470 struct kvm_ioapic *vioapic;
7837699f 471 struct kvm_pit *vpit;
cc6e462c 472 int vapics_in_nmi_mode;
bfc6d222 473
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474 unsigned int tss_addr;
475 struct page *apic_access_page;
18068523
GOC
476
477 gpa_t wall_clock;
b7ebfb05
SY
478
479 struct page *ept_identity_pagetable;
480 bool ept_identity_pagetable_done;
b927a3ce 481 gpa_t ept_identity_map_addr;
5550af4d
SY
482
483 unsigned long irq_sources_bitmap;
afbcf7ab 484 s64 kvmclock_offset;
038f8c11 485 raw_spinlock_t tsc_write_lock;
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ZA
486 u64 last_tsc_nsec;
487 u64 last_tsc_offset;
488 u64 last_tsc_write;
ffde22ac
ES
489
490 struct kvm_xen_hvm_config xen_hvm_config;
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GN
491
492 /* fields used by HYPER-V emulation */
493 u64 hv_guest_os_id;
494 u64 hv_hypercall;
b034cf01 495
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496 atomic_t reader_counter;
497
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498 #ifdef CONFIG_KVM_MMU_AUDIT
499 int audit_point;
500 #endif
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501};
502
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503struct kvm_vm_stat {
504 u32 mmu_shadow_zapped;
505 u32 mmu_pte_write;
506 u32 mmu_pte_updated;
507 u32 mmu_pde_zapped;
508 u32 mmu_flooded;
509 u32 mmu_recycled;
dfc5aa00 510 u32 mmu_cache_miss;
4731d4c7 511 u32 mmu_unsync;
0711456c 512 u32 remote_tlb_flush;
05da4558 513 u32 lpages;
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514};
515
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516struct kvm_vcpu_stat {
517 u32 pf_fixed;
518 u32 pf_guest;
519 u32 tlb_flush;
520 u32 invlpg;
521
522 u32 exits;
523 u32 io_exits;
524 u32 mmio_exits;
525 u32 signal_exits;
526 u32 irq_window_exits;
f08864b4 527 u32 nmi_window_exits;
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ZX
528 u32 halt_exits;
529 u32 halt_wakeup;
530 u32 request_irq_exits;
531 u32 irq_exits;
532 u32 host_state_reload;
533 u32 efer_reload;
534 u32 fpu_reload;
535 u32 insn_emulation;
536 u32 insn_emulation_fail;
f11c3a8d 537 u32 hypercalls;
fa89a817 538 u32 irq_injections;
c4abb7c9 539 u32 nmi_injections;
77b4c255 540};
ad312c7c 541
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542struct x86_instruction_info;
543
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544struct kvm_x86_ops {
545 int (*cpu_has_kvm_support)(void); /* __init */
546 int (*disabled_by_bios)(void); /* __init */
10474ae8 547 int (*hardware_enable)(void *dummy);
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548 void (*hardware_disable)(void *dummy);
549 void (*check_processor_compatibility)(void *rtn);
550 int (*hardware_setup)(void); /* __init */
551 void (*hardware_unsetup)(void); /* __exit */
774ead3a 552 bool (*cpu_has_accelerated_tpr)(void);
0e851880 553 void (*cpuid_update)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX
554
555 /* Create, but do not attach this VCPU */
556 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
557 void (*vcpu_free)(struct kvm_vcpu *vcpu);
558 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
559
560 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
561 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
562 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8 563
355be0b9
JK
564 void (*set_guest_debug)(struct kvm_vcpu *vcpu,
565 struct kvm_guest_debug *dbg);
ea4a5ff8
ZX
566 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
567 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
568 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
569 void (*get_segment)(struct kvm_vcpu *vcpu,
570 struct kvm_segment *var, int seg);
2e4d2653 571 int (*get_cpl)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX
572 void (*set_segment)(struct kvm_vcpu *vcpu,
573 struct kvm_segment *var, int seg);
574 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
e8467fda 575 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
aff48baa 576 void (*decache_cr3)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX
577 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
578 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
579 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
5e1746d6 580 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
ea4a5ff8 581 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
89a27f4d
GN
582 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
583 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
584 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
585 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
020df079 586 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
5fdbf976 587 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
ea4a5ff8
ZX
588 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
589 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
6b52d186 590 void (*fpu_activate)(struct kvm_vcpu *vcpu);
02daab21 591 void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
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ZX
592
593 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 594
851ba692
AK
595 void (*run)(struct kvm_vcpu *vcpu);
596 int (*handle_exit)(struct kvm_vcpu *vcpu);
ea4a5ff8 597 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
2809f5d2
GC
598 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
599 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
ea4a5ff8
ZX
600 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
601 unsigned char *hypercall_addr);
66fd3f7f 602 void (*set_irq)(struct kvm_vcpu *vcpu);
95ba8273 603 void (*set_nmi)(struct kvm_vcpu *vcpu);
298101da 604 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
ce7ddec4
JR
605 bool has_error_code, u32 error_code,
606 bool reinject);
b463a6f7 607 void (*cancel_injection)(struct kvm_vcpu *vcpu);
78646121 608 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
95ba8273 609 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
3cfc3092
JK
610 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
611 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
95ba8273
GN
612 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
613 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
614 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
ea4a5ff8 615 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 616 int (*get_tdp_level)(void);
4b12f0de 617 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
17cc3935 618 int (*get_lpage_level)(void);
4e47c7a6 619 bool (*rdtscp_supported)(void);
e48672fa 620 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment);
344f414f 621
1c97f0a0
JR
622 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
623
d4330ef2
JR
624 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
625
f5f48ee1
SY
626 bool (*has_wbinvd_exit)(void);
627
4051b188 628 void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz);
99e3e30a
ZA
629 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
630
857e4099
JR
631 u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
632
586f9607 633 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
8a76d7f2
JR
634
635 int (*check_intercept)(struct kvm_vcpu *vcpu,
636 struct x86_instruction_info *info,
637 enum x86_intercept_stage stage);
ea4a5ff8
ZX
638};
639
af585b92 640struct kvm_arch_async_pf {
7c90705b 641 u32 token;
af585b92 642 gfn_t gfn;
fb67e14f 643 unsigned long cr3;
c4806acd 644 bool direct_map;
af585b92
GN
645};
646
97896d04
ZX
647extern struct kvm_x86_ops *kvm_x86_ops;
648
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ZX
649int kvm_mmu_module_init(void);
650void kvm_mmu_module_exit(void);
651
652void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
653int kvm_mmu_create(struct kvm_vcpu *vcpu);
654int kvm_mmu_setup(struct kvm_vcpu *vcpu);
7b52345e 655void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
4b12f0de 656 u64 dirty_mask, u64 nx_mask, u64 x_mask);
54f1585a
ZX
657
658int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
659void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
660void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 661unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a
ZX
662void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
663
ff03a073 664int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
cc4b6871 665
3200f405 666int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 667 const void *val, int bytes);
2f333bcb
MT
668int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
669 gpa_t addr, unsigned long *ret);
4b12f0de 670u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
2f333bcb
MT
671
672extern bool tdp_enabled;
9f811285 673
92a1f12d
JR
674/* control of guest tsc rate supported? */
675extern bool kvm_has_tsc_control;
676/* minimum supported tsc_khz for guests */
677extern u32 kvm_min_guest_tsc_khz;
678/* maximum supported tsc_khz for guests */
679extern u32 kvm_max_guest_tsc_khz;
680
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ZX
681enum emulation_result {
682 EMULATE_DONE, /* no further processing */
683 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
684 EMULATE_FAIL, /* can't emulate this instruction */
685};
686
571008da
SY
687#define EMULTYPE_NO_DECODE (1 << 0)
688#define EMULTYPE_TRAP_UD (1 << 1)
ba8afb6b 689#define EMULTYPE_SKIP (1 << 2)
dc25e89e
AP
690int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
691 int emulation_type, void *insn, int insn_len);
51d8b661
AP
692
693static inline int emulate_instruction(struct kvm_vcpu *vcpu,
694 int emulation_type)
695{
dc25e89e 696 return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
51d8b661
AP
697}
698
f2b4b7dd 699void kvm_enable_efer_bits(u64);
54f1585a
ZX
700int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
701int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
702
703struct x86_emulate_ctxt;
704
cf8f70bf 705int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
54f1585a
ZX
706void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
707int kvm_emulate_halt(struct kvm_vcpu *vcpu);
f5f48ee1 708int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
54f1585a 709
3e6e0aab 710void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
c697518a 711int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
3e6e0aab 712
e269fb21
JK
713int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
714 bool has_error_code, u32 error_code);
37817f29 715
49a9b07e 716int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
2390218b 717int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
a83b29c6 718int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
eea1cff9 719int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
020df079
GN
720int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
721int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
2d3ad1f4
AK
722unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
723void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a 724void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
2acf923e 725int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
54f1585a
ZX
726
727int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
728int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
729
91586a3b
JK
730unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
731void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
732
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AK
733void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
734void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
ce7ddec4
JR
735void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
736void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
6389ee94 737void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
ec92fe44
JR
738int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
739 gfn_t gfn, void *data, int offset, int len,
740 u32 access);
6389ee94 741void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
0a79b009 742bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
298101da 743
4925663a 744int kvm_pic_set_irq(void *opaque, int irq, int level);
3de42dc0 745
3419ffc8
SY
746void kvm_inject_nmi(struct kvm_vcpu *vcpu);
747
10ab25cd 748int fx_init(struct kvm_vcpu *vcpu);
54f1585a 749
d835dfec 750void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a 751void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
ad218f85
MT
752 const u8 *new, int bytes,
753 bool guest_initiated);
54f1585a
ZX
754int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
755void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
756int kvm_mmu_load(struct kvm_vcpu *vcpu);
757void kvm_mmu_unload(struct kvm_vcpu *vcpu);
0ba73cda 758void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
ab9ae313
AK
759gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
760 struct x86_exception *exception);
761gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
762 struct x86_exception *exception);
763gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
764 struct x86_exception *exception);
765gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
766 struct x86_exception *exception);
54f1585a
ZX
767
768int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
769
dc25e89e
AP
770int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
771 void *insn, int insn_len);
a7052897 772void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
34c16eec 773
18552672 774void kvm_enable_tdp(void);
5f4cb662 775void kvm_disable_tdp(void);
18552672 776
de7d789a 777int complete_pio(struct kvm_vcpu *vcpu);
f850e2e6 778bool kvm_check_iopl(struct kvm_vcpu *vcpu);
ec6d273d
ZX
779
780static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
781{
782 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
783
784 return (struct kvm_mmu_page *)page_private(page);
785}
786
d6e88aec 787static inline u16 kvm_read_ldt(void)
ec6d273d
ZX
788{
789 u16 ldt;
790 asm("sldt %0" : "=g"(ldt));
791 return ldt;
792}
793
d6e88aec 794static inline void kvm_load_ldt(u16 sel)
ec6d273d
ZX
795{
796 asm("lldt %0" : : "rm"(sel));
797}
ec6d273d 798
ec6d273d
ZX
799#ifdef CONFIG_X86_64
800static inline unsigned long read_msr(unsigned long msr)
801{
802 u64 value;
803
804 rdmsrl(msr, value);
805 return value;
806}
807#endif
808
ec6d273d
ZX
809static inline u32 get_rdx_init_val(void)
810{
811 return 0x600; /* P6 family */
812}
813
c1a5d4f9
AK
814static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
815{
816 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
817}
818
ec6d273d
ZX
819#define TSS_IOPB_BASE_OFFSET 0x66
820#define TSS_BASE_SIZE 0x68
821#define TSS_IOPB_SIZE (65536 / 8)
822#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP
823#define RMODE_TSS_SIZE \
824 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 825
37817f29
IE
826enum {
827 TASK_SWITCH_CALL = 0,
828 TASK_SWITCH_IRET = 1,
829 TASK_SWITCH_JMP = 2,
830 TASK_SWITCH_GATE = 3,
831};
832
1371d904 833#define HF_GIF_MASK (1 << 0)
3d6368ef
AG
834#define HF_HIF_MASK (1 << 1)
835#define HF_VINTR_MASK (1 << 2)
95ba8273 836#define HF_NMI_MASK (1 << 3)
44c11430 837#define HF_IRET_MASK (1 << 4)
ec9e60b2 838#define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1371d904 839
4ecac3fd
AK
840/*
841 * Hardware virtualization extension instructions may fault if a
842 * reboot turns off virtualization while processes are running.
843 * Trap the fault and ignore the instruction if that happens.
844 */
b7c4145b
AK
845asmlinkage void kvm_spurious_fault(void);
846extern bool kvm_rebooting;
4ecac3fd 847
5e520e62 848#define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \
4ecac3fd 849 "666: " insn "\n\t" \
b7c4145b 850 "668: \n\t" \
18b13e54 851 ".pushsection .fixup, \"ax\" \n" \
4ecac3fd 852 "667: \n\t" \
5e520e62 853 cleanup_insn "\n\t" \
b7c4145b
AK
854 "cmpb $0, kvm_rebooting \n\t" \
855 "jne 668b \n\t" \
8ceed347 856 __ASM_SIZE(push) " $666b \n\t" \
b7c4145b 857 "call kvm_spurious_fault \n\t" \
4ecac3fd
AK
858 ".popsection \n\t" \
859 ".pushsection __ex_table, \"a\" \n\t" \
8ceed347 860 _ASM_PTR " 666b, 667b \n\t" \
4ecac3fd
AK
861 ".popsection"
862
5e520e62
AK
863#define __kvm_handle_fault_on_reboot(insn) \
864 ____kvm_handle_fault_on_reboot(insn, "")
865
e930bffe
AA
866#define KVM_ARCH_WANT_MMU_NOTIFIER
867int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
868int kvm_age_hva(struct kvm *kvm, unsigned long hva);
8ee53820 869int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
3da0dd43 870void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
82725b20 871int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
a1b37100
GN
872int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
873int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
0b71785d 874int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
e930bffe 875
18863bdd 876void kvm_define_shared_msr(unsigned index, u32 msr);
d5696725 877void kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
18863bdd 878
f92653ee
JK
879bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
880
af585b92
GN
881void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
882 struct kvm_async_pf *work);
883void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
884 struct kvm_async_pf *work);
56028d08
GN
885void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
886 struct kvm_async_pf *work);
7c90705b 887bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
af585b92
GN
888extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
889
db8fcefa
AP
890void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
891
1965aae3 892#endif /* _ASM_X86_KVM_HOST_H */