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KVM: Clean up kvm_x86_emulate.h
[mirror_ubuntu-hirsute-kernel.git] / arch / x86 / include / asm / kvm_host.h
CommitLineData
a656c8ef 1/*
043405e1
CO		 2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
1965aae3
PA		 11#ifndef _ASM_X86_KVM_HOST_H
12#define _ASM_X86_KVM_HOST_H
043405e1 13
34c16eec
ZX		 14#include <linux/types.h>
15#include <linux/mm.h>
e930bffe 16#include <linux/mmu_notifier.h>
34c16eec
ZX		 17
18#include <linux/kvm.h>
19#include <linux/kvm_para.h>
edf88417 20#include <linux/kvm_types.h>
34c16eec 21
50d0a0f9 22#include <asm/pvclock-abi.h>
e01a1b57 23#include <asm/desc.h>
0bed3b56 24#include <asm/mtrr.h>
e01a1b57 25
69a9f69b
AK		 26#define KVM_MAX_VCPUS 16
27#define KVM_MEMORY_SLOTS 32
28/* memory slots that does not exposed to userspace */
29#define KVM_PRIVATE_MEM_SLOTS 4
30
31#define KVM_PIO_PAGE_OFFSET 1
542472b5 32#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
69a9f69b 33
cd6e8f87
ZX		 34#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
35#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
7d76b4d3
JP		 36#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
37 0xFFFFFF0000000000ULL)
cd6e8f87 38
7d76b4d3 39#define KVM_GUEST_CR0_MASK \
cd6e8f87
ZX		 40 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
41 | X86_CR0_NW | X86_CR0_CD)
7d76b4d3 42#define KVM_VM_CR0_ALWAYS_ON \
cd6e8f87
ZX		 43 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
44 | X86_CR0_MP)
7d76b4d3 45#define KVM_GUEST_CR4_MASK \
cd6e8f87
ZX		 46 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
47#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
48#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
49
50#define INVALID_PAGE (~(hpa_t)0)
51#define UNMAPPED_GVA (~(gpa_t)0)
52
05da4558
MT		 53/* shadow tables are PAE even on non-PAE hosts */
54#define KVM_HPAGE_SHIFT 21
55#define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT)
56#define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1))
57
58#define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE)
59
cd6e8f87 60#define DE_VECTOR 0
19bd8afd 61#define DB_VECTOR 1
77ab6db0
JK		 62#define BP_VECTOR 3
63#define OF_VECTOR 4
64#define BR_VECTOR 5
cd6e8f87
ZX		 65#define UD_VECTOR 6
66#define NM_VECTOR 7
67#define DF_VECTOR 8
68#define TS_VECTOR 10
69#define NP_VECTOR 11
70#define SS_VECTOR 12
71#define GP_VECTOR 13
72#define PF_VECTOR 14
77ab6db0 73#define MF_VECTOR 16
53371b50 74#define MC_VECTOR 18
cd6e8f87
ZX		 75
76#define SELECTOR_TI_MASK (1 << 2)
77#define SELECTOR_RPL_MASK 0x03
78
79#define IOPL_SHIFT 12
80
d69fb81f
ZX		 81#define KVM_ALIAS_SLOTS 4
82
d657a98e
ZX		 83#define KVM_PERMILLE_MMU_PAGES 20
84#define KVM_MIN_ALLOC_MMU_PAGES 64
1ae0a13d
DE		 85#define KVM_MMU_HASH_SHIFT 10
86#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
d657a98e
ZX		 87#define KVM_MIN_FREE_MMU_PAGES 5
88#define KVM_REFILL_PAGES 25
89#define KVM_MAX_CPUID_ENTRIES 40
0bed3b56 90#define KVM_NR_FIXED_MTRR_REGION 88
9ba075a6 91#define KVM_NR_VAR_MTRR 8
d657a98e 92
e9b11c17
ZX		 93extern spinlock_t kvm_lock;
94extern struct list_head vm_list;
95
d657a98e
ZX		 96struct kvm_vcpu;
97struct kvm;
98
5fdbf976 99enum kvm_reg {
2b3ccfa0
ZX		 100 VCPU_REGS_RAX = 0,
101 VCPU_REGS_RCX = 1,
102 VCPU_REGS_RDX = 2,
103 VCPU_REGS_RBX = 3,
104 VCPU_REGS_RSP = 4,
105 VCPU_REGS_RBP = 5,
106 VCPU_REGS_RSI = 6,
107 VCPU_REGS_RDI = 7,
108#ifdef CONFIG_X86_64
109 VCPU_REGS_R8 = 8,
110 VCPU_REGS_R9 = 9,
111 VCPU_REGS_R10 = 10,
112 VCPU_REGS_R11 = 11,
113 VCPU_REGS_R12 = 12,
114 VCPU_REGS_R13 = 13,
115 VCPU_REGS_R14 = 14,
116 VCPU_REGS_R15 = 15,
117#endif
5fdbf976 118 VCPU_REGS_RIP,
2b3ccfa0
ZX		 119 NR_VCPU_REGS
120};
121
122enum {
81609e3e 123 VCPU_SREG_ES,
2b3ccfa0 124 VCPU_SREG_CS,
81609e3e 125 VCPU_SREG_SS,
2b3ccfa0 126 VCPU_SREG_DS,
2b3ccfa0
ZX		 127 VCPU_SREG_FS,
128 VCPU_SREG_GS,
2b3ccfa0
ZX		 129 VCPU_SREG_TR,
130 VCPU_SREG_LDTR,
131};
132
edf88417 133#include <asm/kvm_x86_emulate.h>
2b3ccfa0 134
d657a98e
ZX		 135#define KVM_NR_MEM_OBJS 40
136
69a9f69b
AK		 137struct kvm_guest_debug {
138 int enabled;
139 unsigned long bp[4];
140 int singlestep;
141};
142
d657a98e
ZX		 143/*
144 * We don't want allocation failures within the mmu code, so we preallocate
145 * enough memory for a single page fault in a cache.
146 */
147struct kvm_mmu_memory_cache {
148 int nobjs;
149 void *objects[KVM_NR_MEM_OBJS];
150};
151
152#define NR_PTE_CHAIN_ENTRIES 5
153
154struct kvm_pte_chain {
155 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
156 struct hlist_node link;
157};
158
159/*
160 * kvm_mmu_page_role, below, is defined as:
161 *
162 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
163 * bits 4:7 - page table level for this shadow (1-4)
164 * bits 8:9 - page table quadrant for 2-level guests
165 * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
166 * bits 17:19 - common access permissions for all ptes in this shadow page
167 */
168union kvm_mmu_page_role {
169 unsigned word;
170 struct {
7d76b4d3
JP		 171 unsigned glevels:4;
172 unsigned level:4;
173 unsigned quadrant:2;
174 unsigned pad_for_nice_hex_output:6;
175 unsigned metaphysical:1;
176 unsigned access:3;
2e53d63a 177 unsigned invalid:1;
d657a98e
ZX		 178 };
179};
180
181struct kvm_mmu_page {
182 struct list_head link;
183 struct hlist_node hash_link;
184
185 /*
186 * The following two entries are used to key the shadow page in the
187 * hash table.
188 */
189 gfn_t gfn;
190 union kvm_mmu_page_role role;
191
192 u64 *spt;
193 /* hold the gfn of each spte inside spt */
194 gfn_t *gfns;
195 unsigned long slot_bitmap; /* One bit set per slot which has memory
196 * in this shadow page.
197 */
198 int multimapped; /* More than one parent_pte? */
199 int root_count; /* Currently serving as active root */
4731d4c7
MT		 200 bool unsync;
201 bool unsync_children;
d657a98e
ZX		 202 union {
203 u64 *parent_pte; /* !multimapped */
204 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
205 };
0074ff63 206 DECLARE_BITMAP(unsync_child_bitmap, 512);
d657a98e
ZX		 207};
208
6ad18fba
DH		 209struct kvm_pv_mmu_op_buffer {
210 void *ptr;
211 unsigned len;
212 unsigned processed;
213 char buf[512] __aligned(sizeof(long));
214};
215
d657a98e
ZX		 216/*
217 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
218 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
219 * mode.
220 */
221struct kvm_mmu {
222 void (*new_cr3)(struct kvm_vcpu *vcpu);
223 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
224 void (*free)(struct kvm_vcpu *vcpu);
225 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
226 void (*prefetch_page)(struct kvm_vcpu *vcpu,
227 struct kvm_mmu_page *page);
e8bc217a
MT		 228 int (*sync_page)(struct kvm_vcpu *vcpu,
229 struct kvm_mmu_page *sp);
a7052897 230 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
d657a98e
ZX		 231 hpa_t root_hpa;
232 int root_level;
233 int shadow_root_level;
234
235 u64 *pae_root;
236};
237
ad312c7c 238struct kvm_vcpu_arch {
34c16eec
ZX		 239 u64 host_tsc;
240 int interrupt_window_open;
241 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
242 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
5fdbf976
MT		 243 /*
244 * rip and regs accesses must go through
245 * kvm_{register,rip}_{read,write} functions.
246 */
247 unsigned long regs[NR_VCPU_REGS];
248 u32 regs_avail;
249 u32 regs_dirty;
34c16eec
ZX		 250
251 unsigned long cr0;
252 unsigned long cr2;
253 unsigned long cr3;
254 unsigned long cr4;
255 unsigned long cr8;
256 u64 pdptrs[4]; /* pae */
257 u64 shadow_efer;
258 u64 apic_base;
259 struct kvm_lapic *apic; /* kernel irqchip context */
34c16eec
ZX		 260 int mp_state;
261 int sipi_vector;
262 u64 ia32_misc_enable_msr;
b209749f 263 bool tpr_access_reporting;
34c16eec
ZX		 264
265 struct kvm_mmu mmu;
6ad18fba
DH		 266 /* only needed in kvm_pv_mmu_op() path, but it's hot so
267 * put it here to avoid allocation */
268 struct kvm_pv_mmu_op_buffer mmu_op_buffer;
34c16eec
ZX		 269
270 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
271 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
272 struct kvm_mmu_memory_cache mmu_page_cache;
273 struct kvm_mmu_memory_cache mmu_page_header_cache;
274
275 gfn_t last_pt_write_gfn;
276 int last_pt_write_count;
277 u64 *last_pte_updated;
1b7fcd32 278 gfn_t last_pte_gfn;
34c16eec 279
d7824fff 280 struct {
35149e21
AL		 281 gfn_t gfn; /* presumed gfn during guest pte update */
282 pfn_t pfn; /* pfn corresponding to that gfn */
05da4558 283 int largepage;
e930bffe 284 unsigned long mmu_seq;
d7824fff
AK		 285 } update_pte;
286
34c16eec
ZX		 287 struct i387_fxsave_struct host_fx_image;
288 struct i387_fxsave_struct guest_fx_image;
289
290 gva_t mmio_fault_cr2;
291 struct kvm_pio_request pio;
292 void *pio_data;
293
298101da
AK		 294 struct kvm_queued_exception {
295 bool pending;
296 bool has_error_code;
297 u8 nr;
298 u32 error_code;
299 } exception;
300
937a7eae
AK		 301 struct kvm_queued_interrupt {
302 bool pending;
303 u8 nr;
304 } interrupt;
305
34c16eec
ZX		 306 struct {
307 int active;
308 u8 save_iopl;
309 struct kvm_save_segment {
310 u16 selector;
311 unsigned long base;
312 u32 limit;
313 u32 ar;
314 } tr, es, ds, fs, gs;
315 } rmode;
316 int halt_request; /* real mode on Intel only */
317
318 int cpuid_nent;
07716717 319 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
34c16eec
ZX		 320 /* emulate context */
321
322 struct x86_emulate_ctxt emulate_ctxt;
18068523
GOC		 323
324 gpa_t time;
50d0a0f9
GH		 325 struct pvclock_vcpu_time_info hv_clock;
326 unsigned int hv_clock_tsc_khz;
18068523
GOC		 327 unsigned int time_offset;
328 struct page *time_page;
3419ffc8
SY		 329
330 bool nmi_pending;
668f612f 331 bool nmi_injected;
33f089ca 332 bool nmi_window_open;
9ba075a6 333
0bed3b56
SY		 334 struct mtrr_state_type mtrr_state;
335 u32 pat;
34c16eec
ZX		 336};
337
d69fb81f
ZX		 338struct kvm_mem_alias {
339 gfn_t base_gfn;
340 unsigned long npages;
341 gfn_t target_gfn;
342};
343
344struct kvm_arch{
345 int naliases;
346 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
f05e70ac
ZX		 347
348 unsigned int n_free_mmu_pages;
349 unsigned int n_requested_mmu_pages;
350 unsigned int n_alloc_mmu_pages;
351 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
352 /*
353 * Hash table of struct kvm_mmu_page.
354 */
355 struct list_head active_mmu_pages;
4d5c5d0f 356 struct list_head assigned_dev_head;
62c476c7 357 struct dmar_domain *intel_iommu_domain;
d7deeeb0
ZX		 358 struct kvm_pic *vpic;
359 struct kvm_ioapic *vioapic;
7837699f 360 struct kvm_pit *vpit;
564f1537 361 struct hlist_head irq_ack_notifier_list;
bfc6d222
ZX		 362
363 int round_robin_prev_vcpu;
364 unsigned int tss_addr;
365 struct page *apic_access_page;
18068523
GOC		 366
367 gpa_t wall_clock;
b7ebfb05
SY		 368
369 struct page *ept_identity_pagetable;
370 bool ept_identity_pagetable_done;
5550af4d
SY		 371
372 unsigned long irq_sources_bitmap;
373 unsigned long irq_states[KVM_IOAPIC_NUM_PINS];
d69fb81f
ZX		 374};
375
0711456c
ZX		 376struct kvm_vm_stat {
377 u32 mmu_shadow_zapped;
378 u32 mmu_pte_write;
379 u32 mmu_pte_updated;
380 u32 mmu_pde_zapped;
381 u32 mmu_flooded;
382 u32 mmu_recycled;
dfc5aa00 383 u32 mmu_cache_miss;
4731d4c7 384 u32 mmu_unsync;
0711456c 385 u32 remote_tlb_flush;
05da4558 386 u32 lpages;
0711456c
ZX		 387};
388
77b4c255
ZX		 389struct kvm_vcpu_stat {
390 u32 pf_fixed;
391 u32 pf_guest;
392 u32 tlb_flush;
393 u32 invlpg;
394
395 u32 exits;
396 u32 io_exits;
397 u32 mmio_exits;
398 u32 signal_exits;
399 u32 irq_window_exits;
f08864b4 400 u32 nmi_window_exits;
77b4c255
ZX		 401 u32 halt_exits;
402 u32 halt_wakeup;
403 u32 request_irq_exits;
c4abb7c9 404 u32 request_nmi_exits;
77b4c255
ZX		 405 u32 irq_exits;
406 u32 host_state_reload;
407 u32 efer_reload;
408 u32 fpu_reload;
409 u32 insn_emulation;
410 u32 insn_emulation_fail;
f11c3a8d 411 u32 hypercalls;
fa89a817 412 u32 irq_injections;
c4abb7c9 413 u32 nmi_injections;
77b4c255 414};
ad312c7c 415
e01a1b57
HB		 416struct descriptor_table {
417 u16 limit;
418 unsigned long base;
419} __attribute__((packed));
420
ea4a5ff8
ZX		 421struct kvm_x86_ops {
422 int (*cpu_has_kvm_support)(void); /* __init */
423 int (*disabled_by_bios)(void); /* __init */
424 void (*hardware_enable)(void *dummy); /* __init */
425 void (*hardware_disable)(void *dummy);
426 void (*check_processor_compatibility)(void *rtn);
427 int (*hardware_setup)(void); /* __init */
428 void (*hardware_unsetup)(void); /* __exit */
774ead3a 429 bool (*cpu_has_accelerated_tpr)(void);
ea4a5ff8
ZX		 430
431 /* Create, but do not attach this VCPU */
432 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
433 void (*vcpu_free)(struct kvm_vcpu *vcpu);
434 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
435
436 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
437 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
438 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 439
440 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
441 struct kvm_debug_guest *dbg);
442 void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
443 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
444 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
445 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
446 void (*get_segment)(struct kvm_vcpu *vcpu,
447 struct kvm_segment *var, int seg);
2e4d2653 448 int (*get_cpl)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 449 void (*set_segment)(struct kvm_vcpu *vcpu,
450 struct kvm_segment *var, int seg);
451 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
452 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
453 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
454 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
455 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
456 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
457 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
458 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
459 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
460 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
461 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
462 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
463 int *exception);
5fdbf976 464 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
ea4a5ff8
ZX		 465 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
466 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
467
468 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 469
ea4a5ff8
ZX		 470 void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
471 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
472 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
473 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
474 unsigned char *hypercall_addr);
475 int (*get_irq)(struct kvm_vcpu *vcpu);
476 void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
298101da
AK		 477 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
478 bool has_error_code, u32 error_code);
479 bool (*exception_injected)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 480 void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
481 void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
482 struct kvm_run *run);
483
484 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 485 int (*get_tdp_level)(void);
64d4d521 486 int (*get_mt_mask_shift)(void);
ea4a5ff8
ZX		 487};
488
97896d04
ZX		 489extern struct kvm_x86_ops *kvm_x86_ops;
490
54f1585a
ZX		 491int kvm_mmu_module_init(void);
492void kvm_mmu_module_exit(void);
493
494void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
495int kvm_mmu_create(struct kvm_vcpu *vcpu);
496int kvm_mmu_setup(struct kvm_vcpu *vcpu);
497void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e
SY		 498void kvm_mmu_set_base_ptes(u64 base_pte);
499void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
64d4d521 500 u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask);
54f1585a
ZX		 501
502int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
503void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
504void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 505unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a
ZX		 506void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
507
cc4b6871
JR		 508int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
509
3200f405 510int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 511 const void *val, int bytes);
2f333bcb
MT		 512int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
513 gpa_t addr, unsigned long *ret);
514
515extern bool tdp_enabled;
9f811285 516
54f1585a
ZX		 517enum emulation_result {
518 EMULATE_DONE, /* no further processing */
519 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
520 EMULATE_FAIL, /* can't emulate this instruction */
521};
522
571008da
SY		 523#define EMULTYPE_NO_DECODE (1 << 0)
524#define EMULTYPE_TRAP_UD (1 << 1)
54f1585a 525int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
571008da 526 unsigned long cr2, u16 error_code, int emulation_type);
54f1585a
ZX		 527void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
528void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
529void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
530void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
531 unsigned long *rflags);
532
533unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
534void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
535 unsigned long *rflags);
f2b4b7dd 536void kvm_enable_efer_bits(u64);
54f1585a
ZX		 537int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
538int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
539
540struct x86_emulate_ctxt;
541
542int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
543 int size, unsigned port);
544int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
545 int size, unsigned long count, int down,
546 gva_t address, int rep, unsigned port);
547void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
548int kvm_emulate_halt(struct kvm_vcpu *vcpu);
549int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
550int emulate_clts(struct kvm_vcpu *vcpu);
551int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
552 unsigned long *dest);
553int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
554 unsigned long value);
555
3e6e0aab
GT		 556void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
557int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
558 int type_bits, int seg);
559
37817f29
IE		 560int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
561
2d3ad1f4 562void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
9c20456a
JR		 563void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
564void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
565void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2d3ad1f4
AK		 566unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
567void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a
ZX		 568void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
569
570int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
571int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
572
298101da
AK		 573void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
574void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee
AK		 575void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
576 u32 error_code);
298101da 577
3de42dc0
XZ		 578void kvm_pic_set_irq(void *opaque, int irq, int level);
579
3419ffc8
SY		 580void kvm_inject_nmi(struct kvm_vcpu *vcpu);
581
54f1585a
ZX		 582void fx_init(struct kvm_vcpu *vcpu);
583
584int emulator_read_std(unsigned long addr,
585 void *val,
586 unsigned int bytes,
587 struct kvm_vcpu *vcpu);
588int emulator_write_emulated(unsigned long addr,
589 const void *val,
590 unsigned int bytes,
591 struct kvm_vcpu *vcpu);
592
593unsigned long segment_base(u16 selector);
594
d835dfec 595void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a
ZX		 596void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
597 const u8 *new, int bytes);
598int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
599void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
600int kvm_mmu_load(struct kvm_vcpu *vcpu);
601void kvm_mmu_unload(struct kvm_vcpu *vcpu);
0ba73cda 602void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
54f1585a
ZX		 603
604int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
605
606int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
607
3067714c 608int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
a7052897 609void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
34c16eec 610
18552672 611void kvm_enable_tdp(void);
5f4cb662 612void kvm_disable_tdp(void);
18552672 613
a03490ed 614int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a 615int complete_pio(struct kvm_vcpu *vcpu);
ec6d273d
ZX		 616
617static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
618{
619 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
620
621 return (struct kvm_mmu_page *)page_private(page);
622}
623
d6e88aec 624static inline u16 kvm_read_fs(void)
ec6d273d
ZX		 625{
626 u16 seg;
627 asm("mov %%fs, %0" : "=g"(seg));
628 return seg;
629}
630
d6e88aec 631static inline u16 kvm_read_gs(void)
ec6d273d
ZX		 632{
633 u16 seg;
634 asm("mov %%gs, %0" : "=g"(seg));
635 return seg;
636}
637
d6e88aec 638static inline u16 kvm_read_ldt(void)
ec6d273d
ZX		 639{
640 u16 ldt;
641 asm("sldt %0" : "=g"(ldt));
642 return ldt;
643}
644
d6e88aec 645static inline void kvm_load_fs(u16 sel)
ec6d273d
ZX		 646{
647 asm("mov %0, %%fs" : : "rm"(sel));
648}
649
d6e88aec 650static inline void kvm_load_gs(u16 sel)
ec6d273d
ZX		 651{
652 asm("mov %0, %%gs" : : "rm"(sel));
653}
654
d6e88aec 655static inline void kvm_load_ldt(u16 sel)
ec6d273d
ZX		 656{
657 asm("lldt %0" : : "rm"(sel));
658}
ec6d273d 659
d6e88aec 660static inline void kvm_get_idt(struct descriptor_table *table)
ec6d273d
ZX		 661{
662 asm("sidt %0" : "=m"(*table));
663}
664
d6e88aec 665static inline void kvm_get_gdt(struct descriptor_table *table)
ec6d273d
ZX		 666{
667 asm("sgdt %0" : "=m"(*table));
668}
669
d6e88aec 670static inline unsigned long kvm_read_tr_base(void)
ec6d273d
ZX		 671{
672 u16 tr;
673 asm("str %0" : "=g"(tr));
674 return segment_base(tr);
675}
676
677#ifdef CONFIG_X86_64
678static inline unsigned long read_msr(unsigned long msr)
679{
680 u64 value;
681
682 rdmsrl(msr, value);
683 return value;
684}
685#endif
686
d6e88aec 687static inline void kvm_fx_save(struct i387_fxsave_struct *image)
ec6d273d
ZX		 688{
689 asm("fxsave (%0)":: "r" (image));
690}
691
d6e88aec 692static inline void kvm_fx_restore(struct i387_fxsave_struct *image)
ec6d273d
ZX		 693{
694 asm("fxrstor (%0)":: "r" (image));
695}
696
d6e88aec 697static inline void kvm_fx_finit(void)
ec6d273d
ZX		 698{
699 asm("finit");
700}
701
702static inline u32 get_rdx_init_val(void)
703{
704 return 0x600; /* P6 family */
705}
706
c1a5d4f9
AK		 707static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
708{
709 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
710}
711
ec6d273d
ZX		 712#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
713#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
714#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
715#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
716#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
717#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
718#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
719#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
720#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
1439442c 721#define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08"
2384d2b3 722#define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"
ec6d273d
ZX		 723
724#define MSR_IA32_TIME_STAMP_COUNTER 0x010
725
726#define TSS_IOPB_BASE_OFFSET 0x66
727#define TSS_BASE_SIZE 0x68
728#define TSS_IOPB_SIZE (65536 / 8)
729#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP		 730#define RMODE_TSS_SIZE \
731 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 732
37817f29
IE		 733enum {
734 TASK_SWITCH_CALL = 0,
735 TASK_SWITCH_IRET = 1,
736 TASK_SWITCH_JMP = 2,
737 TASK_SWITCH_GATE = 3,
738};
739
4ecac3fd
AK		 740/*
741 * Hardware virtualization extension instructions may fault if a
742 * reboot turns off virtualization while processes are running.
743 * Trap the fault and ignore the instruction if that happens.
744 */
745asmlinkage void kvm_handle_fault_on_reboot(void);
746
747#define __kvm_handle_fault_on_reboot(insn) \
748 "666: " insn "\n\t" \
18b13e54 749 ".pushsection .fixup, \"ax\" \n" \
4ecac3fd 750 "667: \n\t" \
8ceed347 751 __ASM_SIZE(push) " $666b \n\t" \
4ecac3fd
AK		 752 "jmp kvm_handle_fault_on_reboot \n\t" \
753 ".popsection \n\t" \
754 ".pushsection __ex_table, \"a\" \n\t" \
8ceed347 755 _ASM_PTR " 666b, 667b \n\t" \
4ecac3fd
AK		 756 ".popsection"
757
e930bffe
AA		 758#define KVM_ARCH_WANT_MMU_NOTIFIER
759int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
760int kvm_age_hva(struct kvm *kvm, unsigned long hva);
761
1965aae3 762#endif /* _ASM_X86_KVM_HOST_H */
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