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1965aae3 PA |
1 | #ifndef _ASM_X86_KVM_PARA_H |
2 | #define _ASM_X86_KVM_PARA_H | |
5f43238d | 3 | |
fa6870c6 | 4 | #include <linux/types.h> |
55cd8e5a | 5 | #include <asm/hyperv.h> |
fa6870c6 | 6 | |
5f43238d CB |
7 | /* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx. It |
8 | * should be used to determine that a VM is running under KVM. | |
9 | */ | |
10 | #define KVM_CPUID_SIGNATURE 0x40000000 | |
11 | ||
12 | /* This CPUID returns a feature bitmap in eax. Before enabling a particular | |
13 | * paravirtualization, the appropriate feature bit should be checked. | |
14 | */ | |
15 | #define KVM_CPUID_FEATURES 0x40000001 | |
a28e4f5a MT |
16 | #define KVM_FEATURE_CLOCKSOURCE 0 |
17 | #define KVM_FEATURE_NOP_IO_DELAY 1 | |
2f333bcb | 18 | #define KVM_FEATURE_MMU_OP 2 |
18068523 GOC |
19 | |
20 | #define MSR_KVM_WALL_CLOCK 0x11 | |
21 | #define MSR_KVM_SYSTEM_TIME 0x12 | |
5f43238d | 22 | |
2f333bcb MT |
23 | #define KVM_MAX_MMU_OP_BATCH 32 |
24 | ||
25 | /* Operations for KVM_HC_MMU_OP */ | |
26 | #define KVM_MMU_OP_WRITE_PTE 1 | |
27 | #define KVM_MMU_OP_FLUSH_TLB 2 | |
28 | #define KVM_MMU_OP_RELEASE_PT 3 | |
29 | ||
30 | /* Payload for KVM_HC_MMU_OP */ | |
31 | struct kvm_mmu_op_header { | |
32 | __u32 op; | |
33 | __u32 pad; | |
34 | }; | |
35 | ||
36 | struct kvm_mmu_op_write_pte { | |
37 | struct kvm_mmu_op_header header; | |
38 | __u64 pte_phys; | |
39 | __u64 pte_val; | |
40 | }; | |
41 | ||
42 | struct kvm_mmu_op_flush_tlb { | |
43 | struct kvm_mmu_op_header header; | |
44 | }; | |
45 | ||
46 | struct kvm_mmu_op_release_pt { | |
47 | struct kvm_mmu_op_header header; | |
48 | __u64 pt_phys; | |
49 | }; | |
50 | ||
5f43238d CB |
51 | #ifdef __KERNEL__ |
52 | #include <asm/processor.h> | |
53 | ||
18068523 GOC |
54 | extern void kvmclock_init(void); |
55 | ||
56 | ||
5f43238d CB |
57 | /* This instruction is vmcall. On non-VT architectures, it will generate a |
58 | * trap that we will then rewrite to the appropriate instruction. | |
59 | */ | |
60 | #define KVM_HYPERCALL ".byte 0x0f,0x01,0xc1" | |
61 | ||
62 | /* For KVM hypercalls, a three-byte sequence of either the vmrun or the vmmrun | |
63 | * instruction. The hypervisor may replace it with something else but only the | |
64 | * instructions are guaranteed to be supported. | |
65 | * | |
66 | * Up to four arguments may be passed in rbx, rcx, rdx, and rsi respectively. | |
67 | * The hypercall number should be placed in rax and the return value will be | |
68 | * placed in rax. No other registers will be clobbered unless explicited | |
69 | * noted by the particular hypercall. | |
70 | */ | |
71 | ||
72 | static inline long kvm_hypercall0(unsigned int nr) | |
73 | { | |
74 | long ret; | |
75 | asm volatile(KVM_HYPERCALL | |
76 | : "=a"(ret) | |
ca373932 AL |
77 | : "a"(nr) |
78 | : "memory"); | |
5f43238d CB |
79 | return ret; |
80 | } | |
81 | ||
82 | static inline long kvm_hypercall1(unsigned int nr, unsigned long p1) | |
83 | { | |
84 | long ret; | |
85 | asm volatile(KVM_HYPERCALL | |
86 | : "=a"(ret) | |
ca373932 AL |
87 | : "a"(nr), "b"(p1) |
88 | : "memory"); | |
5f43238d CB |
89 | return ret; |
90 | } | |
91 | ||
92 | static inline long kvm_hypercall2(unsigned int nr, unsigned long p1, | |
93 | unsigned long p2) | |
94 | { | |
95 | long ret; | |
96 | asm volatile(KVM_HYPERCALL | |
97 | : "=a"(ret) | |
ca373932 AL |
98 | : "a"(nr), "b"(p1), "c"(p2) |
99 | : "memory"); | |
5f43238d CB |
100 | return ret; |
101 | } | |
102 | ||
103 | static inline long kvm_hypercall3(unsigned int nr, unsigned long p1, | |
104 | unsigned long p2, unsigned long p3) | |
105 | { | |
106 | long ret; | |
107 | asm volatile(KVM_HYPERCALL | |
108 | : "=a"(ret) | |
ca373932 AL |
109 | : "a"(nr), "b"(p1), "c"(p2), "d"(p3) |
110 | : "memory"); | |
5f43238d CB |
111 | return ret; |
112 | } | |
113 | ||
114 | static inline long kvm_hypercall4(unsigned int nr, unsigned long p1, | |
115 | unsigned long p2, unsigned long p3, | |
116 | unsigned long p4) | |
117 | { | |
118 | long ret; | |
119 | asm volatile(KVM_HYPERCALL | |
120 | : "=a"(ret) | |
ca373932 AL |
121 | : "a"(nr), "b"(p1), "c"(p2), "d"(p3), "S"(p4) |
122 | : "memory"); | |
5f43238d CB |
123 | return ret; |
124 | } | |
125 | ||
126 | static inline int kvm_para_available(void) | |
127 | { | |
128 | unsigned int eax, ebx, ecx, edx; | |
129 | char signature[13]; | |
130 | ||
131 | cpuid(KVM_CPUID_SIGNATURE, &eax, &ebx, &ecx, &edx); | |
132 | memcpy(signature + 0, &ebx, 4); | |
133 | memcpy(signature + 4, &ecx, 4); | |
134 | memcpy(signature + 8, &edx, 4); | |
135 | signature[12] = 0; | |
136 | ||
137 | if (strcmp(signature, "KVMKVMKVM") == 0) | |
138 | return 1; | |
139 | ||
140 | return 0; | |
141 | } | |
142 | ||
143 | static inline unsigned int kvm_arch_para_features(void) | |
144 | { | |
145 | return cpuid_eax(KVM_CPUID_FEATURES); | |
146 | } | |
147 | ||
148 | #endif | |
149 | ||
1965aae3 | 150 | #endif /* _ASM_X86_KVM_PARA_H */ |