]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - arch/x86/include/asm/mpspec.h
x86: delete __cpuinit usage from all x86 files
[mirror_ubuntu-artful-kernel.git] / arch / x86 / include / asm / mpspec.h
CommitLineData
1965aae3
PA
1#ifndef _ASM_X86_MPSPEC_H
2#define _ASM_X86_MPSPEC_H
c2805aa1 3
86c9835b
IM
4#include <linux/init.h>
5
c2805aa1 6#include <asm/mpspec_def.h>
b3f1b617 7#include <asm/x86_init.h>
cb2ded37 8#include <asm/apicdef.h>
c2805aa1 9
56d91f13 10extern int apic_version[];
a1ae299d 11extern int pic_mode;
11494547 12
96a388de 13#ifdef CONFIG_X86_32
b2af018f
IM
14
15/*
16 * Summit or generic (i.e. installer) kernels need lots of bus entries.
17 * Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets.
18 */
19#if CONFIG_BASE_SMALL == 0
20# define MAX_MP_BUSSES 260
21#else
22# define MAX_MP_BUSSES 32
23#endif
24
25#define MAX_IRQ_SOURCES 256
c2805aa1 26
c2805aa1 27extern unsigned int def_to_bigsmp;
c2805aa1 28
d49c4288
YL
29#ifdef CONFIG_X86_NUMAQ
30extern int mp_bus_id_to_node[MAX_MP_BUSSES];
31extern int mp_bus_id_to_local[MAX_MP_BUSSES];
32extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
33#endif
34
b2af018f 35#else /* CONFIG_X86_64: */
c2805aa1 36
b2af018f 37#define MAX_MP_BUSSES 256
c2805aa1 38/* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
b2af018f 39#define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
c2805aa1 40
b2af018f 41#endif /* CONFIG_X86_64 */
ab530e1f 42
bb8187d3 43#ifdef CONFIG_EISA
c0a282c2
AS
44extern int mp_bus_id_to_type[MAX_MP_BUSSES];
45#endif
46
a6333c3c 47extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
c0a282c2 48
c2805aa1 49extern unsigned int boot_cpu_physical_apicid;
e0da3364 50extern unsigned int max_physical_apicid;
c2805aa1
TG
51extern int mpc_default_type;
52extern unsigned long mp_lapic_addr;
53
b3f1b617
TG
54#ifdef CONFIG_X86_LOCAL_APIC
55extern int smp_found_config;
56#else
57# define smp_found_config 0
58#endif
59
60static inline void get_smp_config(void)
61{
62 x86_init.mpparse.get_smp_config(0);
63}
64
65static inline void early_get_smp_config(void)
66{
67 x86_init.mpparse.get_smp_config(1);
68}
69
70static inline void find_smp_config(void)
71{
b24c2a92 72 x86_init.mpparse.find_smp_config();
b3f1b617 73}
550fe4f1 74
af1cf204 75#ifdef CONFIG_X86_MPPARSE
2944e16b 76extern void early_reserve_e820_mpc_new(void);
abfe0af9 77extern int enable_update_mptable;
fd6c6661 78extern int default_mpc_apic_id(struct mpc_cpu *m);
72302142 79extern void default_smp_read_mpc_oem(struct mpc_table *mpc);
90e1c696
TG
80# ifdef CONFIG_X86_IO_APIC
81extern void default_mpc_oem_bus_info(struct mpc_bus *m, char *str);
82# else
83# define default_mpc_oem_bus_info NULL
84# endif
b24c2a92 85extern void default_find_smp_config(void);
b3f1b617 86extern void default_get_smp_config(unsigned int early);
af1cf204
IM
87#else
88static inline void early_reserve_e820_mpc_new(void) { }
abfe0af9 89#define enable_update_mptable 0
fd6c6661 90#define default_mpc_apic_id NULL
72302142 91#define default_smp_read_mpc_oem NULL
90e1c696 92#define default_mpc_oem_bus_info NULL
b24c2a92 93#define default_find_smp_config x86_init_noop
b3f1b617 94#define default_get_smp_config x86_init_uint_noop
af1cf204 95#endif
c2805aa1 96
148f9bb8 97void generic_processor_info(int apicid, int version);
c2805aa1 98#ifdef CONFIG_ACPI
a65d1d64 99extern void mp_register_ioapic(int id, u32 address, u32 gsi_base);
c2805aa1
TG
100extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
101 u32 gsi);
102extern void mp_config_acpi_legacy_irqs(void);
a2f809b0
YL
103struct device;
104extern int mp_register_gsi(struct device *dev, u32 gsi, int edge_level,
105 int active_high_low);
c2805aa1
TG
106#endif /* CONFIG_ACPI */
107
cb2ded37 108#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_LOCAL_APIC)
c2805aa1 109
30971e17 110struct physid_mask {
c2805aa1
TG
111 unsigned long mask[PHYSID_ARRAY_SIZE];
112};
113
114typedef struct physid_mask physid_mask_t;
115
116#define physid_set(physid, map) set_bit(physid, (map).mask)
117#define physid_clear(physid, map) clear_bit(physid, (map).mask)
118#define physid_isset(physid, map) test_bit(physid, (map).mask)
30971e17 119#define physid_test_and_set(physid, map) \
c2805aa1
TG
120 test_and_set_bit(physid, (map).mask)
121
30971e17 122#define physids_and(dst, src1, src2) \
cb2ded37 123 bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC)
c2805aa1 124
30971e17 125#define physids_or(dst, src1, src2) \
cb2ded37 126 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC)
c2805aa1 127
30971e17 128#define physids_clear(map) \
cb2ded37 129 bitmap_zero((map).mask, MAX_LOCAL_APIC)
c2805aa1 130
30971e17 131#define physids_complement(dst, src) \
cb2ded37 132 bitmap_complement((dst).mask, (src).mask, MAX_LOCAL_APIC)
c2805aa1 133
30971e17 134#define physids_empty(map) \
cb2ded37 135 bitmap_empty((map).mask, MAX_LOCAL_APIC)
c2805aa1 136
30971e17 137#define physids_equal(map1, map2) \
cb2ded37 138 bitmap_equal((map1).mask, (map2).mask, MAX_LOCAL_APIC)
c2805aa1 139
30971e17 140#define physids_weight(map) \
cb2ded37 141 bitmap_weight((map).mask, MAX_LOCAL_APIC)
c2805aa1 142
30971e17 143#define physids_shift_right(d, s, n) \
cb2ded37 144 bitmap_shift_right((d).mask, (s).mask, n, MAX_LOCAL_APIC)
c2805aa1 145
30971e17 146#define physids_shift_left(d, s, n) \
cb2ded37 147 bitmap_shift_left((d).mask, (s).mask, n, MAX_LOCAL_APIC)
c2805aa1 148
7abc0753
CG
149static inline unsigned long physids_coerce(physid_mask_t *map)
150{
151 return map->mask[0];
152}
c2805aa1 153
7abc0753
CG
154static inline void physids_promote(unsigned long physids, physid_mask_t *map)
155{
156 physids_clear(*map);
157 map->mask[0] = physids;
158}
c2805aa1 159
b6df1b8b
JS
160static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
161{
162 physids_clear(*map);
163 physid_set(physid, *map);
164}
165
c2805aa1
TG
166#define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
167#define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
168
169extern physid_mask_t phys_cpu_present_map;
170
fb5b33c9
IM
171extern int generic_mps_oem_check(struct mpc_table *, char *, char *);
172
173extern int default_acpi_madt_oem_check(char *, char *);
174
1965aae3 175#endif /* _ASM_X86_MPSPEC_H */