[mirror_ubuntu-artful-kernel.git] / arch / x86 / include / asm / nospec-branch.h

/* SPDX-License-Identifier: GPL-2.0 */

#ifndef __NOSPEC_BRANCH_H__
#define __NOSPEC_BRANCH_H__

#include <asm/alternative.h>
#include <asm/alternative-asm.h>
#include <asm/cpufeatures.h>

/*
 * Fill the CPU return stack buffer.
 *
 * Each entry in the RSB, if used for a speculative 'ret', contains an
 * infinite 'pause; jmp' loop to capture speculative execution.
 *
 * This is required in various cases for retpoline and IBRS-based
 * mitigations for the Spectre variant 2 vulnerability. Sometimes to
 * eliminate potentially bogus entries from the RSB, and sometimes
 * purely to ensure that it doesn't get empty, which on some CPUs would
 * allow predictions from other (unwanted!) sources to be used.
 *
 * We define a CPP macro such that it can be used from both .S files and
 * inline assembly. It's possible to do a .macro and then include that
 * from C via asm(".include <asm/nospec-branch.h>") but let's not go there.
 */

#define RSB_CLEAR_LOOPS		32	/* To forcibly overwrite all entries */
#define RSB_FILL_LOOPS		16	/* To avoid underflow */

/*
 * Google experimented with loop-unrolling and this turned out to be
 * the optimal version — two calls, each with their own speculation
 * trap should their return address end up getting used, in a loop.
 */
#define __FILL_RETURN_BUFFER(reg, nr, sp)	\
	mov	$(nr/2), reg;			\
771:						\
	call	772f;				\
773:	/* speculation trap */			\
	pause;					\
	jmp	773b;				\
772:						\
	call	774f;				\
775:	/* speculation trap */			\
	pause;					\
	jmp	775b;				\
774:						\
	dec	reg;				\
	jnz	771b;				\
	add	$(BITS_PER_LONG/8) * nr, sp;

#ifdef __ASSEMBLY__

/*
 * This should be used immediately before a retpoline alternative.  It tells
 * objtool where the retpolines are so that it can make sense of the control
 * flow by just reading the original instruction(s) and ignoring the
 * alternatives.
 */
.macro ANNOTATE_NOSPEC_ALTERNATIVE
	.Lannotate_\@:
	.pushsection .discard.nospec
	.long .Lannotate_\@ - .
	.popsection
.endm

/*
 * These are the bare retpoline primitives for indirect jmp and call.
 * Do not use these directly; they only exist to make the ALTERNATIVE
 * invocation below less ugly.
 */
.macro RETPOLINE_JMP reg:req
	call	.Ldo_rop_\@
.Lspec_trap_\@:
	pause
	jmp	.Lspec_trap_\@
.Ldo_rop_\@:
	mov	\reg, (%_ASM_SP)
	ret
.endm

/*
 * This is a wrapper around RETPOLINE_JMP so the called function in reg
 * returns to the instruction after the macro.
 */
.macro RETPOLINE_CALL reg:req
	jmp	.Ldo_call_\@
.Ldo_retpoline_jmp_\@:
	RETPOLINE_JMP \reg
.Ldo_call_\@:
	call	.Ldo_retpoline_jmp_\@
.endm

/*
 * JMP_NOSPEC and CALL_NOSPEC macros can be used instead of a simple
 * indirect jmp/call which may be susceptible to the Spectre variant 2
 * attack.
 */
.macro JMP_NOSPEC reg:req
#ifdef CONFIG_RETPOLINE
	ANNOTATE_NOSPEC_ALTERNATIVE
	ALTERNATIVE_2 __stringify(jmp *\reg),				\
		__stringify(RETPOLINE_JMP \reg), X86_FEATURE_RETPOLINE,	\
		__stringify(lfence; jmp *\reg), X86_FEATURE_RETPOLINE_AMD
#else
	jmp	*\reg
#endif
.endm

.macro CALL_NOSPEC reg:req
#ifdef CONFIG_RETPOLINE
	ANNOTATE_NOSPEC_ALTERNATIVE
	ALTERNATIVE_2 __stringify(call *\reg),				\
		__stringify(RETPOLINE_CALL \reg), X86_FEATURE_RETPOLINE,\
		__stringify(lfence; call *\reg), X86_FEATURE_RETPOLINE_AMD
#else
	call	*\reg
#endif
.endm

 /*
  * A simpler FILL_RETURN_BUFFER macro. Don't make people use the CPP
  * monstrosity above, manually.
  */
.macro FILL_RETURN_BUFFER reg:req nr:req ftr:req
#ifdef CONFIG_RETPOLINE
	ANNOTATE_NOSPEC_ALTERNATIVE
	ALTERNATIVE "jmp .Lskip_rsb_\@",				\
		__stringify(__FILL_RETURN_BUFFER(\reg,\nr,%_ASM_SP))	\
		\ftr
.Lskip_rsb_\@:
#endif
.endm

#else /* __ASSEMBLY__ */

#define ANNOTATE_NOSPEC_ALTERNATIVE				\
	"999:\n\t"						\
	".pushsection .discard.nospec\n\t"			\
	".long 999b - .\n\t"					\
	".popsection\n\t"

#if defined(CONFIG_X86_64) && defined(RETPOLINE)

/*
 * Since the inline asm uses the %V modifier which is only in newer GCC,
 * the 64-bit one is dependent on RETPOLINE not CONFIG_RETPOLINE.
 */
# define CALL_NOSPEC						\
	ANNOTATE_NOSPEC_ALTERNATIVE				\
	ALTERNATIVE(						\
	"call *%[thunk_target]\n",				\
	"call __x86_indirect_thunk_%V[thunk_target]\n",		\
	X86_FEATURE_RETPOLINE)
# define THUNK_TARGET(addr) [thunk_target] "r" (addr)

#elif defined(CONFIG_X86_32) && defined(CONFIG_RETPOLINE)
/*
 * For i386 we use the original ret-equivalent retpoline, because
 * otherwise we'll run out of registers. We don't care about CET
 * here, anyway.
 */
# define CALL_NOSPEC ALTERNATIVE("call *%[thunk_target]\n",	\
	"       jmp    904f;\n"					\
	"       .align 16\n"					\
	"901:	call   903f;\n"					\
	"902:	pause;\n"					\
	"       jmp    902b;\n"					\
	"       .align 16\n"					\
	"903:	addl   $4, %%esp;\n"				\
	"       pushl  %[thunk_target];\n"			\
	"       ret;\n"						\
	"       .align 16\n"					\
	"904:	call   901b;\n",				\
	X86_FEATURE_RETPOLINE)

# define THUNK_TARGET(addr) [thunk_target] "rm" (addr)
#else /* No retpoline for C / inline asm */
# define CALL_NOSPEC "call *%[thunk_target]\n"
# define THUNK_TARGET(addr) [thunk_target] "rm" (addr)
#endif

/* The Spectre V2 mitigation variants */
enum spectre_v2_mitigation {
	SPECTRE_V2_NONE,
	SPECTRE_V2_RETPOLINE_MINIMAL,
	SPECTRE_V2_RETPOLINE_MINIMAL_AMD,
	SPECTRE_V2_RETPOLINE_GENERIC,
	SPECTRE_V2_RETPOLINE_AMD,
	SPECTRE_V2_IBRS,
};

/*
 * On VMEXIT we must ensure that no RSB predictions learned in the guest
 * can be followed in the host, by overwriting the RSB completely. Both
 * retpoline and IBRS mitigations for Spectre v2 need this; only on future
 * CPUs with IBRS_ATT *might* it be avoided.
 */
static inline void vmexit_fill_RSB(void)
{
#ifdef CONFIG_RETPOLINE
	unsigned long loops = RSB_CLEAR_LOOPS / 2;

	asm volatile (ANNOTATE_NOSPEC_ALTERNATIVE
		      ALTERNATIVE("jmp 910f",
				  __stringify(__FILL_RETURN_BUFFER(%0, RSB_CLEAR_LOOPS, %1)),
				  X86_FEATURE_RETPOLINE)
		      "910:"
		      : "=&r" (loops), ASM_CALL_CONSTRAINT
		      : "r" (loops) : "memory" );
#endif
}
#endif /* __ASSEMBLY__ */
#endif /* __NOSPEC_BRANCH_H__ */
Commit	Line	Data
ac0999a8 DW	1	/* SPDX-License-Identifier: GPL-2.0 */
	2
	3	#ifndef __NOSPEC_BRANCH_H__
	4	#define __NOSPEC_BRANCH_H__
	5
	6	#include <asm/alternative.h>
	7	#include <asm/alternative-asm.h>
	8	#include <asm/cpufeatures.h>
	9
8947886c DW	10	/*
	11	* Fill the CPU return stack buffer.
	12	*
	13	* Each entry in the RSB, if used for a speculative 'ret', contains an
	14	* infinite 'pause; jmp' loop to capture speculative execution.
	15	*
	16	* This is required in various cases for retpoline and IBRS-based
	17	* mitigations for the Spectre variant 2 vulnerability. Sometimes to
	18	* eliminate potentially bogus entries from the RSB, and sometimes
	19	* purely to ensure that it doesn't get empty, which on some CPUs would
	20	* allow predictions from other (unwanted!) sources to be used.
	21	*
	22	* We define a CPP macro such that it can be used from both .S files and
	23	* inline assembly. It's possible to do a .macro and then include that
	24	* from C via asm(".include <asm/nospec-branch.h>") but let's not go there.
	25	*/
	26
	27	#define RSB_CLEAR_LOOPS 32 /* To forcibly overwrite all entries */
	28	#define RSB_FILL_LOOPS 16 /* To avoid underflow */
	29
	30	/*
	31	* Google experimented with loop-unrolling and this turned out to be
	32	* the optimal version — two calls, each with their own speculation
	33	* trap should their return address end up getting used, in a loop.
	34	*/
	35	#define __FILL_RETURN_BUFFER(reg, nr, sp) \
	36	mov $(nr/2), reg; \
	37	771: \
	38	call 772f; \
	39	773: /* speculation trap */ \
	40	pause; \
	41	jmp 773b; \
	42	772: \
	43	call 774f; \
	44	775: /* speculation trap */ \
	45	pause; \
	46	jmp 775b; \
	47	774: \
	48	dec reg; \
	49	jnz 771b; \
	50	add $(BITS_PER_LONG/8) * nr, sp;
	51
ac0999a8 DW	52	#ifdef __ASSEMBLY__
	53
	54	/*
	55	* This should be used immediately before a retpoline alternative. It tells
	56	* objtool where the retpolines are so that it can make sense of the control
	57	* flow by just reading the original instruction(s) and ignoring the
	58	* alternatives.
	59	*/
	60	.macro ANNOTATE_NOSPEC_ALTERNATIVE
	61	.Lannotate_\@:
	62	.pushsection .discard.nospec
	63	.long .Lannotate_\@ - .
	64	.popsection
	65	.endm
	66
	67	/*
	68	* These are the bare retpoline primitives for indirect jmp and call.
	69	* Do not use these directly; they only exist to make the ALTERNATIVE
	70	* invocation below less ugly.
	71	*/
	72	.macro RETPOLINE_JMP reg:req
	73	call .Ldo_rop_\@
	74	.Lspec_trap_\@:
	75	pause
	76	jmp .Lspec_trap_\@
	77	.Ldo_rop_\@:
	78	mov \reg, (%_ASM_SP)
	79	ret
	80	.endm
	81
	82	/*
	83	* This is a wrapper around RETPOLINE_JMP so the called function in reg
	84	* returns to the instruction after the macro.
	85	*/
	86	.macro RETPOLINE_CALL reg:req
	87	jmp .Ldo_call_\@
	88	.Ldo_retpoline_jmp_\@:
	89	RETPOLINE_JMP \reg
	90	.Ldo_call_\@:
	91	call .Ldo_retpoline_jmp_\@
	92	.endm
	93
	94	/*
	95	* JMP_NOSPEC and CALL_NOSPEC macros can be used instead of a simple
	96	* indirect jmp/call which may be susceptible to the Spectre variant 2
	97	* attack.
	98	*/
	99	.macro JMP_NOSPEC reg:req
	100	#ifdef CONFIG_RETPOLINE
	101	ANNOTATE_NOSPEC_ALTERNATIVE
	102	ALTERNATIVE_2 __stringify(jmp *\reg), \
	103	__stringify(RETPOLINE_JMP \reg), X86_FEATURE_RETPOLINE, \
	104	__stringify(lfence; jmp *\reg), X86_FEATURE_RETPOLINE_AMD
	105	#else
	106	jmp *\reg
	107	#endif
	108	.endm
	109
	110	.macro CALL_NOSPEC reg:req
	111	#ifdef CONFIG_RETPOLINE
	112	ANNOTATE_NOSPEC_ALTERNATIVE
	113	ALTERNATIVE_2 __stringify(call *\reg), \
	114	__stringify(RETPOLINE_CALL \reg), X86_FEATURE_RETPOLINE,\
	115	__stringify(lfence; call *\reg), X86_FEATURE_RETPOLINE_AMD
116	#else
117	call *\reg
118	#endif
8947886c DW	119	.endm
	120
	121	/*
	122	* A simpler FILL_RETURN_BUFFER macro. Don't make people use the CPP
	123	* monstrosity above, manually.
	124	*/
	125	.macro FILL_RETURN_BUFFER reg:req nr:req ftr:req
	126	#ifdef CONFIG_RETPOLINE
	127	ANNOTATE_NOSPEC_ALTERNATIVE
	128	ALTERNATIVE "jmp .Lskip_rsb_\@", \
	129	__stringify(__FILL_RETURN_BUFFER(\reg,\nr,%_ASM_SP)) \
	130	\ftr
	131	.Lskip_rsb_\@:
	132	#endif
ac0999a8 DW	133	.endm
	134
	135	#else /* __ASSEMBLY__ */
	136
	137	#define ANNOTATE_NOSPEC_ALTERNATIVE \
	138	"999:\n\t" \
	139	".pushsection .discard.nospec\n\t" \
	140	".long 999b - .\n\t" \
	141	".popsection\n\t"
	142
	143	#if defined(CONFIG_X86_64) && defined(RETPOLINE)
	144
	145	/*
	146	* Since the inline asm uses the %V modifier which is only in newer GCC,
	147	* the 64-bit one is dependent on RETPOLINE not CONFIG_RETPOLINE.
	148	*/
	149	# define CALL_NOSPEC \
	150	ANNOTATE_NOSPEC_ALTERNATIVE \
	151	ALTERNATIVE( \
	152	"call *%[thunk_target]\n", \
	153	"call __x86_indirect_thunk_%V[thunk_target]\n", \
	154	X86_FEATURE_RETPOLINE)
	155	# define THUNK_TARGET(addr) [thunk_target] "r" (addr)
	156
	157	#elif defined(CONFIG_X86_32) && defined(CONFIG_RETPOLINE)
	158	/*
	159	* For i386 we use the original ret-equivalent retpoline, because
	160	* otherwise we'll run out of registers. We don't care about CET
	161	* here, anyway.
	162	*/
	163	# define CALL_NOSPEC ALTERNATIVE("call *%[thunk_target]\n", \
	164	" jmp 904f;\n" \
	165	" .align 16\n" \
	166	"901: call 903f;\n" \
	167	"902: pause;\n" \
	168	" jmp 902b;\n" \
	169	" .align 16\n" \
	170	"903: addl $4, %%esp;\n" \
	171	" pushl %[thunk_target];\n" \
	172	" ret;\n" \
	173	" .align 16\n" \
	174	"904: call 901b;\n", \
	175	X86_FEATURE_RETPOLINE)
	176
	177	# define THUNK_TARGET(addr) [thunk_target] "rm" (addr)
8947886c	178	#else /* No retpoline for C / inline asm */
ac0999a8 DW	179	# define CALL_NOSPEC "call *%[thunk_target]\n"
	180	# define THUNK_TARGET(addr) [thunk_target] "rm" (addr)
	181	#endif
	182
687cc97a DW	183	/* The Spectre V2 mitigation variants */
	184	enum spectre_v2_mitigation {
	185	SPECTRE_V2_NONE,
	186	SPECTRE_V2_RETPOLINE_MINIMAL,
	187	SPECTRE_V2_RETPOLINE_MINIMAL_AMD,
	188	SPECTRE_V2_RETPOLINE_GENERIC,
	189	SPECTRE_V2_RETPOLINE_AMD,
	190	SPECTRE_V2_IBRS,
	191	};
	192
8947886c DW	193	/*
	194	* On VMEXIT we must ensure that no RSB predictions learned in the guest
	195	* can be followed in the host, by overwriting the RSB completely. Both
	196	* retpoline and IBRS mitigations for Spectre v2 need this; only on future
	197	* CPUs with IBRS_ATT might it be avoided.
	198	*/
	199	static inline void vmexit_fill_RSB(void)
	200	{
	201	#ifdef CONFIG_RETPOLINE
	202	unsigned long loops = RSB_CLEAR_LOOPS / 2;
	203
	204	asm volatile (ANNOTATE_NOSPEC_ALTERNATIVE
	205	ALTERNATIVE("jmp 910f",
	206	__stringify(__FILL_RETURN_BUFFER(%0, RSB_CLEAR_LOOPS, %1)),
	207	X86_FEATURE_RETPOLINE)
	208	"910:"
	209	: "=&r" (loops), ASM_CALL_CONSTRAINT
	210	: "r" (loops) : "memory" );
	211	#endif
	212	}
ac0999a8 DW	213	#endif /* __ASSEMBLY__ */
ac0999a8 DW	214	#endif /* __NOSPEC_BRANCH_H__ */