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ac0999a8 DW |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | ||
3 | #ifndef __NOSPEC_BRANCH_H__ | |
4 | #define __NOSPEC_BRANCH_H__ | |
5 | ||
6 | #include <asm/alternative.h> | |
7 | #include <asm/alternative-asm.h> | |
8 | #include <asm/cpufeatures.h> | |
9 | ||
10 | #ifdef __ASSEMBLY__ | |
11 | ||
12 | /* | |
13 | * This should be used immediately before a retpoline alternative. It tells | |
14 | * objtool where the retpolines are so that it can make sense of the control | |
15 | * flow by just reading the original instruction(s) and ignoring the | |
16 | * alternatives. | |
17 | */ | |
18 | .macro ANNOTATE_NOSPEC_ALTERNATIVE | |
19 | .Lannotate_\@: | |
20 | .pushsection .discard.nospec | |
21 | .long .Lannotate_\@ - . | |
22 | .popsection | |
23 | .endm | |
24 | ||
2f1b401d PZ |
25 | /* |
26 | * This should be used immediately before an indirect jump/call. It tells | |
27 | * objtool the subsequent indirect jump/call is vouched safe for retpoline | |
28 | * builds. | |
29 | */ | |
30 | .macro ANNOTATE_RETPOLINE_SAFE | |
31 | .Lannotate_\@: | |
32 | .pushsection .discard.retpoline_safe | |
33 | _ASM_PTR .Lannotate_\@ | |
34 | .popsection | |
35 | .endm | |
36 | ||
ac0999a8 DW |
37 | /* |
38 | * These are the bare retpoline primitives for indirect jmp and call. | |
39 | * Do not use these directly; they only exist to make the ALTERNATIVE | |
40 | * invocation below less ugly. | |
41 | */ | |
42 | .macro RETPOLINE_JMP reg:req | |
43 | call .Ldo_rop_\@ | |
44 | .Lspec_trap_\@: | |
45 | pause | |
81317bbe | 46 | lfence |
ac0999a8 DW |
47 | jmp .Lspec_trap_\@ |
48 | .Ldo_rop_\@: | |
49 | mov \reg, (%_ASM_SP) | |
50 | ret | |
51 | .endm | |
52 | ||
53 | /* | |
54 | * This is a wrapper around RETPOLINE_JMP so the called function in reg | |
55 | * returns to the instruction after the macro. | |
56 | */ | |
57 | .macro RETPOLINE_CALL reg:req | |
58 | jmp .Ldo_call_\@ | |
59 | .Ldo_retpoline_jmp_\@: | |
60 | RETPOLINE_JMP \reg | |
61 | .Ldo_call_\@: | |
62 | call .Ldo_retpoline_jmp_\@ | |
63 | .endm | |
64 | ||
65 | /* | |
66 | * JMP_NOSPEC and CALL_NOSPEC macros can be used instead of a simple | |
67 | * indirect jmp/call which may be susceptible to the Spectre variant 2 | |
68 | * attack. | |
69 | */ | |
70 | .macro JMP_NOSPEC reg:req | |
71 | #ifdef CONFIG_RETPOLINE | |
72 | ANNOTATE_NOSPEC_ALTERNATIVE | |
2f1b401d | 73 | ALTERNATIVE_2 __stringify(ANNOTATE_RETPOLINE_SAFE; jmp *\reg), \ |
ac0999a8 | 74 | __stringify(RETPOLINE_JMP \reg), X86_FEATURE_RETPOLINE, \ |
2f1b401d | 75 | __stringify(lfence; ANNOTATE_RETPOLINE_SAFE; jmp *\reg), X86_FEATURE_RETPOLINE_AMD |
ac0999a8 DW |
76 | #else |
77 | jmp *\reg | |
78 | #endif | |
79 | .endm | |
80 | ||
81 | .macro CALL_NOSPEC reg:req | |
82 | #ifdef CONFIG_RETPOLINE | |
83 | ANNOTATE_NOSPEC_ALTERNATIVE | |
2f1b401d | 84 | ALTERNATIVE_2 __stringify(ANNOTATE_RETPOLINE_SAFE; call *\reg), \ |
ac0999a8 | 85 | __stringify(RETPOLINE_CALL \reg), X86_FEATURE_RETPOLINE,\ |
2f1b401d | 86 | __stringify(lfence; ANNOTATE_RETPOLINE_SAFE; call *\reg), X86_FEATURE_RETPOLINE_AMD |
ac0999a8 DW |
87 | #else |
88 | call *\reg | |
89 | #endif | |
8947886c DW |
90 | .endm |
91 | ||
81fd59c4 BP |
92 | /* This clobbers the BX register */ |
93 | .macro FILL_RETURN_BUFFER nr:req ftr:req | |
8947886c | 94 | #ifdef CONFIG_RETPOLINE |
81fd59c4 | 95 | ALTERNATIVE "", "call __clear_rsb", \ftr |
8947886c | 96 | #endif |
ac0999a8 DW |
97 | .endm |
98 | ||
99 | #else /* __ASSEMBLY__ */ | |
100 | ||
101 | #define ANNOTATE_NOSPEC_ALTERNATIVE \ | |
102 | "999:\n\t" \ | |
103 | ".pushsection .discard.nospec\n\t" \ | |
104 | ".long 999b - .\n\t" \ | |
105 | ".popsection\n\t" | |
106 | ||
2f1b401d PZ |
107 | #define ANNOTATE_RETPOLINE_SAFE \ |
108 | "999:\n\t" \ | |
109 | ".pushsection .discard.retpoline_safe\n\t" \ | |
110 | _ASM_PTR " 999b\n\t" \ | |
111 | ".popsection\n\t" | |
112 | ||
ac0999a8 DW |
113 | #if defined(CONFIG_X86_64) && defined(RETPOLINE) |
114 | ||
115 | /* | |
116 | * Since the inline asm uses the %V modifier which is only in newer GCC, | |
117 | * the 64-bit one is dependent on RETPOLINE not CONFIG_RETPOLINE. | |
118 | */ | |
119 | # define CALL_NOSPEC \ | |
120 | ANNOTATE_NOSPEC_ALTERNATIVE \ | |
121 | ALTERNATIVE( \ | |
2f1b401d | 122 | ANNOTATE_RETPOLINE_SAFE \ |
ac0999a8 DW |
123 | "call *%[thunk_target]\n", \ |
124 | "call __x86_indirect_thunk_%V[thunk_target]\n", \ | |
125 | X86_FEATURE_RETPOLINE) | |
126 | # define THUNK_TARGET(addr) [thunk_target] "r" (addr) | |
127 | ||
128 | #elif defined(CONFIG_X86_32) && defined(CONFIG_RETPOLINE) | |
129 | /* | |
130 | * For i386 we use the original ret-equivalent retpoline, because | |
131 | * otherwise we'll run out of registers. We don't care about CET | |
132 | * here, anyway. | |
133 | */ | |
134 | # define CALL_NOSPEC ALTERNATIVE("call *%[thunk_target]\n", \ | |
135 | " jmp 904f;\n" \ | |
136 | " .align 16\n" \ | |
137 | "901: call 903f;\n" \ | |
138 | "902: pause;\n" \ | |
81317bbe | 139 | " lfence;\n" \ |
ac0999a8 DW |
140 | " jmp 902b;\n" \ |
141 | " .align 16\n" \ | |
142 | "903: addl $4, %%esp;\n" \ | |
143 | " pushl %[thunk_target];\n" \ | |
144 | " ret;\n" \ | |
145 | " .align 16\n" \ | |
146 | "904: call 901b;\n", \ | |
147 | X86_FEATURE_RETPOLINE) | |
148 | ||
149 | # define THUNK_TARGET(addr) [thunk_target] "rm" (addr) | |
8947886c | 150 | #else /* No retpoline for C / inline asm */ |
ac0999a8 DW |
151 | # define CALL_NOSPEC "call *%[thunk_target]\n" |
152 | # define THUNK_TARGET(addr) [thunk_target] "rm" (addr) | |
153 | #endif | |
154 | ||
687cc97a DW |
155 | /* The Spectre V2 mitigation variants */ |
156 | enum spectre_v2_mitigation { | |
157 | SPECTRE_V2_NONE, | |
158 | SPECTRE_V2_RETPOLINE_MINIMAL, | |
159 | SPECTRE_V2_RETPOLINE_MINIMAL_AMD, | |
160 | SPECTRE_V2_RETPOLINE_GENERIC, | |
161 | SPECTRE_V2_RETPOLINE_AMD, | |
162 | SPECTRE_V2_IBRS, | |
163 | }; | |
164 | ||
8947886c DW |
165 | /* |
166 | * On VMEXIT we must ensure that no RSB predictions learned in the guest | |
167 | * can be followed in the host, by overwriting the RSB completely. Both | |
168 | * retpoline and IBRS mitigations for Spectre v2 need this; only on future | |
169 | * CPUs with IBRS_ATT *might* it be avoided. | |
170 | */ | |
171 | static inline void vmexit_fill_RSB(void) | |
172 | { | |
173 | #ifdef CONFIG_RETPOLINE | |
81fd59c4 BP |
174 | alternative_input("", |
175 | "call __fill_rsb", | |
176 | X86_FEATURE_RETPOLINE, | |
177 | ASM_NO_INPUT_CLOBBER(_ASM_BX, "memory")); | |
8947886c DW |
178 | #endif |
179 | } | |
88af5c9c | 180 | |
ac0999a8 DW |
181 | #endif /* __ASSEMBLY__ */ |
182 | #endif /* __NOSPEC_BRANCH_H__ */ |