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1 | #ifndef __ASM_NUMAQ_WAKECPU_H |
2 | #define __ASM_NUMAQ_WAKECPU_H | |
1da177e4 LT |
3 | |
4 | /* This file copes with machines that wakeup secondary CPUs by NMIs */ | |
5 | ||
569712b2 YL |
6 | #define TRAMPOLINE_PHYS_LOW (0x8) |
7 | #define TRAMPOLINE_PHYS_HIGH (0xa) | |
1da177e4 LT |
8 | |
9 | /* We don't do anything here because we use NMI's to boot instead */ | |
10 | static inline void wait_for_init_deassert(atomic_t *deassert) | |
11 | { | |
12 | } | |
13 | ||
14 | /* | |
15 | * Because we use NMIs rather than the INIT-STARTUP sequence to | |
16 | * bootstrap the CPUs, the APIC may be in a weird state. Kick it. | |
17 | */ | |
18 | static inline void smp_callin_clear_local_apic(void) | |
19 | { | |
20 | clear_local_APIC(); | |
21 | } | |
22 | ||
23 | static inline void store_NMI_vector(unsigned short *high, unsigned short *low) | |
24 | { | |
25 | printk("Storing NMI vector\n"); | |
569712b2 YL |
26 | *high = |
27 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)); | |
28 | *low = | |
29 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)); | |
1da177e4 LT |
30 | } |
31 | ||
32 | static inline void restore_NMI_vector(unsigned short *high, unsigned short *low) | |
33 | { | |
34 | printk("Restoring NMI vector\n"); | |
569712b2 YL |
35 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) = |
36 | *high; | |
37 | *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = | |
38 | *low; | |
1da177e4 LT |
39 | } |
40 | ||
569712b2 YL |
41 | static inline void inquire_remote_apic(int apicid) |
42 | { | |
43 | } | |
1da177e4 | 44 | |
edb181ac | 45 | #endif /* __ASM_NUMAQ_WAKECPU_H */ |