]>
Commit | Line | Data |
---|---|---|
b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
3ef0e1f8 AS |
2 | /* OLPC machine specific definitions */ |
3 | ||
1965aae3 PA |
4 | #ifndef _ASM_X86_OLPC_H |
5 | #define _ASM_X86_OLPC_H | |
3ef0e1f8 AS |
6 | |
7 | #include <asm/geode.h> | |
8 | ||
9 | struct olpc_platform_t { | |
10 | int flags; | |
11 | uint32_t boardrev; | |
12 | int ecver; | |
13 | }; | |
14 | ||
15 | #define OLPC_F_PRESENT 0x01 | |
16 | #define OLPC_F_DCON 0x02 | |
bc4ecd5a | 17 | #define OLPC_F_EC_WIDE_SCI 0x04 |
3ef0e1f8 AS |
18 | |
19 | #ifdef CONFIG_OLPC | |
20 | ||
21 | extern struct olpc_platform_t olpc_platform_info; | |
22 | ||
23 | /* | |
24 | * OLPC board IDs contain the major build number within the mask 0x0ff0, | |
0d2eb44f | 25 | * and the minor build number within 0x000f. Pre-builds have a minor |
3ef0e1f8 AS |
26 | * number less than 8, and normal builds start at 8. For example, 0x0B10 |
27 | * is a PreB1, and 0x0C18 is a C1. | |
28 | */ | |
29 | ||
30 | static inline uint32_t olpc_board(uint8_t id) | |
31 | { | |
32 | return (id << 4) | 0x8; | |
33 | } | |
34 | ||
35 | static inline uint32_t olpc_board_pre(uint8_t id) | |
36 | { | |
37 | return id << 4; | |
38 | } | |
39 | ||
40 | static inline int machine_is_olpc(void) | |
41 | { | |
42 | return (olpc_platform_info.flags & OLPC_F_PRESENT) ? 1 : 0; | |
43 | } | |
44 | ||
45 | /* | |
46 | * The DCON is OLPC's Display Controller. It has a number of unique | |
47 | * features that we might want to take advantage of.. | |
48 | */ | |
49 | static inline int olpc_has_dcon(void) | |
50 | { | |
51 | return (olpc_platform_info.flags & OLPC_F_DCON) ? 1 : 0; | |
52 | } | |
53 | ||
3ef0e1f8 AS |
54 | /* |
55 | * The "Mass Production" version of OLPC's XO is identified as being model | |
56 | * C2. During the prototype phase, the following models (in chronological | |
57 | * order) were created: A1, B1, B2, B3, B4, C1. The A1 through B2 models | |
58 | * were based on Geode GX CPUs, and models after that were based upon | |
59 | * Geode LX CPUs. There were also some hand-assembled models floating | |
60 | * around, referred to as PreB1, PreB2, etc. | |
61 | */ | |
62 | static inline int olpc_board_at_least(uint32_t rev) | |
63 | { | |
64 | return olpc_platform_info.boardrev >= rev; | |
65 | } | |
66 | ||
bc4ecd5a DD |
67 | extern void olpc_ec_wakeup_set(u16 value); |
68 | extern void olpc_ec_wakeup_clear(u16 value); | |
69 | extern bool olpc_ec_wakeup_available(void); | |
70 | ||
71 | extern int olpc_ec_mask_write(u16 bits); | |
72 | extern int olpc_ec_sci_query(u16 *sci_value); | |
73 | ||
3ef0e1f8 AS |
74 | #else |
75 | ||
76 | static inline int machine_is_olpc(void) | |
77 | { | |
78 | return 0; | |
79 | } | |
80 | ||
81 | static inline int olpc_has_dcon(void) | |
82 | { | |
83 | return 0; | |
84 | } | |
85 | ||
bc4ecd5a DD |
86 | static inline void olpc_ec_wakeup_set(u16 value) { } |
87 | static inline void olpc_ec_wakeup_clear(u16 value) { } | |
88 | ||
89 | static inline bool olpc_ec_wakeup_available(void) | |
90 | { | |
91 | return false; | |
92 | } | |
93 | ||
3ef0e1f8 AS |
94 | #endif |
95 | ||
97c4cb71 DD |
96 | #ifdef CONFIG_OLPC_XO1_PM |
97 | extern void do_olpc_suspend_lowlevel(void); | |
98 | extern void olpc_xo1_pm_wakeup_set(u16 value); | |
99 | extern void olpc_xo1_pm_wakeup_clear(u16 value); | |
100 | #endif | |
101 | ||
d5d0e88c TG |
102 | extern int pci_olpc_init(void); |
103 | ||
3ef0e1f8 AS |
104 | /* SCI source values */ |
105 | ||
106 | #define EC_SCI_SRC_EMPTY 0x00 | |
107 | #define EC_SCI_SRC_GAME 0x01 | |
108 | #define EC_SCI_SRC_BATTERY 0x02 | |
109 | #define EC_SCI_SRC_BATSOC 0x04 | |
110 | #define EC_SCI_SRC_BATERR 0x08 | |
bc4ecd5a DD |
111 | #define EC_SCI_SRC_EBOOK 0x10 /* XO-1 only */ |
112 | #define EC_SCI_SRC_WLAN 0x20 /* XO-1 only */ | |
3ef0e1f8 | 113 | #define EC_SCI_SRC_ACPWR 0x40 |
bc4ecd5a DD |
114 | #define EC_SCI_SRC_BATCRIT 0x80 |
115 | #define EC_SCI_SRC_GPWAKE 0x100 /* XO-1.5 only */ | |
116 | #define EC_SCI_SRC_ALL 0x1FF | |
3ef0e1f8 AS |
117 | |
118 | /* GPIO assignments */ | |
119 | ||
3c554946 | 120 | #define OLPC_GPIO_MIC_AC 1 |
7637c925 AS |
121 | #define OLPC_GPIO_DCON_STAT0 5 |
122 | #define OLPC_GPIO_DCON_STAT1 6 | |
123 | #define OLPC_GPIO_DCON_IRQ 7 | |
3ef0e1f8 | 124 | #define OLPC_GPIO_THRM_ALRM geode_gpio(10) |
7637c925 AS |
125 | #define OLPC_GPIO_DCON_LOAD 11 |
126 | #define OLPC_GPIO_DCON_BLANK 12 | |
127 | #define OLPC_GPIO_SMB_CLK 14 | |
128 | #define OLPC_GPIO_SMB_DATA 15 | |
3ef0e1f8 | 129 | #define OLPC_GPIO_WORKAUX geode_gpio(24) |
7bc74b3d DD |
130 | #define OLPC_GPIO_LID 26 |
131 | #define OLPC_GPIO_ECSCI 27 | |
3ef0e1f8 | 132 | |
1965aae3 | 133 | #endif /* _ASM_X86_OLPC_H */ |