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ac5672f8 JF |
1 | #ifndef _ASM_X86_PARAVIRT_TYPES_H |
2 | #define _ASM_X86_PARAVIRT_TYPES_H | |
3 | ||
4 | /* Bitmask of what can be clobbered: usually at least eax. */ | |
5 | #define CLBR_NONE 0 | |
6 | #define CLBR_EAX (1 << 0) | |
7 | #define CLBR_ECX (1 << 1) | |
8 | #define CLBR_EDX (1 << 2) | |
9 | #define CLBR_EDI (1 << 3) | |
10 | ||
11 | #ifdef CONFIG_X86_32 | |
12 | /* CLBR_ANY should match all regs platform has. For i386, that's just it */ | |
13 | #define CLBR_ANY ((1 << 4) - 1) | |
14 | ||
15 | #define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX) | |
16 | #define CLBR_RET_REG (CLBR_EAX | CLBR_EDX) | |
17 | #define CLBR_SCRATCH (0) | |
18 | #else | |
19 | #define CLBR_RAX CLBR_EAX | |
20 | #define CLBR_RCX CLBR_ECX | |
21 | #define CLBR_RDX CLBR_EDX | |
22 | #define CLBR_RDI CLBR_EDI | |
23 | #define CLBR_RSI (1 << 4) | |
24 | #define CLBR_R8 (1 << 5) | |
25 | #define CLBR_R9 (1 << 6) | |
26 | #define CLBR_R10 (1 << 7) | |
27 | #define CLBR_R11 (1 << 8) | |
28 | ||
29 | #define CLBR_ANY ((1 << 9) - 1) | |
30 | ||
31 | #define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \ | |
32 | CLBR_RCX | CLBR_R8 | CLBR_R9) | |
33 | #define CLBR_RET_REG (CLBR_RAX) | |
34 | #define CLBR_SCRATCH (CLBR_R10 | CLBR_R11) | |
35 | ||
36 | #endif /* X86_64 */ | |
37 | ||
38 | #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG) | |
39 | ||
40 | #ifndef __ASSEMBLY__ | |
41 | ||
42 | #include <asm/desc_defs.h> | |
43 | #include <asm/kmap_types.h> | |
318f5a2a | 44 | #include <asm/pgtable_types.h> |
ac5672f8 JF |
45 | |
46 | struct page; | |
47 | struct thread_struct; | |
48 | struct desc_ptr; | |
49 | struct tss_struct; | |
50 | struct mm_struct; | |
51 | struct desc_struct; | |
52 | struct task_struct; | |
53 | struct cpumask; | |
a2055abe | 54 | struct flush_tlb_info; |
ac5672f8 JF |
55 | |
56 | /* | |
57 | * Wrapper type for pointers to code which uses the non-standard | |
58 | * calling convention. See PV_CALL_SAVE_REGS_THUNK below. | |
59 | */ | |
60 | struct paravirt_callee_save { | |
61 | void *func; | |
62 | }; | |
63 | ||
64 | /* general info */ | |
65 | struct pv_info { | |
66 | unsigned int kernel_rpl; | |
67 | int shared_kernel_pmd; | |
318f5a2a AL |
68 | |
69 | #ifdef CONFIG_X86_64 | |
70 | u16 extra_user_64bit_cs; /* __USER_CS if none */ | |
71 | #endif | |
72 | ||
ac5672f8 JF |
73 | const char *name; |
74 | }; | |
75 | ||
76 | struct pv_init_ops { | |
77 | /* | |
78 | * Patch may replace one of the defined code sequences with | |
79 | * arbitrary code, subject to the same register constraints. | |
80 | * This generally means the code is not free to clobber any | |
81 | * registers other than EAX. The patch function should return | |
82 | * the number of bytes of code generated, as we nop pad the | |
83 | * rest in generic code. | |
84 | */ | |
85 | unsigned (*patch)(u8 type, u16 clobber, void *insnbuf, | |
86 | unsigned long addr, unsigned len); | |
8acdf505 | 87 | } __no_randomize_layout; |
ac5672f8 JF |
88 | |
89 | ||
90 | struct pv_lazy_ops { | |
91 | /* Set deferred update mode, used for batching operations. */ | |
92 | void (*enter)(void); | |
93 | void (*leave)(void); | |
511ba86e | 94 | void (*flush)(void); |
8acdf505 | 95 | } __no_randomize_layout; |
ac5672f8 JF |
96 | |
97 | struct pv_time_ops { | |
ac5672f8 | 98 | unsigned long long (*sched_clock)(void); |
3c404b57 | 99 | unsigned long long (*steal_clock)(int cpu); |
8acdf505 | 100 | } __no_randomize_layout; |
ac5672f8 JF |
101 | |
102 | struct pv_cpu_ops { | |
103 | /* hooks for various privileged instructions */ | |
104 | unsigned long (*get_debugreg)(int regno); | |
105 | void (*set_debugreg)(int regno, unsigned long value); | |
106 | ||
ac5672f8 JF |
107 | unsigned long (*read_cr0)(void); |
108 | void (*write_cr0)(unsigned long); | |
109 | ||
ac5672f8 JF |
110 | unsigned long (*read_cr4)(void); |
111 | void (*write_cr4)(unsigned long); | |
112 | ||
113 | #ifdef CONFIG_X86_64 | |
114 | unsigned long (*read_cr8)(void); | |
115 | void (*write_cr8)(unsigned long); | |
116 | #endif | |
117 | ||
118 | /* Segment descriptor handling */ | |
119 | void (*load_tr_desc)(void); | |
120 | void (*load_gdt)(const struct desc_ptr *); | |
121 | void (*load_idt)(const struct desc_ptr *); | |
357d1226 | 122 | /* store_gdt has been removed. */ |
ac5672f8 JF |
123 | void (*store_idt)(struct desc_ptr *); |
124 | void (*set_ldt)(const void *desc, unsigned entries); | |
125 | unsigned long (*store_tr)(void); | |
126 | void (*load_tls)(struct thread_struct *t, unsigned int cpu); | |
127 | #ifdef CONFIG_X86_64 | |
128 | void (*load_gs_index)(unsigned int idx); | |
129 | #endif | |
130 | void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum, | |
131 | const void *desc); | |
132 | void (*write_gdt_entry)(struct desc_struct *, | |
133 | int entrynum, const void *desc, int size); | |
134 | void (*write_idt_entry)(gate_desc *, | |
135 | int entrynum, const gate_desc *gate); | |
136 | void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries); | |
137 | void (*free_ldt)(struct desc_struct *ldt, unsigned entries); | |
138 | ||
139 | void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t); | |
140 | ||
141 | void (*set_iopl_mask)(unsigned mask); | |
142 | ||
143 | void (*wbinvd)(void); | |
144 | void (*io_delay)(void); | |
145 | ||
146 | /* cpuid emulation, mostly so that caps bits can be disabled */ | |
147 | void (*cpuid)(unsigned int *eax, unsigned int *ebx, | |
148 | unsigned int *ecx, unsigned int *edx); | |
149 | ||
dd2f4a00 AL |
150 | /* Unsafe MSR operations. These will warn or panic on failure. */ |
151 | u64 (*read_msr)(unsigned int msr); | |
152 | void (*write_msr)(unsigned int msr, unsigned low, unsigned high); | |
153 | ||
154 | /* | |
155 | * Safe MSR operations. | |
156 | * read sets err to 0 or -EIO. write returns 0 or -EIO. | |
157 | */ | |
c2ee03b2 AL |
158 | u64 (*read_msr_safe)(unsigned int msr, int *err); |
159 | int (*write_msr_safe)(unsigned int msr, unsigned low, unsigned high); | |
ac5672f8 | 160 | |
ac5672f8 | 161 | u64 (*read_pmc)(int counter); |
ac5672f8 | 162 | |
ac5672f8 JF |
163 | /* |
164 | * Switch to usermode gs and return to 64-bit usermode using | |
165 | * sysret. Only used in 64-bit kernels to return to 64-bit | |
166 | * processes. Usermode register state, including %rsp, must | |
167 | * already be restored. | |
168 | */ | |
169 | void (*usergs_sysret64)(void); | |
170 | ||
ac5672f8 JF |
171 | /* Normal iret. Jump to this with the standard iret stack |
172 | frame set up. */ | |
173 | void (*iret)(void); | |
174 | ||
175 | void (*swapgs)(void); | |
176 | ||
177 | void (*start_context_switch)(struct task_struct *prev); | |
178 | void (*end_context_switch)(struct task_struct *next); | |
8acdf505 | 179 | } __no_randomize_layout; |
ac5672f8 JF |
180 | |
181 | struct pv_irq_ops { | |
ac5672f8 JF |
182 | /* |
183 | * Get/set interrupt state. save_fl and restore_fl are only | |
184 | * expected to use X86_EFLAGS_IF; all other bits | |
185 | * returned from save_fl are undefined, and may be ignored by | |
186 | * restore_fl. | |
187 | * | |
188 | * NOTE: These functions callers expect the callee to preserve | |
189 | * more registers than the standard C calling convention. | |
190 | */ | |
191 | struct paravirt_callee_save save_fl; | |
192 | struct paravirt_callee_save restore_fl; | |
193 | struct paravirt_callee_save irq_disable; | |
194 | struct paravirt_callee_save irq_enable; | |
195 | ||
196 | void (*safe_halt)(void); | |
197 | void (*halt)(void); | |
198 | ||
199 | #ifdef CONFIG_X86_64 | |
200 | void (*adjust_exception_frame)(void); | |
201 | #endif | |
8acdf505 | 202 | } __no_randomize_layout; |
ac5672f8 | 203 | |
ac5672f8 | 204 | struct pv_mmu_ops { |
ac5672f8 JF |
205 | unsigned long (*read_cr2)(void); |
206 | void (*write_cr2)(unsigned long); | |
207 | ||
208 | unsigned long (*read_cr3)(void); | |
209 | void (*write_cr3)(unsigned long); | |
210 | ||
211 | /* | |
212 | * Hooks for intercepting the creation/use/destruction of an | |
213 | * mm_struct. | |
214 | */ | |
215 | void (*activate_mm)(struct mm_struct *prev, | |
216 | struct mm_struct *next); | |
217 | void (*dup_mmap)(struct mm_struct *oldmm, | |
218 | struct mm_struct *mm); | |
219 | void (*exit_mmap)(struct mm_struct *mm); | |
220 | ||
221 | ||
222 | /* TLB operations */ | |
223 | void (*flush_tlb_user)(void); | |
224 | void (*flush_tlb_kernel)(void); | |
225 | void (*flush_tlb_single)(unsigned long addr); | |
226 | void (*flush_tlb_others)(const struct cpumask *cpus, | |
a2055abe | 227 | const struct flush_tlb_info *info); |
ac5672f8 JF |
228 | |
229 | /* Hooks for allocating and freeing a pagetable top-level */ | |
230 | int (*pgd_alloc)(struct mm_struct *mm); | |
231 | void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd); | |
232 | ||
233 | /* | |
234 | * Hooks for allocating/releasing pagetable pages when they're | |
235 | * attached to a pagetable | |
236 | */ | |
237 | void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn); | |
238 | void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn); | |
ac5672f8 | 239 | void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn); |
335437fb | 240 | void (*alloc_p4d)(struct mm_struct *mm, unsigned long pfn); |
ac5672f8 JF |
241 | void (*release_pte)(unsigned long pfn); |
242 | void (*release_pmd)(unsigned long pfn); | |
243 | void (*release_pud)(unsigned long pfn); | |
335437fb | 244 | void (*release_p4d)(unsigned long pfn); |
ac5672f8 JF |
245 | |
246 | /* Pagetable manipulation functions */ | |
247 | void (*set_pte)(pte_t *ptep, pte_t pteval); | |
248 | void (*set_pte_at)(struct mm_struct *mm, unsigned long addr, | |
249 | pte_t *ptep, pte_t pteval); | |
250 | void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval); | |
331127f7 AA |
251 | void (*set_pmd_at)(struct mm_struct *mm, unsigned long addr, |
252 | pmd_t *pmdp, pmd_t pmdval); | |
a00cc7d9 MW |
253 | void (*set_pud_at)(struct mm_struct *mm, unsigned long addr, |
254 | pud_t *pudp, pud_t pudval); | |
ac5672f8 JF |
255 | void (*pte_update)(struct mm_struct *mm, unsigned long addr, |
256 | pte_t *ptep); | |
ac5672f8 JF |
257 | |
258 | pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr, | |
259 | pte_t *ptep); | |
260 | void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr, | |
261 | pte_t *ptep, pte_t pte); | |
262 | ||
263 | struct paravirt_callee_save pte_val; | |
264 | struct paravirt_callee_save make_pte; | |
265 | ||
266 | struct paravirt_callee_save pgd_val; | |
267 | struct paravirt_callee_save make_pgd; | |
268 | ||
98233368 | 269 | #if CONFIG_PGTABLE_LEVELS >= 3 |
ac5672f8 JF |
270 | #ifdef CONFIG_X86_PAE |
271 | void (*set_pte_atomic)(pte_t *ptep, pte_t pteval); | |
272 | void (*pte_clear)(struct mm_struct *mm, unsigned long addr, | |
273 | pte_t *ptep); | |
274 | void (*pmd_clear)(pmd_t *pmdp); | |
275 | ||
276 | #endif /* CONFIG_X86_PAE */ | |
277 | ||
278 | void (*set_pud)(pud_t *pudp, pud_t pudval); | |
279 | ||
280 | struct paravirt_callee_save pmd_val; | |
281 | struct paravirt_callee_save make_pmd; | |
282 | ||
f2a6a705 | 283 | #if CONFIG_PGTABLE_LEVELS >= 4 |
ac5672f8 JF |
284 | struct paravirt_callee_save pud_val; |
285 | struct paravirt_callee_save make_pud; | |
286 | ||
f2a6a705 KS |
287 | void (*set_p4d)(p4d_t *p4dp, p4d_t p4dval); |
288 | ||
289 | #if CONFIG_PGTABLE_LEVELS >= 5 | |
335437fb KS |
290 | struct paravirt_callee_save p4d_val; |
291 | struct paravirt_callee_save make_p4d; | |
292 | ||
293 | void (*set_pgd)(pgd_t *pgdp, pgd_t pgdval); | |
f2a6a705 KS |
294 | #endif /* CONFIG_PGTABLE_LEVELS >= 5 */ |
295 | ||
296 | #endif /* CONFIG_PGTABLE_LEVELS >= 4 */ | |
297 | ||
98233368 | 298 | #endif /* CONFIG_PGTABLE_LEVELS >= 3 */ |
ac5672f8 | 299 | |
ac5672f8 JF |
300 | struct pv_lazy_ops lazy_mode; |
301 | ||
302 | /* dom0 ops */ | |
303 | ||
304 | /* Sometimes the physical address is a pfn, and sometimes its | |
305 | an mfn. We can tell which is which from the index. */ | |
306 | void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx, | |
307 | phys_addr_t phys, pgprot_t flags); | |
8acdf505 | 308 | } __no_randomize_layout; |
ac5672f8 | 309 | |
445c8951 | 310 | struct arch_spinlock; |
545ac138 JF |
311 | #ifdef CONFIG_SMP |
312 | #include <asm/spinlock_types.h> | |
545ac138 JF |
313 | #endif |
314 | ||
f233f7f1 PZI |
315 | struct qspinlock; |
316 | ||
ac5672f8 | 317 | struct pv_lock_ops { |
f233f7f1 PZI |
318 | void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val); |
319 | struct paravirt_callee_save queued_spin_unlock; | |
320 | ||
321 | void (*wait)(u8 *ptr, u8 val); | |
322 | void (*kick)(int cpu); | |
446f3dc8 | 323 | |
3cded417 | 324 | struct paravirt_callee_save vcpu_is_preempted; |
8acdf505 | 325 | } __no_randomize_layout; |
ac5672f8 JF |
326 | |
327 | /* This contains all the paravirt structures: we get a convenient | |
328 | * number for each function using the offset which we use to indicate | |
329 | * what to patch. */ | |
330 | struct paravirt_patch_template { | |
331 | struct pv_init_ops pv_init_ops; | |
332 | struct pv_time_ops pv_time_ops; | |
333 | struct pv_cpu_ops pv_cpu_ops; | |
334 | struct pv_irq_ops pv_irq_ops; | |
ac5672f8 JF |
335 | struct pv_mmu_ops pv_mmu_ops; |
336 | struct pv_lock_ops pv_lock_ops; | |
8acdf505 | 337 | } __no_randomize_layout; |
ac5672f8 JF |
338 | |
339 | extern struct pv_info pv_info; | |
340 | extern struct pv_init_ops pv_init_ops; | |
341 | extern struct pv_time_ops pv_time_ops; | |
342 | extern struct pv_cpu_ops pv_cpu_ops; | |
343 | extern struct pv_irq_ops pv_irq_ops; | |
ac5672f8 JF |
344 | extern struct pv_mmu_ops pv_mmu_ops; |
345 | extern struct pv_lock_ops pv_lock_ops; | |
346 | ||
347 | #define PARAVIRT_PATCH(x) \ | |
348 | (offsetof(struct paravirt_patch_template, x) / sizeof(void *)) | |
349 | ||
350 | #define paravirt_type(op) \ | |
351 | [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \ | |
352 | [paravirt_opptr] "i" (&(op)) | |
353 | #define paravirt_clobber(clobber) \ | |
354 | [paravirt_clobber] "i" (clobber) | |
355 | ||
356 | /* | |
357 | * Generate some code, and mark it as patchable by the | |
358 | * apply_paravirt() alternate instruction patcher. | |
359 | */ | |
360 | #define _paravirt_alt(insn_string, type, clobber) \ | |
361 | "771:\n\t" insn_string "\n" "772:\n" \ | |
362 | ".pushsection .parainstructions,\"a\"\n" \ | |
363 | _ASM_ALIGN "\n" \ | |
364 | _ASM_PTR " 771b\n" \ | |
365 | " .byte " type "\n" \ | |
366 | " .byte 772b-771b\n" \ | |
367 | " .short " clobber "\n" \ | |
368 | ".popsection\n" | |
369 | ||
370 | /* Generate patchable code, with the default asm parameters. */ | |
371 | #define paravirt_alt(insn_string) \ | |
372 | _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]") | |
373 | ||
374 | /* Simple instruction patching code. */ | |
824a2870 AK |
375 | #define NATIVE_LABEL(a,x,b) "\n\t.globl " a #x "_" #b "\n" a #x "_" #b ":\n\t" |
376 | ||
377 | #define DEF_NATIVE(ops, name, code) \ | |
378 | __visible extern const char start_##ops##_##name[], end_##ops##_##name[]; \ | |
379 | asm(NATIVE_LABEL("start_", ops, name) code NATIVE_LABEL("end_", ops, name)) | |
ac5672f8 | 380 | |
ac5672f8 JF |
381 | unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len); |
382 | unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len); | |
ac5672f8 JF |
383 | unsigned paravirt_patch_call(void *insnbuf, |
384 | const void *target, u16 tgt_clobbers, | |
385 | unsigned long addr, u16 site_clobbers, | |
386 | unsigned len); | |
387 | unsigned paravirt_patch_jmp(void *insnbuf, const void *target, | |
388 | unsigned long addr, unsigned len); | |
389 | unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf, | |
390 | unsigned long addr, unsigned len); | |
391 | ||
392 | unsigned paravirt_patch_insns(void *insnbuf, unsigned len, | |
393 | const char *start, const char *end); | |
394 | ||
395 | unsigned native_patch(u8 type, u16 clobbers, void *ibuf, | |
396 | unsigned long addr, unsigned len); | |
397 | ||
398 | int paravirt_disable_iospace(void); | |
399 | ||
400 | /* | |
401 | * This generates an indirect call based on the operation type number. | |
402 | * The type number, computed in PARAVIRT_PATCH, is derived from the | |
403 | * offset into the paravirt_patch_template structure, and can therefore be | |
404 | * freely converted back into a structure offset. | |
405 | */ | |
406 | #define PARAVIRT_CALL "call *%c[paravirt_opptr];" | |
407 | ||
408 | /* | |
409 | * These macros are intended to wrap calls through one of the paravirt | |
410 | * ops structs, so that they can be later identified and patched at | |
411 | * runtime. | |
412 | * | |
413 | * Normally, a call to a pv_op function is a simple indirect call: | |
414 | * (pv_op_struct.operations)(args...). | |
415 | * | |
416 | * Unfortunately, this is a relatively slow operation for modern CPUs, | |
417 | * because it cannot necessarily determine what the destination | |
418 | * address is. In this case, the address is a runtime constant, so at | |
419 | * the very least we can patch the call to e a simple direct call, or | |
420 | * ideally, patch an inline implementation into the callsite. (Direct | |
421 | * calls are essentially free, because the call and return addresses | |
422 | * are completely predictable.) | |
423 | * | |
424 | * For i386, these macros rely on the standard gcc "regparm(3)" calling | |
425 | * convention, in which the first three arguments are placed in %eax, | |
426 | * %edx, %ecx (in that order), and the remaining arguments are placed | |
427 | * on the stack. All caller-save registers (eax,edx,ecx) are expected | |
428 | * to be modified (either clobbered or used for return values). | |
429 | * X86_64, on the other hand, already specifies a register-based calling | |
430 | * conventions, returning at %rax, with parameteres going on %rdi, %rsi, | |
431 | * %rdx, and %rcx. Note that for this reason, x86_64 does not need any | |
432 | * special handling for dealing with 4 arguments, unlike i386. | |
433 | * However, x86_64 also have to clobber all caller saved registers, which | |
434 | * unfortunately, are quite a bit (r8 - r11) | |
435 | * | |
436 | * The call instruction itself is marked by placing its start address | |
437 | * and size into the .parainstructions section, so that | |
438 | * apply_paravirt() in arch/i386/kernel/alternative.c can do the | |
439 | * appropriate patching under the control of the backend pv_init_ops | |
440 | * implementation. | |
441 | * | |
442 | * Unfortunately there's no way to get gcc to generate the args setup | |
443 | * for the call, and then allow the call itself to be generated by an | |
444 | * inline asm. Because of this, we must do the complete arg setup and | |
445 | * return value handling from within these macros. This is fairly | |
446 | * cumbersome. | |
447 | * | |
448 | * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments. | |
449 | * It could be extended to more arguments, but there would be little | |
450 | * to be gained from that. For each number of arguments, there are | |
451 | * the two VCALL and CALL variants for void and non-void functions. | |
452 | * | |
453 | * When there is a return value, the invoker of the macro must specify | |
454 | * the return type. The macro then uses sizeof() on that type to | |
455 | * determine whether its a 32 or 64 bit value, and places the return | |
456 | * in the right register(s) (just %eax for 32-bit, and %edx:%eax for | |
457 | * 64-bit). For x86_64 machines, it just returns at %rax regardless of | |
458 | * the return value size. | |
459 | * | |
460 | * 64-bit arguments are passed as a pair of adjacent 32-bit arguments | |
461 | * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments | |
462 | * in low,high order | |
463 | * | |
464 | * Small structures are passed and returned in registers. The macro | |
465 | * calling convention can't directly deal with this, so the wrapper | |
466 | * functions must do this. | |
467 | * | |
468 | * These PVOP_* macros are only defined within this header. This | |
469 | * means that all uses must be wrapped in inline functions. This also | |
470 | * makes sure the incoming and outgoing types are always correct. | |
471 | */ | |
472 | #ifdef CONFIG_X86_32 | |
bb93eb4c JP |
473 | #define PVOP_VCALL_ARGS \ |
474 | unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx; \ | |
475 | register void *__sp asm("esp") | |
ac5672f8 JF |
476 | #define PVOP_CALL_ARGS PVOP_VCALL_ARGS |
477 | ||
478 | #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x)) | |
479 | #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x)) | |
480 | #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x)) | |
481 | ||
482 | #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \ | |
483 | "=c" (__ecx) | |
484 | #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS | |
485 | ||
486 | #define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx) | |
487 | #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS | |
488 | ||
489 | #define EXTRA_CLOBBERS | |
490 | #define VEXTRA_CLOBBERS | |
491 | #else /* CONFIG_X86_64 */ | |
71999d98 | 492 | /* [re]ax isn't an arg, but the return val */ |
bb93eb4c JP |
493 | #define PVOP_VCALL_ARGS \ |
494 | unsigned long __edi = __edi, __esi = __esi, \ | |
495 | __edx = __edx, __ecx = __ecx, __eax = __eax; \ | |
496 | register void *__sp asm("rsp") | |
71999d98 | 497 | #define PVOP_CALL_ARGS PVOP_VCALL_ARGS |
ac5672f8 JF |
498 | |
499 | #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x)) | |
500 | #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x)) | |
501 | #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x)) | |
502 | #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x)) | |
503 | ||
504 | #define PVOP_VCALL_CLOBBERS "=D" (__edi), \ | |
505 | "=S" (__esi), "=d" (__edx), \ | |
506 | "=c" (__ecx) | |
507 | #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) | |
508 | ||
71999d98 | 509 | /* void functions are still allowed [re]ax for scratch */ |
ac5672f8 JF |
510 | #define PVOP_VCALLEE_CLOBBERS "=a" (__eax) |
511 | #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS | |
512 | ||
513 | #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11" | |
514 | #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" | |
515 | #endif /* CONFIG_X86_32 */ | |
516 | ||
517 | #ifdef CONFIG_PARAVIRT_DEBUG | |
518 | #define PVOP_TEST_NULL(op) BUG_ON(op == NULL) | |
519 | #else | |
520 | #define PVOP_TEST_NULL(op) ((void)op) | |
521 | #endif | |
522 | ||
11f254db PZ |
523 | #define PVOP_RETMASK(rettype) \ |
524 | ({ unsigned long __mask = ~0UL; \ | |
525 | switch (sizeof(rettype)) { \ | |
526 | case 1: __mask = 0xffUL; break; \ | |
527 | case 2: __mask = 0xffffUL; break; \ | |
528 | case 4: __mask = 0xffffffffUL; break; \ | |
529 | default: break; \ | |
530 | } \ | |
531 | __mask; \ | |
532 | }) | |
533 | ||
534 | ||
ac5672f8 JF |
535 | #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \ |
536 | pre, post, ...) \ | |
537 | ({ \ | |
538 | rettype __ret; \ | |
539 | PVOP_CALL_ARGS; \ | |
540 | PVOP_TEST_NULL(op); \ | |
541 | /* This is 32-bit specific, but is okay in 64-bit */ \ | |
542 | /* since this condition will never hold */ \ | |
543 | if (sizeof(rettype) > sizeof(unsigned long)) { \ | |
544 | asm volatile(pre \ | |
545 | paravirt_alt(PARAVIRT_CALL) \ | |
546 | post \ | |
bb93eb4c | 547 | : call_clbr, "+r" (__sp) \ |
ac5672f8 JF |
548 | : paravirt_type(op), \ |
549 | paravirt_clobber(clbr), \ | |
550 | ##__VA_ARGS__ \ | |
551 | : "memory", "cc" extra_clbr); \ | |
552 | __ret = (rettype)((((u64)__edx) << 32) | __eax); \ | |
553 | } else { \ | |
554 | asm volatile(pre \ | |
555 | paravirt_alt(PARAVIRT_CALL) \ | |
556 | post \ | |
bb93eb4c | 557 | : call_clbr, "+r" (__sp) \ |
ac5672f8 JF |
558 | : paravirt_type(op), \ |
559 | paravirt_clobber(clbr), \ | |
560 | ##__VA_ARGS__ \ | |
561 | : "memory", "cc" extra_clbr); \ | |
11f254db | 562 | __ret = (rettype)(__eax & PVOP_RETMASK(rettype)); \ |
ac5672f8 JF |
563 | } \ |
564 | __ret; \ | |
565 | }) | |
566 | ||
567 | #define __PVOP_CALL(rettype, op, pre, post, ...) \ | |
568 | ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \ | |
569 | EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__) | |
570 | ||
571 | #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \ | |
572 | ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \ | |
573 | PVOP_CALLEE_CLOBBERS, , \ | |
574 | pre, post, ##__VA_ARGS__) | |
575 | ||
576 | ||
577 | #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \ | |
578 | ({ \ | |
579 | PVOP_VCALL_ARGS; \ | |
580 | PVOP_TEST_NULL(op); \ | |
581 | asm volatile(pre \ | |
582 | paravirt_alt(PARAVIRT_CALL) \ | |
583 | post \ | |
bb93eb4c | 584 | : call_clbr, "+r" (__sp) \ |
ac5672f8 JF |
585 | : paravirt_type(op), \ |
586 | paravirt_clobber(clbr), \ | |
587 | ##__VA_ARGS__ \ | |
588 | : "memory", "cc" extra_clbr); \ | |
589 | }) | |
590 | ||
591 | #define __PVOP_VCALL(op, pre, post, ...) \ | |
592 | ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \ | |
593 | VEXTRA_CLOBBERS, \ | |
594 | pre, post, ##__VA_ARGS__) | |
595 | ||
71999d98 JF |
596 | #define __PVOP_VCALLEESAVE(op, pre, post, ...) \ |
597 | ____PVOP_VCALL(op.func, CLBR_RET_REG, \ | |
ac5672f8 JF |
598 | PVOP_VCALLEE_CLOBBERS, , \ |
599 | pre, post, ##__VA_ARGS__) | |
600 | ||
601 | ||
602 | ||
603 | #define PVOP_CALL0(rettype, op) \ | |
604 | __PVOP_CALL(rettype, op, "", "") | |
605 | #define PVOP_VCALL0(op) \ | |
606 | __PVOP_VCALL(op, "", "") | |
607 | ||
608 | #define PVOP_CALLEE0(rettype, op) \ | |
609 | __PVOP_CALLEESAVE(rettype, op, "", "") | |
610 | #define PVOP_VCALLEE0(op) \ | |
611 | __PVOP_VCALLEESAVE(op, "", "") | |
612 | ||
613 | ||
614 | #define PVOP_CALL1(rettype, op, arg1) \ | |
615 | __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) | |
616 | #define PVOP_VCALL1(op, arg1) \ | |
617 | __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1)) | |
618 | ||
619 | #define PVOP_CALLEE1(rettype, op, arg1) \ | |
620 | __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1)) | |
621 | #define PVOP_VCALLEE1(op, arg1) \ | |
622 | __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1)) | |
623 | ||
624 | ||
625 | #define PVOP_CALL2(rettype, op, arg1, arg2) \ | |
626 | __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ | |
627 | PVOP_CALL_ARG2(arg2)) | |
628 | #define PVOP_VCALL2(op, arg1, arg2) \ | |
629 | __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ | |
630 | PVOP_CALL_ARG2(arg2)) | |
631 | ||
632 | #define PVOP_CALLEE2(rettype, op, arg1, arg2) \ | |
633 | __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ | |
634 | PVOP_CALL_ARG2(arg2)) | |
635 | #define PVOP_VCALLEE2(op, arg1, arg2) \ | |
636 | __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \ | |
637 | PVOP_CALL_ARG2(arg2)) | |
638 | ||
639 | ||
640 | #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ | |
641 | __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \ | |
642 | PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) | |
643 | #define PVOP_VCALL3(op, arg1, arg2, arg3) \ | |
644 | __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \ | |
645 | PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3)) | |
646 | ||
647 | /* This is the only difference in x86_64. We can make it much simpler */ | |
648 | #ifdef CONFIG_X86_32 | |
649 | #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ | |
650 | __PVOP_CALL(rettype, op, \ | |
651 | "push %[_arg4];", "lea 4(%%esp),%%esp;", \ | |
652 | PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ | |
653 | PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4))) | |
654 | #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ | |
655 | __PVOP_VCALL(op, \ | |
656 | "push %[_arg4];", "lea 4(%%esp),%%esp;", \ | |
657 | "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ | |
658 | "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) | |
659 | #else | |
660 | #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ | |
661 | __PVOP_CALL(rettype, op, "", "", \ | |
662 | PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ | |
663 | PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) | |
664 | #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ | |
665 | __PVOP_VCALL(op, "", "", \ | |
666 | PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \ | |
667 | PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4)) | |
668 | #endif | |
669 | ||
670 | /* Lazy mode for batching updates / context switch */ | |
671 | enum paravirt_lazy_mode { | |
672 | PARAVIRT_LAZY_NONE, | |
673 | PARAVIRT_LAZY_MMU, | |
674 | PARAVIRT_LAZY_CPU, | |
675 | }; | |
676 | ||
677 | enum paravirt_lazy_mode paravirt_get_lazy_mode(void); | |
678 | void paravirt_start_context_switch(struct task_struct *prev); | |
679 | void paravirt_end_context_switch(struct task_struct *next); | |
680 | ||
681 | void paravirt_enter_lazy_mmu(void); | |
682 | void paravirt_leave_lazy_mmu(void); | |
511ba86e | 683 | void paravirt_flush_lazy_mmu(void); |
ac5672f8 JF |
684 | |
685 | void _paravirt_nop(void); | |
686 | u32 _paravirt_ident_32(u32); | |
687 | u64 _paravirt_ident_64(u64); | |
688 | ||
689 | #define paravirt_nop ((void *)_paravirt_nop) | |
690 | ||
691 | /* These all sit in the .parainstructions section to tell us what to patch. */ | |
692 | struct paravirt_patch_site { | |
693 | u8 *instr; /* original instructions */ | |
694 | u8 instrtype; /* type of this instruction */ | |
695 | u8 len; /* length of original instruction */ | |
696 | u16 clobbers; /* what registers you may clobber */ | |
697 | }; | |
698 | ||
699 | extern struct paravirt_patch_site __parainstructions[], | |
700 | __parainstructions_end[]; | |
701 | ||
702 | #endif /* __ASSEMBLY__ */ | |
703 | ||
704 | #endif /* _ASM_X86_PARAVIRT_TYPES_H */ |