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1965aae3 PA |
1 | #ifndef _ASM_X86_PCI_H |
2 | #define _ASM_X86_PCI_H | |
f3e6f164 GKH |
3 | |
4 | #include <linux/mm.h> /* for struct page */ | |
5 | #include <linux/types.h> | |
6 | #include <linux/slab.h> | |
7 | #include <linux/string.h> | |
8 | #include <asm/scatterlist.h> | |
9 | #include <asm/io.h> | |
294ee6f8 | 10 | #include <asm/x86_init.h> |
f3e6f164 | 11 | |
f3e6f164 GKH |
12 | #ifdef __KERNEL__ |
13 | ||
14 | struct pci_sysdata { | |
15 | int domain; /* PCI domain */ | |
16 | int node; /* NUMA node */ | |
17 | #ifdef CONFIG_X86_64 | |
69bdb7bc | 18 | void *iommu; /* IOMMU private data */ |
f3e6f164 GKH |
19 | #endif |
20 | }; | |
21 | ||
07156509 | 22 | extern int pci_routeirq; |
a9322f64 | 23 | extern int noioapicquirk; |
41b9eb26 | 24 | extern int noioapicreroute; |
07156509 | 25 | |
f3e6f164 | 26 | /* scan a bus after allocating a pci_sysdata for it */ |
871d5f8d YL |
27 | extern struct pci_bus *pci_scan_bus_on_node(int busno, struct pci_ops *ops, |
28 | int node); | |
f3e6f164 GKH |
29 | extern struct pci_bus *pci_scan_bus_with_sysdata(int busno); |
30 | ||
23b90cfd JB |
31 | #ifdef CONFIG_PCI |
32 | ||
33 | #ifdef CONFIG_PCI_DOMAINS | |
f3e6f164 GKH |
34 | static inline int pci_domain_nr(struct pci_bus *bus) |
35 | { | |
36 | struct pci_sysdata *sd = bus->sysdata; | |
37 | return sd->domain; | |
38 | } | |
39 | ||
40 | static inline int pci_proc_domain(struct pci_bus *bus) | |
41 | { | |
42 | return pci_domain_nr(bus); | |
43 | } | |
23b90cfd | 44 | #endif |
f3e6f164 GKH |
45 | |
46 | /* Can be used to override the logic in pci_scan_bus for skipping | |
47 | already-configured bus numbers - to be used for buggy BIOSes | |
48 | or architectures with incomplete PCI setup by the loader */ | |
49 | ||
f3e6f164 | 50 | extern unsigned int pcibios_assign_all_busses(void); |
b72d0db9 TG |
51 | extern int pci_legacy_init(void); |
52 | # ifdef CONFIG_ACPI | |
53 | # define x86_default_pci_init pci_acpi_init | |
54 | # else | |
55 | # define x86_default_pci_init pci_legacy_init | |
56 | # endif | |
f3e6f164 | 57 | #else |
b72d0db9 TG |
58 | # define pcibios_assign_all_busses() 0 |
59 | # define x86_default_pci_init NULL | |
f3e6f164 | 60 | #endif |
f3e6f164 GKH |
61 | |
62 | extern unsigned long pci_mem_start; | |
63 | #define PCIBIOS_MIN_IO 0x1000 | |
64 | #define PCIBIOS_MIN_MEM (pci_mem_start) | |
65 | ||
66 | #define PCIBIOS_MIN_CARDBUS_IO 0x4000 | |
67 | ||
5bd5a452 | 68 | extern int pcibios_enabled; |
f3e6f164 | 69 | void pcibios_config_init(void); |
69bdb7bc | 70 | struct pci_bus *pcibios_scan_root(int bus); |
f3e6f164 GKH |
71 | |
72 | void pcibios_set_master(struct pci_dev *dev); | |
73 | void pcibios_penalize_isa_irq(int irq, int active); | |
74 | struct irq_routing_table *pcibios_get_irq_routing_table(void); | |
75 | int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq); | |
76 | ||
77 | ||
78 | #define HAVE_PCI_MMAP | |
79 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |
69bdb7bc JP |
80 | enum pci_mmap_state mmap_state, |
81 | int write_combine); | |
f3e6f164 GKH |
82 | |
83 | ||
84 | #ifdef CONFIG_PCI | |
376ff035 | 85 | extern void early_quirks(void); |
f3e6f164 GKH |
86 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, |
87 | enum pci_dma_burst_strategy *strat, | |
88 | unsigned long *strategy_parameter) | |
89 | { | |
90 | *strat = PCI_DMA_BURST_INFINITY; | |
91 | *strategy_parameter = ~0UL; | |
92 | } | |
376ff035 TG |
93 | #else |
94 | static inline void early_quirks(void) { } | |
f3e6f164 GKH |
95 | #endif |
96 | ||
cfb80c9e JF |
97 | extern void pci_iommu_alloc(void); |
98 | ||
294ee6f8 SS |
99 | #ifdef CONFIG_PCI_MSI |
100 | /* MSI arch specific hooks */ | |
101 | static inline int x86_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | |
102 | { | |
103 | return x86_msi.setup_msi_irqs(dev, nvec, type); | |
104 | } | |
105 | ||
106 | static inline void x86_teardown_msi_irqs(struct pci_dev *dev) | |
107 | { | |
108 | x86_msi.teardown_msi_irqs(dev); | |
109 | } | |
110 | ||
111 | static inline void x86_teardown_msi_irq(unsigned int irq) | |
112 | { | |
113 | x86_msi.teardown_msi_irq(irq); | |
114 | } | |
76ccc297 KRW |
115 | static inline void x86_restore_msi_irqs(struct pci_dev *dev, int irq) |
116 | { | |
117 | x86_msi.restore_msi_irqs(dev, irq); | |
118 | } | |
294ee6f8 SS |
119 | #define arch_setup_msi_irqs x86_setup_msi_irqs |
120 | #define arch_teardown_msi_irqs x86_teardown_msi_irqs | |
121 | #define arch_teardown_msi_irq x86_teardown_msi_irq | |
76ccc297 | 122 | #define arch_restore_msi_irqs x86_restore_msi_irqs |
294ee6f8 SS |
123 | /* implemented in arch/x86/kernel/apic/io_apic. */ |
124 | int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); | |
125 | void native_teardown_msi_irq(unsigned int irq); | |
76ccc297 | 126 | void native_restore_msi_irqs(struct pci_dev *dev, int irq); |
294ee6f8 SS |
127 | /* default to the implementation in drivers/lib/msi.c */ |
128 | #define HAVE_DEFAULT_MSI_TEARDOWN_IRQS | |
76ccc297 | 129 | #define HAVE_DEFAULT_MSI_RESTORE_IRQS |
294ee6f8 | 130 | void default_teardown_msi_irqs(struct pci_dev *dev); |
76ccc297 | 131 | void default_restore_msi_irqs(struct pci_dev *dev, int irq); |
294ee6f8 SS |
132 | #else |
133 | #define native_setup_msi_irqs NULL | |
134 | #define native_teardown_msi_irq NULL | |
135 | #define default_teardown_msi_irqs NULL | |
76ccc297 | 136 | #define default_restore_msi_irqs NULL |
294ee6f8 | 137 | #endif |
11df1f05 | 138 | |
67796bf7 JR |
139 | #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys) |
140 | ||
67796bf7 JR |
141 | #endif /* __KERNEL__ */ |
142 | ||
143 | #ifdef CONFIG_X86_64 | |
144 | #include "pci_64.h" | |
f3e6f164 GKH |
145 | #endif |
146 | ||
147 | /* implement the pci_ DMA API in terms of the generic device dma_ one */ | |
148 | #include <asm-generic/pci-dma-compat.h> | |
149 | ||
150 | /* generic pci stuff */ | |
151 | #include <asm-generic/pci.h> | |
1f82de10 | 152 | #define PCIBIOS_MAX_MEM_32 0xffffffff |
f3e6f164 | 153 | |
b4ea9299 TG |
154 | #ifdef CONFIG_NUMA |
155 | /* Returns the node based on pci bus */ | |
393d68fb | 156 | static inline int __pcibus_to_node(const struct pci_bus *bus) |
b4ea9299 | 157 | { |
393d68fb | 158 | const struct pci_sysdata *sd = bus->sysdata; |
b4ea9299 TG |
159 | |
160 | return sd->node; | |
161 | } | |
f3e6f164 | 162 | |
393d68fb RR |
163 | static inline const struct cpumask * |
164 | cpumask_of_pcibus(const struct pci_bus *bus) | |
165 | { | |
7715a1e8 DR |
166 | int node; |
167 | ||
168 | node = __pcibus_to_node(bus); | |
169 | return (node == -1) ? cpu_online_mask : | |
170 | cpumask_of_node(node); | |
393d68fb | 171 | } |
b4ea9299 | 172 | #endif |
f3e6f164 | 173 | |
1965aae3 | 174 | #endif /* _ASM_X86_PCI_H */ |