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mm: convert p[te|md]_mknonnuma and remaining page table manipulations
[mirror_ubuntu-focal-kernel.git] / arch / x86 / include / asm / pgtable.h
CommitLineData
1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_H
2#define _ASM_X86_PGTABLE_H
6c386655 3
c47c1b1f 4#include <asm/page.h>
1adcaafe 5#include <asm/e820.h>
c47c1b1f 6
8d19c99f 7#include <asm/pgtable_types.h>
b2bc2731 8
8a7b12f7 9/*
10 * Macro to mark a page protection value as UC-
11 */
d85f3334
JG
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | \
15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
8a7b12f7 16 : (prot))
17
4614139c 18#ifndef __ASSEMBLY__
55a6ca25
PA
19#include <asm/x86_init.h>
20
ef6bea6d
BP
21void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd);
22
8405b122
JF
23/*
24 * ZERO_PAGE is a global shared page that is always zero: used
25 * for zero-mapped memory areas etc..
26 */
277d5b40
AK
27extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
28 __visible;
8405b122
JF
29#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
30
e3ed910d
JF
31extern spinlock_t pgd_lock;
32extern struct list_head pgd_list;
8405b122 33
617d34d9
JF
34extern struct mm_struct *pgd_page_get_mm(struct page *page);
35
54321d94
JF
36#ifdef CONFIG_PARAVIRT
37#include <asm/paravirt.h>
38#else /* !CONFIG_PARAVIRT */
39#define set_pte(ptep, pte) native_set_pte(ptep, pte)
40#define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
2609ae6d 41#define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd)
54321d94 42
54321d94
JF
43#define set_pte_atomic(ptep, pte) \
44 native_set_pte_atomic(ptep, pte)
45
46#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
47
48#ifndef __PAGETABLE_PUD_FOLDED
49#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
50#define pgd_clear(pgd) native_pgd_clear(pgd)
51#endif
52
53#ifndef set_pud
54# define set_pud(pudp, pud) native_set_pud(pudp, pud)
55#endif
56
57#ifndef __PAGETABLE_PMD_FOLDED
58#define pud_clear(pud) native_pud_clear(pud)
59#endif
60
61#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
62#define pmd_clear(pmd) native_pmd_clear(pmd)
63
64#define pte_update(mm, addr, ptep) do { } while (0)
65#define pte_update_defer(mm, addr, ptep) do { } while (0)
2609ae6d
AA
66#define pmd_update(mm, addr, ptep) do { } while (0)
67#define pmd_update_defer(mm, addr, ptep) do { } while (0)
54321d94 68
54321d94
JF
69#define pgd_val(x) native_pgd_val(x)
70#define __pgd(x) native_make_pgd(x)
71
72#ifndef __PAGETABLE_PUD_FOLDED
73#define pud_val(x) native_pud_val(x)
74#define __pud(x) native_make_pud(x)
75#endif
76
77#ifndef __PAGETABLE_PMD_FOLDED
78#define pmd_val(x) native_pmd_val(x)
79#define __pmd(x) native_make_pmd(x)
80#endif
81
82#define pte_val(x) native_pte_val(x)
83#define __pte(x) native_make_pte(x)
84
224101ed
JF
85#define arch_end_context_switch(prev) do {} while(0)
86
54321d94
JF
87#endif /* CONFIG_PARAVIRT */
88
4614139c
JF
89/*
90 * The following only work if pte_present() is true.
91 * Undefined behaviour if not..
92 */
3cbaeafe
JP
93static inline int pte_dirty(pte_t pte)
94{
a15af1c9 95 return pte_flags(pte) & _PAGE_DIRTY;
3cbaeafe
JP
96}
97
98static inline int pte_young(pte_t pte)
99{
a15af1c9 100 return pte_flags(pte) & _PAGE_ACCESSED;
3cbaeafe
JP
101}
102
c164e038
KS
103static inline int pmd_dirty(pmd_t pmd)
104{
105 return pmd_flags(pmd) & _PAGE_DIRTY;
106}
3cbaeafe 107
f2d6bfe9
JW
108static inline int pmd_young(pmd_t pmd)
109{
110 return pmd_flags(pmd) & _PAGE_ACCESSED;
111}
112
3cbaeafe
JP
113static inline int pte_write(pte_t pte)
114{
a15af1c9 115 return pte_flags(pte) & _PAGE_RW;
3cbaeafe
JP
116}
117
3cbaeafe
JP
118static inline int pte_huge(pte_t pte)
119{
a15af1c9 120 return pte_flags(pte) & _PAGE_PSE;
4614139c
JF
121}
122
3cbaeafe
JP
123static inline int pte_global(pte_t pte)
124{
a15af1c9 125 return pte_flags(pte) & _PAGE_GLOBAL;
3cbaeafe
JP
126}
127
128static inline int pte_exec(pte_t pte)
129{
a15af1c9 130 return !(pte_flags(pte) & _PAGE_NX);
3cbaeafe
JP
131}
132
7e675137
NP
133static inline int pte_special(pte_t pte)
134{
b38af472
HD
135 /*
136 * See CONFIG_NUMA_BALANCING pte_numa in include/asm-generic/pgtable.h.
137 * On x86 we have _PAGE_BIT_NUMA == _PAGE_BIT_GLOBAL+1 ==
138 * __PAGE_BIT_SOFTW1 == _PAGE_BIT_SPECIAL.
139 */
140 return (pte_flags(pte) & _PAGE_SPECIAL) &&
141 (pte_flags(pte) & (_PAGE_PRESENT|_PAGE_PROTNONE));
7e675137
NP
142}
143
91030ca1
HD
144static inline unsigned long pte_pfn(pte_t pte)
145{
146 return (pte_val(pte) & PTE_PFN_MASK) >> PAGE_SHIFT;
147}
148
087975b0
AM
149static inline unsigned long pmd_pfn(pmd_t pmd)
150{
151 return (pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT;
152}
153
0ee364eb
MG
154static inline unsigned long pud_pfn(pud_t pud)
155{
156 return (pud_val(pud) & PTE_PFN_MASK) >> PAGE_SHIFT;
157}
158
91030ca1
HD
159#define pte_page(pte) pfn_to_page(pte_pfn(pte))
160
3cbaeafe
JP
161static inline int pmd_large(pmd_t pte)
162{
027ef6c8 163 return pmd_flags(pte) & _PAGE_PSE;
3cbaeafe
JP
164}
165
f2d6bfe9
JW
166#ifdef CONFIG_TRANSPARENT_HUGEPAGE
167static inline int pmd_trans_splitting(pmd_t pmd)
168{
169 return pmd_val(pmd) & _PAGE_SPLITTING;
170}
171
172static inline int pmd_trans_huge(pmd_t pmd)
173{
174 return pmd_val(pmd) & _PAGE_PSE;
175}
4b7167b9
AA
176
177static inline int has_transparent_hugepage(void)
178{
179 return cpu_has_pse;
180}
f2d6bfe9
JW
181#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
182
6522869c
JF
183static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
184{
185 pteval_t v = native_pte_val(pte);
186
187 return native_make_pte(v | set);
188}
189
190static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
191{
192 pteval_t v = native_pte_val(pte);
193
194 return native_make_pte(v & ~clear);
195}
196
3cbaeafe
JP
197static inline pte_t pte_mkclean(pte_t pte)
198{
6522869c 199 return pte_clear_flags(pte, _PAGE_DIRTY);
3cbaeafe
JP
200}
201
202static inline pte_t pte_mkold(pte_t pte)
203{
6522869c 204 return pte_clear_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
205}
206
207static inline pte_t pte_wrprotect(pte_t pte)
208{
6522869c 209 return pte_clear_flags(pte, _PAGE_RW);
3cbaeafe
JP
210}
211
212static inline pte_t pte_mkexec(pte_t pte)
213{
6522869c 214 return pte_clear_flags(pte, _PAGE_NX);
3cbaeafe
JP
215}
216
217static inline pte_t pte_mkdirty(pte_t pte)
218{
0f8975ec 219 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
3cbaeafe
JP
220}
221
222static inline pte_t pte_mkyoung(pte_t pte)
223{
6522869c 224 return pte_set_flags(pte, _PAGE_ACCESSED);
3cbaeafe
JP
225}
226
227static inline pte_t pte_mkwrite(pte_t pte)
228{
6522869c 229 return pte_set_flags(pte, _PAGE_RW);
3cbaeafe
JP
230}
231
232static inline pte_t pte_mkhuge(pte_t pte)
233{
6522869c 234 return pte_set_flags(pte, _PAGE_PSE);
3cbaeafe
JP
235}
236
237static inline pte_t pte_clrhuge(pte_t pte)
238{
6522869c 239 return pte_clear_flags(pte, _PAGE_PSE);
3cbaeafe
JP
240}
241
242static inline pte_t pte_mkglobal(pte_t pte)
243{
6522869c 244 return pte_set_flags(pte, _PAGE_GLOBAL);
3cbaeafe
JP
245}
246
247static inline pte_t pte_clrglobal(pte_t pte)
248{
6522869c 249 return pte_clear_flags(pte, _PAGE_GLOBAL);
3cbaeafe 250}
4614139c 251
7e675137
NP
252static inline pte_t pte_mkspecial(pte_t pte)
253{
6522869c 254 return pte_set_flags(pte, _PAGE_SPECIAL);
7e675137
NP
255}
256
f2d6bfe9
JW
257static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
258{
259 pmdval_t v = native_pmd_val(pmd);
260
261 return __pmd(v | set);
262}
263
264static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
265{
266 pmdval_t v = native_pmd_val(pmd);
267
268 return __pmd(v & ~clear);
269}
270
271static inline pmd_t pmd_mkold(pmd_t pmd)
272{
273 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
274}
275
276static inline pmd_t pmd_wrprotect(pmd_t pmd)
277{
278 return pmd_clear_flags(pmd, _PAGE_RW);
279}
280
281static inline pmd_t pmd_mkdirty(pmd_t pmd)
282{
0f8975ec 283 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
f2d6bfe9
JW
284}
285
286static inline pmd_t pmd_mkhuge(pmd_t pmd)
287{
288 return pmd_set_flags(pmd, _PAGE_PSE);
289}
290
291static inline pmd_t pmd_mkyoung(pmd_t pmd)
292{
293 return pmd_set_flags(pmd, _PAGE_ACCESSED);
294}
295
296static inline pmd_t pmd_mkwrite(pmd_t pmd)
297{
298 return pmd_set_flags(pmd, _PAGE_RW);
299}
300
301static inline pmd_t pmd_mknotpresent(pmd_t pmd)
302{
303 return pmd_clear_flags(pmd, _PAGE_PRESENT);
304}
305
2bf01f9f 306#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
0f8975ec
PE
307static inline int pte_soft_dirty(pte_t pte)
308{
309 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
310}
311
312static inline int pmd_soft_dirty(pmd_t pmd)
313{
314 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
315}
316
317static inline pte_t pte_mksoft_dirty(pte_t pte)
318{
319 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
320}
321
322static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
323{
324 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
325}
326
2bf01f9f
CG
327#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
328
b534816b
JF
329/*
330 * Mask out unsupported bits in a present pgprot. Non-present pgprots
331 * can use those bits for other purposes, so leave them be.
332 */
333static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
334{
335 pgprotval_t protval = pgprot_val(pgprot);
336
337 if (protval & _PAGE_PRESENT)
338 protval &= __supported_pte_mask;
339
340 return protval;
341}
342
6fdc05d4
JF
343static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
344{
b534816b
JF
345 return __pte(((phys_addr_t)page_nr << PAGE_SHIFT) |
346 massage_pgprot(pgprot));
6fdc05d4
JF
347}
348
349static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
350{
b534816b
JF
351 return __pmd(((phys_addr_t)page_nr << PAGE_SHIFT) |
352 massage_pgprot(pgprot));
6fdc05d4
JF
353}
354
38472311
IM
355static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
356{
357 pteval_t val = pte_val(pte);
358
359 /*
360 * Chop off the NX bit (if present), and add the NX portion of
361 * the newprot (if present):
362 */
1c12c4cf 363 val &= _PAGE_CHG_MASK;
b534816b 364 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
38472311
IM
365
366 return __pte(val);
367}
368
c489f125
JW
369static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
370{
371 pmdval_t val = pmd_val(pmd);
372
373 val &= _HPAGE_CHG_MASK;
374 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
375
376 return __pmd(val);
377}
378
1c12c4cf
VP
379/* mprotect needs to preserve PAT bits when updating vm_page_prot */
380#define pgprot_modify pgprot_modify
381static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
382{
383 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
384 pgprotval_t addbits = pgprot_val(newprot);
385 return __pgprot(preservebits | addbits);
386}
387
77be1fab 388#define pte_pgprot(x) __pgprot(pte_flags(x) & PTE_FLAGS_MASK)
c6ca18eb 389
b534816b 390#define canon_pgprot(p) __pgprot(massage_pgprot(p))
1e8e23bc 391
1adcaafe 392static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
d85f3334
JG
393 enum page_cache_mode pcm,
394 enum page_cache_mode new_pcm)
afc7d20c 395{
1adcaafe 396 /*
55a6ca25 397 * PAT type is always WB for untracked ranges, so no need to check.
1adcaafe 398 */
8a271389 399 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
1adcaafe
SS
400 return 1;
401
afc7d20c 402 /*
403 * Certain new memtypes are not allowed with certain
404 * requested memtype:
405 * - request is uncached, return cannot be write-back
406 * - request is write-combine, return cannot be write-back
407 */
d85f3334
JG
408 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
409 new_pcm == _PAGE_CACHE_MODE_WB) ||
410 (pcm == _PAGE_CACHE_MODE_WC &&
411 new_pcm == _PAGE_CACHE_MODE_WB)) {
afc7d20c 412 return 0;
413 }
414
415 return 1;
416}
417
458a3e64
TH
418pmd_t *populate_extra_pmd(unsigned long vaddr);
419pte_t *populate_extra_pte(unsigned long vaddr);
4614139c
JF
420#endif /* __ASSEMBLY__ */
421
96a388de 422#ifdef CONFIG_X86_32
a1ce3928 423# include <asm/pgtable_32.h>
96a388de 424#else
a1ce3928 425# include <asm/pgtable_64.h>
96a388de 426#endif
6c386655 427
aca159db 428#ifndef __ASSEMBLY__
f476961c 429#include <linux/mm_types.h>
fa0f281c 430#include <linux/mmdebug.h>
4cbeb51b 431#include <linux/log2.h>
aca159db 432
a034a010
JF
433static inline int pte_none(pte_t pte)
434{
435 return !pte.pte;
436}
437
8de01da3
JF
438#define __HAVE_ARCH_PTE_SAME
439static inline int pte_same(pte_t a, pte_t b)
440{
441 return a.pte == b.pte;
442}
443
7c683851
JF
444static inline int pte_present(pte_t a)
445{
5926f87f
DV
446 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE |
447 _PAGE_NUMA);
7c683851
JF
448}
449
c46a7c81
MG
450#define pte_present_nonuma pte_present_nonuma
451static inline int pte_present_nonuma(pte_t a)
452{
453 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
454}
455
2c3cf556 456#define pte_accessible pte_accessible
20841405 457static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
2c3cf556 458{
20841405
RR
459 if (pte_flags(a) & _PAGE_PRESENT)
460 return true;
461
462 if ((pte_flags(a) & (_PAGE_PROTNONE | _PAGE_NUMA)) &&
463 mm_tlb_flush_pending(mm))
464 return true;
465
466 return false;
2c3cf556
RR
467}
468
eb63657e 469static inline int pte_hidden(pte_t pte)
dfec072e 470{
eb63657e 471 return pte_flags(pte) & _PAGE_HIDDEN;
dfec072e
VN
472}
473
649e8ef6
JF
474static inline int pmd_present(pmd_t pmd)
475{
027ef6c8
AA
476 /*
477 * Checking for _PAGE_PSE is needed too because
478 * split_huge_page will temporarily clear the present bit (but
479 * the _PAGE_PSE flag will remain set at all times while the
480 * _PAGE_PRESENT bit is clear).
481 */
be3a7284
AA
482 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE |
483 _PAGE_NUMA);
649e8ef6
JF
484}
485
e7bb4b6d
MG
486#ifdef CONFIG_NUMA_BALANCING
487/*
488 * These work without NUMA balancing but the kernel does not care. See the
489 * comment in include/asm-generic/pgtable.h
490 */
491static inline int pte_protnone(pte_t pte)
492{
493 return pte_flags(pte) & _PAGE_PROTNONE;
494}
495
496static inline int pmd_protnone(pmd_t pmd)
497{
498 return pmd_flags(pmd) & _PAGE_PROTNONE;
499}
500#endif /* CONFIG_NUMA_BALANCING */
501
4fea801a
JF
502static inline int pmd_none(pmd_t pmd)
503{
504 /* Only check low word on 32-bit platforms, since it might be
505 out of sync with upper half. */
26c8e317 506 return (unsigned long)native_pmd_val(pmd) == 0;
4fea801a
JF
507}
508
3ffb3564
JF
509static inline unsigned long pmd_page_vaddr(pmd_t pmd)
510{
511 return (unsigned long)__va(pmd_val(pmd) & PTE_PFN_MASK);
512}
513
e5f7f202
IM
514/*
515 * Currently stuck as a macro due to indirect forward reference to
516 * linux/mmzone.h's __section_mem_map_addr() definition:
517 */
db3eb96f 518#define pmd_page(pmd) pfn_to_page((pmd_val(pmd) & PTE_PFN_MASK) >> PAGE_SHIFT)
20063ca4 519
e24d7eee
JF
520/*
521 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
522 *
523 * this macro returns the index of the entry in the pmd page which would
524 * control the given virtual address
525 */
ce0c0f9e 526static inline unsigned long pmd_index(unsigned long address)
e24d7eee
JF
527{
528 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
529}
530
97e2817d
JF
531/*
532 * Conversion functions: convert a page and protection to a page entry,
533 * and a page entry and page directory to the page they refer to.
534 *
535 * (Currently stuck as a macro because of indirect forward reference
536 * to linux/mm.h:page_to_nid())
537 */
538#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
539
346309cf
JF
540/*
541 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
542 *
543 * this function returns the index of the entry in the pte page which would
544 * control the given virtual address
545 */
ce0c0f9e 546static inline unsigned long pte_index(unsigned long address)
346309cf
JF
547{
548 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
549}
550
3fbc2444
JF
551static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
552{
553 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
554}
555
99510238
JF
556static inline int pmd_bad(pmd_t pmd)
557{
be3a7284
AA
558#ifdef CONFIG_NUMA_BALANCING
559 /* pmd_numa check */
560 if ((pmd_flags(pmd) & (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA)
561 return 0;
562#endif
18a7a199 563 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
99510238
JF
564}
565
cc290ca3
JF
566static inline unsigned long pages_to_mb(unsigned long npg)
567{
568 return npg >> (20 - PAGE_SHIFT);
569}
570
5ba7c913 571#if PAGETABLE_LEVELS > 2
deb79cfb
JF
572static inline int pud_none(pud_t pud)
573{
26c8e317 574 return native_pud_val(pud) == 0;
deb79cfb
JF
575}
576
5ba7c913
JF
577static inline int pud_present(pud_t pud)
578{
18a7a199 579 return pud_flags(pud) & _PAGE_PRESENT;
5ba7c913 580}
6fff47e3
JF
581
582static inline unsigned long pud_page_vaddr(pud_t pud)
583{
584 return (unsigned long)__va((unsigned long)pud_val(pud) & PTE_PFN_MASK);
585}
f476961c 586
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IM
587/*
588 * Currently stuck as a macro due to indirect forward reference to
589 * linux/mmzone.h's __section_mem_map_addr() definition:
590 */
591#define pud_page(pud) pfn_to_page(pud_val(pud) >> PAGE_SHIFT)
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592
593/* Find an entry in the second-level page table.. */
594static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
595{
596 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
597}
3180fba0 598
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599static inline int pud_large(pud_t pud)
600{
e2f5bda9 601 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
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602 (_PAGE_PSE | _PAGE_PRESENT);
603}
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604
605static inline int pud_bad(pud_t pud)
606{
18a7a199 607 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
a61bb29a 608}
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609#else
610static inline int pud_large(pud_t pud)
611{
612 return 0;
613}
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614#endif /* PAGETABLE_LEVELS > 2 */
615
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616#if PAGETABLE_LEVELS > 3
617static inline int pgd_present(pgd_t pgd)
618{
18a7a199 619 return pgd_flags(pgd) & _PAGE_PRESENT;
9f38d7e8 620}
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621
622static inline unsigned long pgd_page_vaddr(pgd_t pgd)
623{
624 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
625}
777cba16 626
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627/*
628 * Currently stuck as a macro due to indirect forward reference to
629 * linux/mmzone.h's __section_mem_map_addr() definition:
630 */
631#define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
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632
633/* to find an entry in a page-table-directory. */
ce0c0f9e 634static inline unsigned long pud_index(unsigned long address)
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635{
636 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
637}
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638
639static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
640{
641 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
642}
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643
644static inline int pgd_bad(pgd_t pgd)
645{
18a7a199 646 return (pgd_flags(pgd) & ~_PAGE_USER) != _KERNPG_TABLE;
30f10316 647}
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648
649static inline int pgd_none(pgd_t pgd)
650{
26c8e317 651 return !native_pgd_val(pgd);
7325cc2e 652}
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653#endif /* PAGETABLE_LEVELS > 3 */
654
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655#endif /* __ASSEMBLY__ */
656
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657/*
658 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
659 *
660 * this macro returns the index of the entry in the pgd page which would
661 * control the given virtual address
662 */
663#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
664
665/*
666 * pgd_offset() returns a (pgd_t *)
667 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
668 */
669#define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
670/*
671 * a shortcut which implies the use of the kernel's pgd, instead
672 * of a process's
673 */
674#define pgd_offset_k(address) pgd_offset(&init_mm, (address))
675
676
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677#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
678#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
679
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680#ifndef __ASSEMBLY__
681
2c1b284e 682extern int direct_gbpages;
22ddfcaa 683void init_mem_mapping(void);
8d57470d 684void early_alloc_pgt_buf(void);
2c1b284e 685
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686/* local pte updates need not use xchg for locking */
687static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
688{
689 pte_t res = *ptep;
690
691 /* Pure native function needs no input for mm, addr */
692 native_pte_clear(NULL, 0, ptep);
693 return res;
694}
695
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696static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
697{
698 pmd_t res = *pmdp;
699
700 native_pmd_clear(pmdp);
701 return res;
702}
703
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704static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
705 pte_t *ptep , pte_t pte)
706{
707 native_set_pte(ptep, pte);
708}
709
0a47de52
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710static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,
711 pmd_t *pmdp , pmd_t pmd)
712{
713 native_set_pmd(pmdp, pmd);
714}
715
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716#ifndef CONFIG_PARAVIRT
717/*
718 * Rules for using pte_update - it must be called after any PTE update which
719 * has not been done using the set_pte / clear_pte interfaces. It is used by
720 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
721 * updates should either be sets, clears, or set_pte_atomic for P->P
722 * transitions, which means this hook should only be called for user PTEs.
723 * This hook implies a P->P protection or access change has taken place, which
724 * requires a subsequent TLB flush. The notification can optionally be delayed
725 * until the TLB flush event by using the pte_update_defer form of the
726 * interface, but care must be taken to assure that the flush happens while
727 * still holding the same page table lock so that the shadow and primary pages
728 * do not become out of sync on SMP.
729 */
730#define pte_update(mm, addr, ptep) do { } while (0)
731#define pte_update_defer(mm, addr, ptep) do { } while (0)
732#endif
733
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734/*
735 * We only update the dirty/accessed state if we set
736 * the dirty bit by hand in the kernel, since the hardware
737 * will do the accessed bit for us, and we don't want to
738 * race with other CPU's that might be updating the dirty
739 * bit at the same time.
740 */
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741struct vm_area_struct;
742
195466dc 743#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
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744extern int ptep_set_access_flags(struct vm_area_struct *vma,
745 unsigned long address, pte_t *ptep,
746 pte_t entry, int dirty);
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747
748#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
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749extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
750 unsigned long addr, pte_t *ptep);
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751
752#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
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JF
753extern int ptep_clear_flush_young(struct vm_area_struct *vma,
754 unsigned long address, pte_t *ptep);
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755
756#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
3cbaeafe
JP
757static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
758 pte_t *ptep)
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759{
760 pte_t pte = native_ptep_get_and_clear(ptep);
761 pte_update(mm, addr, ptep);
762 return pte;
763}
764
765#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
3cbaeafe
JP
766static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
767 unsigned long addr, pte_t *ptep,
768 int full)
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769{
770 pte_t pte;
771 if (full) {
772 /*
773 * Full address destruction in progress; paravirt does not
774 * care about updates and native needs no locking
775 */
776 pte = native_local_ptep_get_and_clear(ptep);
777 } else {
778 pte = ptep_get_and_clear(mm, addr, ptep);
779 }
780 return pte;
781}
782
783#define __HAVE_ARCH_PTEP_SET_WRPROTECT
3cbaeafe
JP
784static inline void ptep_set_wrprotect(struct mm_struct *mm,
785 unsigned long addr, pte_t *ptep)
195466dc 786{
d8d89827 787 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
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JF
788 pte_update(mm, addr, ptep);
789}
790
2ac13462 791#define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
61c77326 792
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793#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
794
795#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
796extern int pmdp_set_access_flags(struct vm_area_struct *vma,
797 unsigned long address, pmd_t *pmdp,
798 pmd_t entry, int dirty);
799
800#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
801extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
802 unsigned long addr, pmd_t *pmdp);
803
804#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
805extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
806 unsigned long address, pmd_t *pmdp);
807
808
809#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
810extern void pmdp_splitting_flush(struct vm_area_struct *vma,
811 unsigned long addr, pmd_t *pmdp);
812
813#define __HAVE_ARCH_PMD_WRITE
814static inline int pmd_write(pmd_t pmd)
815{
816 return pmd_flags(pmd) & _PAGE_RW;
817}
818
819#define __HAVE_ARCH_PMDP_GET_AND_CLEAR
820static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, unsigned long addr,
821 pmd_t *pmdp)
822{
823 pmd_t pmd = native_pmdp_get_and_clear(pmdp);
824 pmd_update(mm, addr, pmdp);
825 return pmd;
826}
827
828#define __HAVE_ARCH_PMDP_SET_WRPROTECT
829static inline void pmdp_set_wrprotect(struct mm_struct *mm,
830 unsigned long addr, pmd_t *pmdp)
831{
832 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
833 pmd_update(mm, addr, pmdp);
834}
835
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JF
836/*
837 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
838 *
839 * dst - pointer to pgd range anwhere on a pgd page
840 * src - ""
841 * count - the number of pgds to copy.
842 *
843 * dst and src can be on the same page, but the range must not overlap,
844 * and must not cross a page boundary.
845 */
846static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
847{
848 memcpy(dst, src, count * sizeof(pgd_t));
849}
850
4cbeb51b
DH
851#define PTE_SHIFT ilog2(PTRS_PER_PTE)
852static inline int page_level_shift(enum pg_level level)
853{
854 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
855}
856static inline unsigned long page_level_size(enum pg_level level)
857{
858 return 1UL << page_level_shift(level);
859}
860static inline unsigned long page_level_mask(enum pg_level level)
861{
862 return ~(page_level_size(level) - 1);
863}
85958b46 864
602e0186
KS
865/*
866 * The x86 doesn't have any external MMU info: the kernel page
867 * tables contain all the necessary information.
868 */
869static inline void update_mmu_cache(struct vm_area_struct *vma,
870 unsigned long addr, pte_t *ptep)
871{
872}
873static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
874 unsigned long addr, pmd_t *pmd)
875{
876}
85958b46 877
2bf01f9f 878#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
fa0f281c
CG
879static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
880{
c46a7c81 881 VM_BUG_ON(pte_present_nonuma(pte));
fa0f281c
CG
882 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
883}
884
885static inline int pte_swp_soft_dirty(pte_t pte)
886{
c46a7c81 887 VM_BUG_ON(pte_present_nonuma(pte));
fa0f281c
CG
888 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
889}
890
891static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
892{
c46a7c81 893 VM_BUG_ON(pte_present_nonuma(pte));
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CG
894 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
895}
2bf01f9f 896#endif
fa0f281c 897
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898#include <asm-generic/pgtable.h>
899#endif /* __ASSEMBLY__ */
900
1965aae3 901#endif /* _ASM_X86_PGTABLE_H */