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1965aae3
PA
1#ifndef _ASM_X86_PGTABLE_32_H
2#define _ASM_X86_PGTABLE_32_H
1da177e4 3
f402a65f 4#include <asm/pgtable_32_types.h>
1da177e4
LT
5
6/*
7 * The Linux memory management assumes a three-level page table setup. On
8 * the i386, we use that, but "fold" the mid level into the top-level page
9 * table, so that we physically have the same two-level page table as the
10 * i386 mmu expects.
11 *
12 * This file contains the functions and defines necessary to modify and use
13 * the i386 page table tree.
14 */
15#ifndef __ASSEMBLY__
16#include <asm/processor.h>
1da177e4 17#include <linux/threads.h>
da181a8b 18#include <asm/paravirt.h>
1da177e4 19
1977f032 20#include <linux/bitops.h>
1da177e4
LT
21#include <linux/list.h>
22#include <linux/spinlock.h>
23
8c65b4a6
TS
24struct mm_struct;
25struct vm_area_struct;
26
1da177e4 27extern pgd_t swapper_pg_dir[1024];
b40827fa 28extern pgd_t initial_page_table[1024];
1e620f9b 29extern pmd_t initial_pg_pmd[];
1da177e4 30
985a34bd
TG
31static inline void pgtable_cache_init(void) { }
32static inline void check_pgt_cache(void) { }
1da177e4
LT
33void paging_init(void);
34
1da177e4
LT
35/*
36 * Define this if things work differently on an i386 and an i486:
37 * it will (on an i486) warn about kernel memory accesses that are
e49332bd 38 * done without a 'access_ok(VERIFY_WRITE,..)'
1da177e4 39 */
e49332bd 40#undef TEST_ACCESS_OK
1da177e4 41
1da177e4
LT
42#ifdef CONFIG_X86_PAE
43# include <asm/pgtable-3level.h>
44#else
45# include <asm/pgtable-2level.h>
46#endif
47
1da177e4 48#if defined(CONFIG_HIGHPTE)
cf840147 49#define pte_offset_map(dir, address) \
ece0e2b6 50 ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \
cf840147 51 pte_index((address)))
ece0e2b6 52#define pte_unmap(pte) kunmap_atomic((pte))
1da177e4 53#else
cf840147
JP
54#define pte_offset_map(dir, address) \
55 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index((address)))
1da177e4 56#define pte_unmap(pte) do { } while (0)
1da177e4
LT
57#endif
58
23002d88 59/* Clear a kernel PTE and flush it from the TLB */
cf840147
JP
60#define kpte_clear_flush(ptep, vaddr) \
61do { \
62 pte_clear(&init_mm, (vaddr), (ptep)); \
63 __flush_tlb_one((vaddr)); \
23002d88
ZA
64} while (0)
65
1da177e4
LT
66#endif /* !__ASSEMBLY__ */
67
4757d7d8
TG
68/*
69 * kern_addr_valid() is (1) for FLATMEM and (0) for
70 * SPARSEMEM and DISCONTIGMEM
71 */
05b79bdc 72#ifdef CONFIG_FLATMEM
1da177e4 73#define kern_addr_valid(addr) (1)
4757d7d8
TG
74#else
75#define kern_addr_valid(kaddr) (0)
76#endif
1da177e4 77
1e620f9b
BO
78/*
79 * This is how much memory in addition to the memory covered up to
80 * and including _end we need mapped initially.
81 * We need:
82 * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
83 * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
84 *
85 * Modulo rounding, each megabyte assigned here requires a kilobyte of
86 * memory, which is currently unreclaimed.
87 *
88 * This should be a multiple of a page.
89 *
90 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
91 * and small than max_low_pfn, otherwise will waste some page table entries
92 */
93#if PTRS_PER_PMD > 1
94#define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
95#else
96#define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
97#endif
98
99/*
100 * Number of possible pages in the lowmem region.
101 *
102 * We shift 2 by 31 instead of 1 by 32 to the left in order to avoid a
103 * gas warning about overflowing shift count when gas has been compiled
104 * with only a host target support using a 32-bit type for internal
105 * representation.
106 */
107#define LOWMEM_PAGES ((((2<<31) - __PAGE_OFFSET) >> PAGE_SHIFT))
108
1965aae3 109#endif /* _ASM_X86_PGTABLE_32_H */