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1/*
2 * platform_sst_audio.h: sst audio platform data header file
3 *
4 * Copyright (C) 2012-14 Intel Corporation
5 * Author: Jeeja KP <jeeja.kp@intel.com>
6 * Omair Mohammed Abdullah <omair.m.abdullah@intel.com>
7 * Vinod Koul ,vinod.koul@intel.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; version 2
12 * of the License.
13 */
14#ifndef _PLATFORM_SST_AUDIO_H_
15#define _PLATFORM_SST_AUDIO_H_
16
17#include <linux/sfi.h>
18
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19#define MAX_NUM_STREAMS_MRFLD 25
20#define MAX_NUM_STREAMS MAX_NUM_STREAMS_MRFLD
21
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22enum sst_audio_task_id_mrfld {
23 SST_TASK_ID_NONE = 0,
24 SST_TASK_ID_SBA = 1,
25 SST_TASK_ID_MEDIA = 3,
26 SST_TASK_ID_MAX = SST_TASK_ID_MEDIA,
27};
28
29/* Device IDs for Merrifield are Pipe IDs,
30 * ref: DSP spec v0.75 */
31enum sst_audio_device_id_mrfld {
32 /* Output pipeline IDs */
33 PIPE_ID_OUT_START = 0x0,
34 PIPE_CODEC_OUT0 = 0x2,
35 PIPE_CODEC_OUT1 = 0x3,
36 PIPE_SPROT_LOOP_OUT = 0x4,
37 PIPE_MEDIA_LOOP1_OUT = 0x5,
38 PIPE_MEDIA_LOOP2_OUT = 0x6,
39 PIPE_VOIP_OUT = 0xC,
40 PIPE_PCM0_OUT = 0xD,
41 PIPE_PCM1_OUT = 0xE,
42 PIPE_PCM2_OUT = 0xF,
43 PIPE_MEDIA0_OUT = 0x12,
44 PIPE_MEDIA1_OUT = 0x13,
45/* Input Pipeline IDs */
46 PIPE_ID_IN_START = 0x80,
47 PIPE_CODEC_IN0 = 0x82,
48 PIPE_CODEC_IN1 = 0x83,
49 PIPE_SPROT_LOOP_IN = 0x84,
50 PIPE_MEDIA_LOOP1_IN = 0x85,
51 PIPE_MEDIA_LOOP2_IN = 0x86,
52 PIPE_VOIP_IN = 0x8C,
53 PIPE_PCM0_IN = 0x8D,
54 PIPE_PCM1_IN = 0x8E,
55 PIPE_MEDIA0_IN = 0x8F,
56 PIPE_MEDIA1_IN = 0x90,
57 PIPE_MEDIA2_IN = 0x91,
8788f839 58 PIPE_MEDIA3_IN = 0x9C,
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59 PIPE_RSVD = 0xFF,
60};
61
62/* The stream map for each platform consists of an array of the below
63 * stream map structure.
64 */
65struct sst_dev_stream_map {
66 u8 dev_num; /* device id */
67 u8 subdev_num; /* substream */
68 u8 direction;
69 u8 device_id; /* fw id */
70 u8 task_id; /* fw task */
71 u8 status;
72};
73
74struct sst_platform_data {
75 /* Intel software platform id*/
76 struct sst_dev_stream_map *pdev_strm_map;
77 unsigned int strm_map_size;
78};
79
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80struct sst_info {
81 u32 iram_start;
82 u32 iram_end;
83 bool iram_use;
84 u32 dram_start;
85 u32 dram_end;
86 bool dram_use;
87 u32 imr_start;
88 u32 imr_end;
89 bool imr_use;
90 u32 mailbox_start;
91 bool use_elf;
92 bool lpe_viewpt_rqd;
93 unsigned int max_streams;
94 u32 dma_max_len;
95 u8 num_probes;
96};
97
98struct sst_lib_dnld_info {
99 unsigned int mod_base;
100 unsigned int mod_end;
101 unsigned int mod_table_offset;
102 unsigned int mod_table_size;
103 bool mod_ddr_dnld;
104};
105
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106struct sst_res_info {
107 unsigned int shim_offset;
108 unsigned int shim_size;
109 unsigned int shim_phy_addr;
110 unsigned int ssp0_offset;
111 unsigned int ssp0_size;
112 unsigned int dma0_offset;
113 unsigned int dma0_size;
114 unsigned int dma1_offset;
115 unsigned int dma1_size;
116 unsigned int iram_offset;
117 unsigned int iram_size;
118 unsigned int dram_offset;
119 unsigned int dram_size;
120 unsigned int mbox_offset;
121 unsigned int mbox_size;
122 unsigned int acpi_lpe_res_index;
123 unsigned int acpi_ddr_index;
124 unsigned int acpi_ipc_irq_index;
125};
126
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127struct sst_ipc_info {
128 int ipc_offset;
129 unsigned int mbox_recv_off;
130};
131
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132struct sst_platform_info {
133 const struct sst_info *probe_data;
134 const struct sst_ipc_info *ipc_info;
9a80e8f5 135 const struct sst_res_info *res_info;
163d2089 136 const struct sst_lib_dnld_info *lib_info;
9a80e8f5 137 const char *platform;
163d2089 138};
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139int add_sst_platform_device(void);
140#endif
141