[mirror_ubuntu-artful-kernel.git] / arch / x86 / include / asm / processor-flags.h

#ifndef _ASM_X86_PROCESSOR_FLAGS_H
#define _ASM_X86_PROCESSOR_FLAGS_H

#include <uapi/asm/processor-flags.h>

#ifdef CONFIG_VM86
#define X86_VM_MASK	X86_EFLAGS_VM
#else
#define X86_VM_MASK	0 /* No VM86 support */
#endif

/*
 * CR3's layout varies depending on several things.
 *
 * If CR4.PCIDE is set (64-bit only), then CR3[11:0] is the address space ID.
 * If PAE is enabled, then CR3[11:5] is part of the PDPT address
 * (i.e. it's 32-byte aligned, not page-aligned) and CR3[4:0] is ignored.
 * Otherwise (non-PAE, non-PCID), CR3[3] is PWT, CR3[4] is PCD, and
 * CR3[2:0] and CR3[11:5] are ignored.
 *
 * In all cases, Linux puts zeros in the low ignored bits and in PWT and PCD.
 *
 * CR3[63] is always read as zero.  If CR4.PCIDE is set, then CR3[63] may be
 * written as 1 to prevent the write to CR3 from flushing the TLB.
 *
 * On systems with SME, one bit (in a variable position!) is stolen to indicate
 * that the top-level paging structure is encrypted.
 *
 * All of the remaining bits indicate the physical address of the top-level
 * paging structure.
 *
 * CR3_ADDR_MASK is the mask used by read_cr3_pa().
 */
#ifdef CONFIG_X86_64
/* Mask off the address space ID bits. */
#define CR3_ADDR_MASK 0x7FFFFFFFFFFFF000ull
#define CR3_PCID_MASK 0xFFFull
#else
/*
 * CR3_ADDR_MASK needs at least bits 31:5 set on PAE systems, and we save
 * a tiny bit of code size by setting all the bits.
 */
#define CR3_ADDR_MASK 0xFFFFFFFFull
#define CR3_PCID_MASK 0ull
#endif

#endif /* _ASM_X86_PROCESSOR_FLAGS_H */
Commit	Line	Data
1965aae3 PA	1	#ifndef _ASM_X86_PROCESSOR_FLAGS_H
1965aae3 PA	2	#define _ASM_X86_PROCESSOR_FLAGS_H
b4531e86	3
af170c50	4	#include <uapi/asm/processor-flags.h>
b4531e86	5
6330a30a VN	6	#ifdef CONFIG_VM86
	7	#define X86_VM_MASK X86_EFLAGS_VM
	8	#else
	9	#define X86_VM_MASK 0 /* No VM86 support */
	10	#endif
6c690ee1 AL	11
	12	/*
	13	* CR3's layout varies depending on several things.
	14	*
	15	* If CR4.PCIDE is set (64-bit only), then CR3[11:0] is the address space ID.
	16	* If PAE is enabled, then CR3[11:5] is part of the PDPT address
	17	* (i.e. it's 32-byte aligned, not page-aligned) and CR3[4:0] is ignored.
	18	* Otherwise (non-PAE, non-PCID), CR3[3] is PWT, CR3[4] is PCD, and
	19	* CR3[2:0] and CR3[11:5] are ignored.
	20	*
	21	* In all cases, Linux puts zeros in the low ignored bits and in PWT and PCD.
	22	*
	23	* CR3[63] is always read as zero. If CR4.PCIDE is set, then CR3[63] may be
	24	* written as 1 to prevent the write to CR3 from flushing the TLB.
	25	*
	26	* On systems with SME, one bit (in a variable position!) is stolen to indicate
	27	* that the top-level paging structure is encrypted.
	28	*
	29	* All of the remaining bits indicate the physical address of the top-level
	30	* paging structure.
	31	*
	32	* CR3_ADDR_MASK is the mask used by read_cr3_pa().
	33	*/
	34	#ifdef CONFIG_X86_64
	35	/* Mask off the address space ID bits. */
	36	#define CR3_ADDR_MASK 0x7FFFFFFFFFFFF000ull
	37	#define CR3_PCID_MASK 0xFFFull
	38	#else
	39	/*
	40	* CR3_ADDR_MASK needs at least bits 31:5 set on PAE systems, and we save
	41	* a tiny bit of code size by setting all the bits.
	42	*/
	43	#define CR3_ADDR_MASK 0xFFFFFFFFull
	44	#define CR3_PCID_MASK 0ull
	45	#endif
	46
1965aae3	47	#endif /* _ASM_X86_PROCESSOR_FLAGS_H */