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Commit | Line | Data |
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1965aae3 PA |
1 | #ifndef _ASM_X86_SMP_H |
2 | #define _ASM_X86_SMP_H | |
c27cfeff | 3 | #ifndef __ASSEMBLY__ |
53ebef49 | 4 | #include <linux/cpumask.h> |
7e1efc0c | 5 | #include <asm/percpu.h> |
53ebef49 | 6 | |
b23dab08 GC |
7 | /* |
8 | * We need the APIC definitions automatically as part of 'smp.h' | |
9 | */ | |
10 | #ifdef CONFIG_X86_LOCAL_APIC | |
11 | # include <asm/mpspec.h> | |
12 | # include <asm/apic.h> | |
13 | # ifdef CONFIG_X86_IO_APIC | |
14 | # include <asm/io_apic.h> | |
15 | # endif | |
16 | #endif | |
b23dab08 | 17 | #include <asm/thread_info.h> |
fb8fd077 | 18 | #include <asm/cpumask.h> |
b23dab08 | 19 | |
53ebef49 GC |
20 | extern int smp_num_siblings; |
21 | extern unsigned int num_processors; | |
c27cfeff | 22 | |
0816b0f0 VZ |
23 | DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map); |
24 | DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_map); | |
b3d7336d | 25 | /* cpus sharing the last level cache: */ |
0816b0f0 VZ |
26 | DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map); |
27 | DECLARE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id); | |
28 | DECLARE_PER_CPU_READ_MOSTLY(int, cpu_number); | |
23ca4bba | 29 | |
b3d7336d YL |
30 | static inline struct cpumask *cpu_llc_shared_mask(int cpu) |
31 | { | |
32 | return per_cpu(cpu_llc_shared_map, cpu); | |
33 | } | |
34 | ||
0816b0f0 | 35 | DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_cpu_to_apicid); |
3e9e57fa | 36 | DECLARE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid); |
0816b0f0 | 37 | DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid); |
4e62445b | 38 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) |
0816b0f0 | 39 | DECLARE_EARLY_PER_CPU_READ_MOSTLY(int, x86_cpu_to_logical_apicid); |
4c321ff8 | 40 | #endif |
7e1efc0c | 41 | |
8239c25f TG |
42 | struct task_struct; |
43 | ||
16694024 GC |
44 | struct smp_ops { |
45 | void (*smp_prepare_boot_cpu)(void); | |
46 | void (*smp_prepare_cpus)(unsigned max_cpus); | |
16694024 GC |
47 | void (*smp_cpus_done)(unsigned max_cpus); |
48 | ||
76fac077 | 49 | void (*stop_other_cpus)(int wait); |
0ee59413 | 50 | void (*crash_stop_other_cpus)(void); |
16694024 | 51 | void (*smp_send_reschedule)(int cpu); |
3b16cf87 | 52 | |
5cdaf183 | 53 | int (*cpu_up)(unsigned cpu, struct task_struct *tidle); |
93be71b6 AN |
54 | int (*cpu_disable)(void); |
55 | void (*cpu_die)(unsigned int cpu); | |
56 | void (*play_dead)(void); | |
57 | ||
bcda016e | 58 | void (*send_call_func_ipi)(const struct cpumask *mask); |
3b16cf87 | 59 | void (*send_call_func_single_ipi)(int cpu); |
16694024 GC |
60 | }; |
61 | ||
14522076 GC |
62 | /* Globals due to paravirt */ |
63 | extern void set_cpu_sibling_map(int cpu); | |
64 | ||
c76cb368 GC |
65 | #ifdef CONFIG_SMP |
66 | extern struct smp_ops smp_ops; | |
8678969e | 67 | |
377d6984 GC |
68 | static inline void smp_send_stop(void) |
69 | { | |
76fac077 AK |
70 | smp_ops.stop_other_cpus(0); |
71 | } | |
72 | ||
73 | static inline void stop_other_cpus(void) | |
74 | { | |
75 | smp_ops.stop_other_cpus(1); | |
377d6984 GC |
76 | } |
77 | ||
1e3fac83 GC |
78 | static inline void smp_prepare_boot_cpu(void) |
79 | { | |
80 | smp_ops.smp_prepare_boot_cpu(); | |
81 | } | |
82 | ||
7557da67 GC |
83 | static inline void smp_prepare_cpus(unsigned int max_cpus) |
84 | { | |
85 | smp_ops.smp_prepare_cpus(max_cpus); | |
86 | } | |
87 | ||
c5597649 GC |
88 | static inline void smp_cpus_done(unsigned int max_cpus) |
89 | { | |
90 | smp_ops.smp_cpus_done(max_cpus); | |
91 | } | |
92 | ||
8239c25f | 93 | static inline int __cpu_up(unsigned int cpu, struct task_struct *tidle) |
71d19549 | 94 | { |
5cdaf183 | 95 | return smp_ops.cpu_up(cpu, tidle); |
71d19549 GC |
96 | } |
97 | ||
93be71b6 AN |
98 | static inline int __cpu_disable(void) |
99 | { | |
100 | return smp_ops.cpu_disable(); | |
101 | } | |
102 | ||
103 | static inline void __cpu_die(unsigned int cpu) | |
104 | { | |
105 | smp_ops.cpu_die(cpu); | |
106 | } | |
107 | ||
108 | static inline void play_dead(void) | |
109 | { | |
110 | smp_ops.play_dead(); | |
111 | } | |
112 | ||
8678969e GC |
113 | static inline void smp_send_reschedule(int cpu) |
114 | { | |
115 | smp_ops.smp_send_reschedule(cpu); | |
116 | } | |
64b1a21e | 117 | |
3b16cf87 JA |
118 | static inline void arch_send_call_function_single_ipi(int cpu) |
119 | { | |
120 | smp_ops.send_call_func_single_ipi(cpu); | |
121 | } | |
122 | ||
b643deca | 123 | static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
64b1a21e | 124 | { |
b643deca | 125 | smp_ops.send_call_func_ipi(mask); |
64b1a21e | 126 | } |
71d19549 | 127 | |
8227dce7 | 128 | void cpu_disable_common(void); |
1e3fac83 | 129 | void native_smp_prepare_boot_cpu(void); |
7557da67 | 130 | void native_smp_prepare_cpus(unsigned int max_cpus); |
c5597649 | 131 | void native_smp_cpus_done(unsigned int max_cpus); |
3f85483b | 132 | void common_cpu_up(unsigned int cpunum, struct task_struct *tidle); |
5cdaf183 | 133 | int native_cpu_up(unsigned int cpunum, struct task_struct *tidle); |
93be71b6 | 134 | int native_cpu_disable(void); |
2a442c9c | 135 | int common_cpu_die(unsigned int cpu); |
93be71b6 | 136 | void native_cpu_die(unsigned int cpu); |
406f992e | 137 | void hlt_play_dead(void); |
93be71b6 | 138 | void native_play_dead(void); |
a21f5d88 | 139 | void play_dead_common(void); |
a7b480e7 BP |
140 | void wbinvd_on_cpu(int cpu); |
141 | int wbinvd_on_all_cpus(void); | |
93be71b6 | 142 | |
bcda016e | 143 | void native_send_call_func_ipi(const struct cpumask *mask); |
3b16cf87 | 144 | void native_send_call_func_single_ipi(int cpu); |
7eb43a6d | 145 | void x86_idle_thread_init(unsigned int cpu, struct task_struct *idle); |
93b016f8 | 146 | |
30106c17 | 147 | void smp_store_boot_cpu_info(void); |
1d89a7f0 | 148 | void smp_store_cpu_info(int id); |
c70dcb74 | 149 | #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) |
3e9e57fa | 150 | #define cpu_acpi_id(cpu) per_cpu(x86_cpu_to_acpiid, cpu) |
a9c057c1 | 151 | |
0f08c3b2 DL |
152 | /* |
153 | * This function is needed by all SMP systems. It must _always_ be valid | |
154 | * from the initial startup. We map APIC_BASE very early in page_setup(), | |
155 | * so this is correct in the x86 case. | |
156 | */ | |
157 | #define raw_smp_processor_id() (this_cpu_read(cpu_number)) | |
158 | ||
159 | #ifdef CONFIG_X86_32 | |
160 | extern int safe_smp_processor_id(void); | |
161 | #else | |
162 | # define safe_smp_processor_id() smp_processor_id() | |
163 | #endif | |
164 | ||
a7b480e7 BP |
165 | #else /* !CONFIG_SMP */ |
166 | #define wbinvd_on_cpu(cpu) wbinvd() | |
167 | static inline int wbinvd_on_all_cpus(void) | |
168 | { | |
169 | wbinvd(); | |
170 | return 0; | |
171 | } | |
ee6825c8 | 172 | #define smp_num_siblings 1 |
14adf855 | 173 | #endif /* CONFIG_SMP */ |
a9c057c1 | 174 | |
148f9bb8 | 175 | extern unsigned disabled_cpus; |
2fe60147 | 176 | |
1b000843 GC |
177 | #ifdef CONFIG_X86_LOCAL_APIC |
178 | ||
1b374e4d | 179 | #ifndef CONFIG_X86_64 |
1b000843 GC |
180 | static inline int logical_smp_processor_id(void) |
181 | { | |
182 | /* we don't want to mark this access volatile - bad code generation */ | |
4797f6b0 | 183 | return GET_APIC_LOGICAL_ID(apic_read(APIC_LDR)); |
1b000843 GC |
184 | } |
185 | ||
ac23d4ee JS |
186 | #endif |
187 | ||
1b000843 | 188 | extern int hard_smp_processor_id(void); |
1b000843 GC |
189 | |
190 | #else /* CONFIG_X86_LOCAL_APIC */ | |
7b6e1062 | 191 | #define hard_smp_processor_id() 0 |
1b000843 GC |
192 | #endif /* CONFIG_X86_LOCAL_APIC */ |
193 | ||
99e8b9ca DZ |
194 | #ifdef CONFIG_DEBUG_NMI_SELFTEST |
195 | extern void nmi_selftest(void); | |
196 | #else | |
197 | #define nmi_selftest() do { } while (0) | |
198 | #endif | |
199 | ||
c27cfeff | 200 | #endif /* __ASSEMBLY__ */ |
1965aae3 | 201 | #endif /* _ASM_X86_SMP_H */ |