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x86/speculation: Rework speculative_store_bypass_update()
[mirror_ubuntu-artful-kernel.git] / arch / x86 / include / asm / spec-ctrl.h
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1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_SPECCTRL_H_
3#define _ASM_X86_SPECCTRL_H_
4
0b35aca2 5#include <linux/thread_info.h>
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6#include <asm/nospec-branch.h>
7
8/*
9 * On VMENTER we must preserve whatever view of the SPEC_CTRL MSR
10 * the guest has, while on VMEXIT we restore the host view. This
11 * would be easier if SPEC_CTRL were architecturally maskable or
12 * shadowable for guests but this is not (currently) the case.
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13 * Takes the guest view of SPEC_CTRL MSR as a parameter and also
14 * the guest's version of VIRT_SPEC_CTRL, if emulated.
20b509bf 15 */
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16extern void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl,
17 u64 guest_virt_spec_ctrl);
18extern void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl,
19 u64 guest_virt_spec_ctrl);
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20
21/*
22 * On VMEXIT we must ensure that no RSB predictions learned in the guest
23 * can be followed in the host, by overwriting the RSB completely. Both
24 * retpoline and IBRS mitigations for Spectre v2 need this; only on future
25 * CPUs with IBRS_ATT *might* it be avoided.
26 */
27static inline void vmexit_fill_RSB(void)
28{
29#ifdef CONFIG_RETPOLINE
30 alternative_input("",
31 "call __fill_rsb",
32 X86_FEATURE_RETPOLINE,
33 ASM_NO_INPUT_CLOBBER(_ASM_BX, "memory"));
34#endif
35}
36
37/* AMD specific Speculative Store Bypass MSR data */
38extern u64 x86_amd_ls_cfg_base;
0c0f6741 39extern u64 x86_amd_ls_cfg_ssbd_mask;
20b509bf 40
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41/* The Intel SPEC CTRL MSR base value cache */
42extern u64 x86_spec_ctrl_base;
43
0c0f6741 44static inline u64 ssbd_tif_to_spec_ctrl(u64 tifn)
0b35aca2 45{
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46 BUILD_BUG_ON(TIF_SSBD < SPEC_CTRL_SSBD_SHIFT);
47 return (tifn & _TIF_SSBD) >> (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT);
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48}
49
0c0f6741 50static inline u64 ssbd_tif_to_amd_ls_cfg(u64 tifn)
0b35aca2 51{
0c0f6741 52 return (tifn & _TIF_SSBD) ? x86_amd_ls_cfg_ssbd_mask : 0ULL;
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53}
54
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55#ifdef CONFIG_SMP
56extern void speculative_store_bypass_ht_init(void);
57#else
58static inline void speculative_store_bypass_ht_init(void) { }
59#endif
60
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61extern void speculative_store_bypass_update(unsigned long tif);
62
63static inline void speculative_store_bypass_update_current(void)
64{
65 speculative_store_bypass_update(current_thread_info()->flags);
66}
0b35aca2 67
20b509bf 68#endif