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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1965aae3 PA |
2 | #ifndef _ASM_X86_SPINLOCK_H |
3 | #define _ASM_X86_SPINLOCK_H | |
2fed0c50 | 4 | |
96f853ea | 5 | #include <linux/jump_label.h> |
60063497 | 6 | #include <linux/atomic.h> |
1075cf7a TG |
7 | #include <asm/page.h> |
8 | #include <asm/processor.h> | |
314cdbef | 9 | #include <linux/compiler.h> |
74d4affd | 10 | #include <asm/paravirt.h> |
96f853ea JF |
11 | #include <asm/bitops.h> |
12 | ||
1075cf7a TG |
13 | /* |
14 | * Your basic SMP spinlocks, allowing only a single CPU anywhere | |
15 | * | |
16 | * Simple spin lock operations. There are two variants, one clears IRQ's | |
17 | * on the local processor, one does not. | |
18 | * | |
83be4ffa | 19 | * These are fair FIFO ticket locks, which support up to 2^16 CPUs. |
1075cf7a TG |
20 | * |
21 | * (the type definitions are in asm/spinlock_types.h) | |
22 | */ | |
23 | ||
545ac138 JF |
24 | /* How long a lock should spin before we consider blocking */ |
25 | #define SPIN_THRESHOLD (1 << 15) | |
26 | ||
d73a3397 | 27 | #include <asm/qspinlock.h> |
1075cf7a TG |
28 | |
29 | /* | |
30 | * Read-write spinlocks, allowing multiple readers | |
31 | * but only one writer. | |
32 | * | |
33 | * NOTE! it is quite common to have readers in interrupts | |
34 | * but no interrupt writers. For those circumstances we | |
35 | * can "mix" irq-safe locks - any writer needs to get a | |
36 | * irq-safe write-lock, but readers can get non-irqsafe | |
37 | * read-locks. | |
38 | * | |
2ff810a7 WL |
39 | * On x86, we implement read-write locks using the generic qrwlock with |
40 | * x86 specific optimization. | |
1075cf7a TG |
41 | */ |
42 | ||
bd01ec1a | 43 | #include <asm/qrwlock.h> |
1075cf7a | 44 | |
1965aae3 | 45 | #endif /* _ASM_X86_SPINLOCK_H */ |