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1965aae3 PA |
1 | #ifndef _ASM_X86_TLBFLUSH_H |
2 | #define _ASM_X86_TLBFLUSH_H | |
d291cf83 TG |
3 | |
4 | #include <linux/mm.h> | |
5 | #include <linux/sched.h> | |
6 | ||
7 | #include <asm/processor.h> | |
f05e798a | 8 | #include <asm/special_insns.h> |
d291cf83 TG |
9 | |
10 | #ifdef CONFIG_PARAVIRT | |
11 | #include <asm/paravirt.h> | |
12 | #else | |
13 | #define __flush_tlb() __native_flush_tlb() | |
14 | #define __flush_tlb_global() __native_flush_tlb_global() | |
15 | #define __flush_tlb_single(addr) __native_flush_tlb_single(addr) | |
16 | #endif | |
17 | ||
18 | static inline void __native_flush_tlb(void) | |
19 | { | |
d7285c6b | 20 | native_write_cr3(native_read_cr3()); |
d291cf83 TG |
21 | } |
22 | ||
086fc8f8 FY |
23 | static inline void __native_flush_tlb_global_irq_disabled(void) |
24 | { | |
25 | unsigned long cr4; | |
26 | ||
27 | cr4 = native_read_cr4(); | |
28 | /* clear PGE */ | |
29 | native_write_cr4(cr4 & ~X86_CR4_PGE); | |
30 | /* write old PGE again and flush TLBs */ | |
31 | native_write_cr4(cr4); | |
32 | } | |
33 | ||
d291cf83 TG |
34 | static inline void __native_flush_tlb_global(void) |
35 | { | |
b1979a5f | 36 | unsigned long flags; |
d291cf83 | 37 | |
b1979a5f IM |
38 | /* |
39 | * Read-modify-write to CR4 - protect it from preemption and | |
40 | * from interrupts. (Use the raw variant because this code can | |
41 | * be called from deep inside debugging code.) | |
42 | */ | |
43 | raw_local_irq_save(flags); | |
44 | ||
086fc8f8 | 45 | __native_flush_tlb_global_irq_disabled(); |
b1979a5f IM |
46 | |
47 | raw_local_irq_restore(flags); | |
d291cf83 TG |
48 | } |
49 | ||
50 | static inline void __native_flush_tlb_single(unsigned long addr) | |
51 | { | |
94cf8de0 | 52 | asm volatile("invlpg (%0)" ::"r" (addr) : "memory"); |
d291cf83 TG |
53 | } |
54 | ||
55 | static inline void __flush_tlb_all(void) | |
56 | { | |
57 | if (cpu_has_pge) | |
58 | __flush_tlb_global(); | |
59 | else | |
60 | __flush_tlb(); | |
61 | } | |
62 | ||
63 | static inline void __flush_tlb_one(unsigned long addr) | |
64 | { | |
6df46865 | 65 | count_vm_event(NR_TLB_LOCAL_FLUSH_ONE); |
e8747f10 | 66 | __flush_tlb_single(addr); |
d291cf83 TG |
67 | } |
68 | ||
3e7f3db0 | 69 | #define TLB_FLUSH_ALL -1UL |
d291cf83 TG |
70 | |
71 | /* | |
72 | * TLB flushing: | |
73 | * | |
74 | * - flush_tlb() flushes the current mm struct TLBs | |
75 | * - flush_tlb_all() flushes all processes TLBs | |
76 | * - flush_tlb_mm(mm) flushes the specified mm context TLB's | |
77 | * - flush_tlb_page(vma, vmaddr) flushes one page | |
78 | * - flush_tlb_range(vma, start, end) flushes a range of pages | |
79 | * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages | |
e7b52ffd | 80 | * - flush_tlb_others(cpumask, mm, start, end) flushes TLBs on other cpus |
d291cf83 TG |
81 | * |
82 | * ..but the i386 has somewhat limited tlb flushing capabilities, | |
83 | * and page-granular flushes are available only on i486 and up. | |
d291cf83 TG |
84 | */ |
85 | ||
86 | #ifndef CONFIG_SMP | |
87 | ||
6df46865 DH |
88 | /* "_up" is for UniProcessor. |
89 | * | |
90 | * This is a helper for other header functions. *Not* intended to be called | |
91 | * directly. All global TLB flushes need to either call this, or to bump the | |
92 | * vm statistics themselves. | |
93 | */ | |
94 | static inline void __flush_tlb_up(void) | |
95 | { | |
96 | count_vm_event(NR_TLB_LOCAL_FLUSH_ALL); | |
97 | __flush_tlb(); | |
98 | } | |
99 | ||
100 | static inline void flush_tlb_all(void) | |
101 | { | |
102 | count_vm_event(NR_TLB_LOCAL_FLUSH_ALL); | |
103 | __flush_tlb_all(); | |
104 | } | |
105 | ||
106 | static inline void flush_tlb(void) | |
107 | { | |
108 | __flush_tlb_up(); | |
109 | } | |
110 | ||
111 | static inline void local_flush_tlb(void) | |
112 | { | |
113 | __flush_tlb_up(); | |
114 | } | |
d291cf83 TG |
115 | |
116 | static inline void flush_tlb_mm(struct mm_struct *mm) | |
117 | { | |
118 | if (mm == current->active_mm) | |
6df46865 | 119 | __flush_tlb_up(); |
d291cf83 TG |
120 | } |
121 | ||
122 | static inline void flush_tlb_page(struct vm_area_struct *vma, | |
123 | unsigned long addr) | |
124 | { | |
125 | if (vma->vm_mm == current->active_mm) | |
126 | __flush_tlb_one(addr); | |
127 | } | |
128 | ||
129 | static inline void flush_tlb_range(struct vm_area_struct *vma, | |
130 | unsigned long start, unsigned long end) | |
131 | { | |
132 | if (vma->vm_mm == current->active_mm) | |
6df46865 | 133 | __flush_tlb_up(); |
d291cf83 TG |
134 | } |
135 | ||
7efa1c87 | 136 | static inline void flush_tlb_mm_range(struct mm_struct *mm, |
611ae8e3 AS |
137 | unsigned long start, unsigned long end, unsigned long vmflag) |
138 | { | |
7efa1c87 | 139 | if (mm == current->active_mm) |
6df46865 | 140 | __flush_tlb_up(); |
611ae8e3 AS |
141 | } |
142 | ||
4595f962 | 143 | static inline void native_flush_tlb_others(const struct cpumask *cpumask, |
d291cf83 | 144 | struct mm_struct *mm, |
e7b52ffd AS |
145 | unsigned long start, |
146 | unsigned long end) | |
d291cf83 TG |
147 | { |
148 | } | |
149 | ||
913da64b AN |
150 | static inline void reset_lazy_tlbstate(void) |
151 | { | |
152 | } | |
153 | ||
effee4b9 AS |
154 | static inline void flush_tlb_kernel_range(unsigned long start, |
155 | unsigned long end) | |
156 | { | |
157 | flush_tlb_all(); | |
158 | } | |
159 | ||
d291cf83 TG |
160 | #else /* SMP */ |
161 | ||
162 | #include <asm/smp.h> | |
163 | ||
164 | #define local_flush_tlb() __flush_tlb() | |
165 | ||
611ae8e3 AS |
166 | #define flush_tlb_mm(mm) flush_tlb_mm_range(mm, 0UL, TLB_FLUSH_ALL, 0UL) |
167 | ||
168 | #define flush_tlb_range(vma, start, end) \ | |
169 | flush_tlb_mm_range(vma->vm_mm, start, end, vma->vm_flags) | |
170 | ||
d291cf83 TG |
171 | extern void flush_tlb_all(void); |
172 | extern void flush_tlb_current_task(void); | |
d291cf83 | 173 | extern void flush_tlb_page(struct vm_area_struct *, unsigned long); |
611ae8e3 AS |
174 | extern void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start, |
175 | unsigned long end, unsigned long vmflag); | |
effee4b9 | 176 | extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); |
d291cf83 TG |
177 | |
178 | #define flush_tlb() flush_tlb_current_task() | |
179 | ||
4595f962 | 180 | void native_flush_tlb_others(const struct cpumask *cpumask, |
e7b52ffd AS |
181 | struct mm_struct *mm, |
182 | unsigned long start, unsigned long end); | |
d291cf83 TG |
183 | |
184 | #define TLBSTATE_OK 1 | |
185 | #define TLBSTATE_LAZY 2 | |
186 | ||
94cf8de0 | 187 | struct tlb_state { |
d291cf83 TG |
188 | struct mm_struct *active_mm; |
189 | int state; | |
d291cf83 | 190 | }; |
9b8de747 | 191 | DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate); |
913da64b | 192 | |
913da64b AN |
193 | static inline void reset_lazy_tlbstate(void) |
194 | { | |
c6ae41e7 AS |
195 | this_cpu_write(cpu_tlbstate.state, 0); |
196 | this_cpu_write(cpu_tlbstate.active_mm, &init_mm); | |
913da64b | 197 | } |
d291cf83 TG |
198 | |
199 | #endif /* SMP */ | |
200 | ||
201 | #ifndef CONFIG_PARAVIRT | |
e7b52ffd AS |
202 | #define flush_tlb_others(mask, mm, start, end) \ |
203 | native_flush_tlb_others(mask, mm, start, end) | |
96a388de | 204 | #endif |
d291cf83 | 205 | |
1965aae3 | 206 | #endif /* _ASM_X86_TLBFLUSH_H */ |