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b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
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2#ifndef _ASM_X86_PLATFORM_H
3#define _ASM_X86_PLATFORM_H
4
47a3d5da 5#include <asm/bootparam.h>
030cb6c0 6
52fdb568 7struct mpc_bus;
fd6c6661 8struct mpc_cpu;
72302142 9struct mpc_table;
64be4c1c 10struct cpuinfo_x86;
fd6c6661 11
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12/**
13 * struct x86_init_mpparse - platform specific mpparse ops
14 * @mpc_record: platform specific mpc record accounting
de934103 15 * @setup_ioapic_ids: platform specific ioapic id override
fd6c6661 16 * @mpc_apic_id: platform specific mpc apic id assignment
72302142 17 * @smp_read_mpc_oem: platform specific oem mpc table setup
52fdb568 18 * @mpc_oem_pci_bus: platform specific pci bus setup (default NULL)
90e1c696 19 * @mpc_oem_bus_info: platform specific mpc bus info
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20 * @find_smp_config: find the smp configuration
21 * @get_smp_config: get the smp configuration
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22 */
23struct x86_init_mpparse {
24 void (*mpc_record)(unsigned int mode);
de934103 25 void (*setup_ioapic_ids)(void);
fd6c6661 26 int (*mpc_apic_id)(struct mpc_cpu *m);
72302142 27 void (*smp_read_mpc_oem)(struct mpc_table *mpc);
52fdb568 28 void (*mpc_oem_pci_bus)(struct mpc_bus *m);
90e1c696 29 void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name);
b24c2a92 30 void (*find_smp_config)(void);
b3f1b617 31 void (*get_smp_config)(unsigned int early);
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32};
33
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34/**
35 * struct x86_init_resources - platform specific resource related ops
36 * @probe_roms: probe BIOS roms
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37 * @reserve_resources: reserve the standard resources for the
38 * platform
6b18ae3e 39 * @memory_setup: platform specific memory setup
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40 *
41 */
42struct x86_init_resources {
43 void (*probe_roms)(void);
8fee697d 44 void (*reserve_resources)(void);
6b18ae3e 45 char *(*memory_setup)(void);
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46};
47
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48/**
49 * struct x86_init_irqs - platform specific interrupt setup
50 * @pre_vector_init: init code to run before interrupt vectors
51 * are set up.
66bcaf0b 52 * @intr_init: interrupt init code
428cf902 53 * @trap_init: platform specific trap setup
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54 */
55struct x86_init_irqs {
56 void (*pre_vector_init)(void);
66bcaf0b 57 void (*intr_init)(void);
428cf902 58 void (*trap_init)(void);
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59};
60
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61/**
62 * struct x86_init_oem - oem platform specific customizing functions
22d3c0d6 63 * @arch_setup: platform specific architecture setup
6f30c1ac 64 * @banner: print a platform specific banner
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65 */
66struct x86_init_oem {
67 void (*arch_setup)(void);
6f30c1ac 68 void (*banner)(void);
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69};
70
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71/**
72 * struct x86_init_paging - platform specific paging functions
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73 * @pagetable_init: platform specific paging initialization call to setup
74 * the kernel pagetables and prepare accessors functions.
75 * Callback must call paging_init(). Called once after the
76 * direct mapping for phys memory is available.
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77 */
78struct x86_init_paging {
7737b215 79 void (*pagetable_init)(void);
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80};
81
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82/**
83 * struct x86_init_timers - platform specific timer setup
84 * @setup_perpcu_clockev: set up the per cpu clock event device for the
85 * boot cpu
845b3944 86 * @timer_init: initialize the platform timer (default PIT/HPET)
6b617e22 87 * @wallclock_init: init the wallclock device
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88 */
89struct x86_init_timers {
90 void (*setup_percpu_clockev)(void);
845b3944 91 void (*timer_init)(void);
6b617e22 92 void (*wallclock_init)(void);
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93};
94
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95/**
96 * struct x86_init_iommu - platform specific iommu setup
97 * @iommu_init: platform specific iommu setup
98 */
99struct x86_init_iommu {
100 int (*iommu_init)(void);
101};
102
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103/**
104 * struct x86_init_pci - platform specific pci init functions
105 * @arch_init: platform specific pci arch init call
106 * @init: platform specific pci subsystem init
ab3b3793 107 * @init_irq: platform specific pci irq init
9325a28c 108 * @fixup_irqs: platform specific pci irq fixup
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109 */
110struct x86_init_pci {
4fb6088a 111 int (*arch_init)(void);
b72d0db9 112 int (*init)(void);
ab3b3793 113 void (*init_irq)(void);
9325a28c 114 void (*fixup_irqs)(void);
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115};
116
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117/**
118 * struct x86_init_ops - functions for platform specific setup
119 *
120 */
121struct x86_init_ops {
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122 struct x86_init_resources resources;
123 struct x86_init_mpparse mpparse;
d9112f43 124 struct x86_init_irqs irqs;
42bbdb43 125 struct x86_init_oem oem;
030cb6c0 126 struct x86_init_paging paging;
736decac 127 struct x86_init_timers timers;
d07c1be0 128 struct x86_init_iommu iommu;
b72d0db9 129 struct x86_init_pci pci;
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130};
131
132/**
133 * struct x86_cpuinit_ops - platform specific cpu hotplug setups
134 * @setup_percpu_clockev: set up the per cpu clock event device
df156f90 135 * @early_percpu_clock_init: early init of the per cpu clock event device
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136 */
137struct x86_cpuinit_ops {
138 void (*setup_percpu_clockev)(void);
df156f90 139 void (*early_percpu_clock_init)(void);
64be4c1c 140 void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node);
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141};
142
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143struct timespec;
144
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145/**
146 * struct x86_legacy_devices - legacy x86 devices
147 *
148 * @pnpbios: this platform can have a PNPBIOS. If this is disabled the platform
149 * is known to never have a PNPBIOS.
150 *
151 * These are devices known to require LPC or ISA bus. The definition of legacy
152 * devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag
153 * ACPI_FADT_LEGACY_DEVICES. These devices consist of user visible devices on
154 * the LPC or ISA bus. User visible devices are devices that have end-user
155 * accessible connectors (for example, LPT parallel port). Legacy devices on
156 * the LPC bus consist for example of serial and parallel ports, PS/2 keyboard
157 * / mouse, and the floppy disk controller. A system that lacks all known
158 * legacy devices can assume all devices can be detected exclusively via
159 * standard device enumeration mechanisms including the ACPI namespace.
160 *
161 * A system which has does not have ACPI_FADT_LEGACY_DEVICES enabled must not
162 * have any of the legacy devices enumerated below present.
163 */
164struct x86_legacy_devices {
165 int pnpbios;
166};
167
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168/**
169 * enum x86_legacy_i8042_state - i8042 keyboard controller state
170 * @X86_LEGACY_I8042_PLATFORM_ABSENT: the controller is always absent on
171 * given platform/subarch.
172 * @X86_LEGACY_I8042_FIRMWARE_ABSENT: firmware reports that the controller
173 * is absent.
174 * @X86_LEGACY_i8042_EXPECTED_PRESENT: the controller is likely to be
175 * present, the i8042 driver should probe for controller existence.
176 */
177enum x86_legacy_i8042_state {
178 X86_LEGACY_I8042_PLATFORM_ABSENT,
179 X86_LEGACY_I8042_FIRMWARE_ABSENT,
180 X86_LEGACY_I8042_EXPECTED_PRESENT,
181};
182
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183/**
184 * struct x86_legacy_features - legacy x86 features
185 *
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186 * @i8042: indicated if we expect the device to have i8042 controller
187 * present.
8d152e7a 188 * @rtc: this device has a CMOS real-time clock present
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189 * @reserve_bios_regions: boot code will search for the EBDA address and the
190 * start of the 640k - 1M BIOS region. If false, the platform must
191 * ensure that its memory map correctly reserves sub-1MB regions as needed.
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192 * @devices: legacy x86 devices, refer to struct x86_legacy_devices
193 * documentation for further details.
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194 */
195struct x86_legacy_features {
93ffa9a4 196 enum x86_legacy_i8042_state i8042;
8d152e7a 197 int rtc;
edce2121 198 int reserve_bios_regions;
80dfd83d 199 struct x86_legacy_devices devices;
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200};
201
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202/**
203 * struct x86_platform_ops - platform specific runtime functions
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204 * @calibrate_cpu: calibrate CPU
205 * @calibrate_tsc: calibrate TSC, if different from CPU
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206 * @get_wallclock: get time from HW clock like RTC etc.
207 * @set_wallclock: set time back to HW clock
eb41c8be 208 * @is_untracked_pat_range exclude from PAT logic
78c06176 209 * @nmi_init enable NMI on cpus
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210 * @save_sched_clock_state: save state for sched_clock() on suspend
211 * @restore_sched_clock_state: restore state for sched_clock() on resume
22d3c0d6 212 * @apic_post_init: adjust apic if needed
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213 * @legacy: legacy features
214 * @set_legacy_features: override legacy features. Use of this callback
215 * is highly discouraged. You should only need
216 * this if your hardware platform requires further
22d3c0d6 217 * custom fine tuning far beyond what may be
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218 * possible in x86_early_init_platform_quirks() by
219 * only using the current x86_hardware_subarch
220 * semantics.
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221 */
222struct x86_platform_ops {
aa297292 223 unsigned long (*calibrate_cpu)(void);
2d826404 224 unsigned long (*calibrate_tsc)(void);
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225 void (*get_wallclock)(struct timespec *ts);
226 int (*set_wallclock)(const struct timespec *ts);
338bac52 227 void (*iommu_shutdown)(void);
eb41c8be 228 bool (*is_untracked_pat_range)(u64 start, u64 end);
78c06176 229 void (*nmi_init)(void);
064a59b6 230 unsigned char (*get_nmi_reason)(void);
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231 void (*save_sched_clock_state)(void);
232 void (*restore_sched_clock_state)(void);
7db971b2 233 void (*apic_post_init)(void);
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234 struct x86_legacy_features legacy;
235 void (*set_legacy_features)(void);
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236};
237
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238struct pci_dev;
239
240struct x86_msi_ops {
241 int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
242 void (*teardown_msi_irq)(unsigned int irq);
243 void (*teardown_msi_irqs)(struct pci_dev *dev);
ac8344c4 244 void (*restore_msi_irqs)(struct pci_dev *dev);
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245};
246
4a8e2a31 247struct x86_io_apic_ops {
1c4248ca 248 unsigned int (*read) (unsigned int apic, unsigned int reg);
1c4248ca 249 void (*disable)(void);
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250};
251
57844a8f 252extern struct x86_init_ops x86_init;
736decac 253extern struct x86_cpuinit_ops x86_cpuinit;
2d826404 254extern struct x86_platform_ops x86_platform;
294ee6f8 255extern struct x86_msi_ops x86_msi;
4a8e2a31 256extern struct x86_io_apic_ops x86_io_apic_ops;
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257
258extern void x86_early_init_platform_quirks(void);
57844a8f 259extern void x86_init_noop(void);
f4848472 260extern void x86_init_uint_noop(unsigned int unused);
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261
262#endif