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b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
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PA
2#ifndef _ASM_X86_XOR_64_H
3#define _ASM_X86_XOR_64_H
0db125c4 4
1da177e4 5static struct xor_block_template xor_block_sse = {
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6 .name = "generic_sse",
7 .do_2 = xor_sse_2,
8 .do_3 = xor_sse_3,
9 .do_4 = xor_sse_4,
10 .do_5 = xor_sse_5,
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LT
11};
12
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13
14/* Also try the AVX routines */
a1ce3928 15#include <asm/xor_avx.h>
ea4d26ae 16
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17/* We force the use of the SSE xor block because it can write around L2.
18 We may also be able to load into the L1 only depending on how the cpu
19 deals with a load to a line that is being prefetched. */
1da177e4 20#undef XOR_TRY_TEMPLATES
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21#define XOR_TRY_TEMPLATES \
22do { \
ea4d26ae 23 AVX_XOR_SPEED; \
f317820c 24 xor_speed(&xor_block_sse_pf64); \
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25 xor_speed(&xor_block_sse); \
26} while (0)
1da177e4 27
1965aae3 28#endif /* _ASM_X86_XOR_64_H */