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1da177e4 LT |
1 | /* |
2 | * boot.c - Architecture-Specific Low-Level ACPI Boot Support | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
5 | * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com> | |
6 | * | |
7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
24 | */ | |
25 | ||
26 | #include <linux/init.h> | |
1da177e4 | 27 | #include <linux/acpi.h> |
d66bea57 | 28 | #include <linux/acpi_pmtmr.h> |
1da177e4 | 29 | #include <linux/efi.h> |
73fea175 | 30 | #include <linux/cpumask.h> |
1da177e4 | 31 | #include <linux/module.h> |
aea00143 | 32 | #include <linux/dmi.h> |
b33fa1f3 | 33 | #include <linux/irq.h> |
f0f4c343 AD |
34 | #include <linux/bootmem.h> |
35 | #include <linux/ioport.h> | |
1da177e4 LT |
36 | |
37 | #include <asm/pgtable.h> | |
38 | #include <asm/io_apic.h> | |
39 | #include <asm/apic.h> | |
183fe065 | 40 | #include <asm/genapic.h> |
1da177e4 | 41 | #include <asm/io.h> |
1da177e4 | 42 | #include <asm/mpspec.h> |
dfac2189 | 43 | #include <asm/smp.h> |
1da177e4 | 44 | |
f6bc4029 GOC |
45 | #ifdef CONFIG_X86_LOCAL_APIC |
46 | # include <mach_apic.h> | |
47 | #endif | |
48 | ||
e8924acb | 49 | static int __initdata acpi_force = 0; |
1a3f239d | 50 | |
df3bb57d AK |
51 | #ifdef CONFIG_ACPI |
52 | int acpi_disabled = 0; | |
53 | #else | |
54 | int acpi_disabled = 1; | |
55 | #endif | |
56 | EXPORT_SYMBOL(acpi_disabled); | |
57 | ||
1da177e4 LT |
58 | #ifdef CONFIG_X86_64 |
59 | ||
1da177e4 | 60 | #include <asm/proto.h> |
637029c6 | 61 | |
4be44fcd | 62 | #else /* X86 */ |
1da177e4 LT |
63 | |
64 | #ifdef CONFIG_X86_LOCAL_APIC | |
65 | #include <mach_apic.h> | |
66 | #include <mach_mpparse.h> | |
4be44fcd | 67 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 68 | |
4be44fcd | 69 | #endif /* X86 */ |
1da177e4 LT |
70 | |
71 | #define BAD_MADT_ENTRY(entry, end) ( \ | |
72 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ | |
5f3b1a8b | 73 | ((struct acpi_subtable_header *)entry)->length < sizeof(*entry)) |
1da177e4 LT |
74 | |
75 | #define PREFIX "ACPI: " | |
76 | ||
90d53909 | 77 | int acpi_noirq; /* skip ACPI IRQ initialization */ |
6e4be1ff YL |
78 | int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ |
79 | EXPORT_SYMBOL(acpi_pci_disabled); | |
1da177e4 LT |
80 | int acpi_ht __initdata = 1; /* enable HT */ |
81 | ||
82 | int acpi_lapic; | |
83 | int acpi_ioapic; | |
84 | int acpi_strict; | |
1da177e4 | 85 | |
5f3b1a8b | 86 | u8 acpi_sci_flags __initdata; |
1da177e4 LT |
87 | int acpi_sci_override_gsi __initdata; |
88 | int acpi_skip_timer_override __initdata; | |
fa18f477 | 89 | int acpi_use_timer_override __initdata; |
1da177e4 LT |
90 | |
91 | #ifdef CONFIG_X86_LOCAL_APIC | |
92 | static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; | |
93 | #endif | |
94 | ||
95 | #ifndef __HAVE_ARCH_CMPXCHG | |
96 | #warning ACPI uses CMPXCHG, i486 and later hardware | |
97 | #endif | |
98 | ||
1da177e4 LT |
99 | /* -------------------------------------------------------------------------- |
100 | Boot-time Configuration | |
101 | -------------------------------------------------------------------------- */ | |
102 | ||
103 | /* | |
104 | * The default interrupt routing model is PIC (8259). This gets | |
27b46d76 | 105 | * overridden if IOAPICs are enumerated (below). |
1da177e4 | 106 | */ |
4be44fcd | 107 | enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; |
1da177e4 | 108 | |
1da177e4 LT |
109 | |
110 | /* | |
111 | * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END, | |
112 | * to map the target physical address. The problem is that set_fixmap() | |
113 | * provides a single page, and it is possible that the page is not | |
114 | * sufficient. | |
115 | * By using this area, we can map up to MAX_IO_APICS pages temporarily, | |
116 | * i.e. until the next __va_range() call. | |
117 | * | |
118 | * Important Safety Note: The fixed I/O APIC page numbers are *subtracted* | |
119 | * from the fixed base. That's why we start at FIX_IO_APIC_BASE_END and | |
120 | * count idx down while incrementing the phys address. | |
121 | */ | |
2fdf0741 | 122 | char *__init __acpi_map_table(unsigned long phys, unsigned long size) |
1da177e4 LT |
123 | { |
124 | unsigned long base, offset, mapped_size; | |
125 | int idx; | |
126 | ||
f34fa82b YL |
127 | if (!phys || !size) |
128 | return NULL; | |
129 | ||
f361a450 | 130 | if (phys+size <= (max_low_pfn_mapped << PAGE_SHIFT)) |
4be44fcd | 131 | return __va(phys); |
1da177e4 LT |
132 | |
133 | offset = phys & (PAGE_SIZE - 1); | |
134 | mapped_size = PAGE_SIZE - offset; | |
f34fa82b | 135 | clear_fixmap(FIX_ACPI_END); |
1da177e4 LT |
136 | set_fixmap(FIX_ACPI_END, phys); |
137 | base = fix_to_virt(FIX_ACPI_END); | |
138 | ||
139 | /* | |
140 | * Most cases can be covered by the below. | |
141 | */ | |
142 | idx = FIX_ACPI_END; | |
143 | while (mapped_size < size) { | |
144 | if (--idx < FIX_ACPI_BEGIN) | |
145 | return NULL; /* cannot handle this */ | |
146 | phys += PAGE_SIZE; | |
f34fa82b | 147 | clear_fixmap(idx); |
1da177e4 LT |
148 | set_fixmap(idx, phys); |
149 | mapped_size += PAGE_SIZE; | |
150 | } | |
151 | ||
4be44fcd | 152 | return ((unsigned char *)base + offset); |
1da177e4 | 153 | } |
1da177e4 LT |
154 | |
155 | #ifdef CONFIG_PCI_MMCONFIG | |
1339c367 PV |
156 | |
157 | static int acpi_mcfg_64bit_base_addr __initdata = FALSE; | |
158 | ||
54549391 | 159 | /* The physical address of the MMCONFIG aperture. Set from ACPI tables. */ |
15a58ed1 | 160 | struct acpi_mcfg_allocation *pci_mmcfg_config; |
54549391 GKH |
161 | int pci_mmcfg_config_num; |
162 | ||
a726c600 JK |
163 | static int __init acpi_mcfg_oem_check(struct acpi_table_mcfg *mcfg) |
164 | { | |
165 | if (!strcmp(mcfg->header.oem_id, "SGI")) | |
166 | acpi_mcfg_64bit_base_addr = TRUE; | |
167 | ||
168 | return 0; | |
169 | } | |
170 | ||
ceb6c468 | 171 | int __init acpi_parse_mcfg(struct acpi_table_header *header) |
1da177e4 LT |
172 | { |
173 | struct acpi_table_mcfg *mcfg; | |
54549391 GKH |
174 | unsigned long i; |
175 | int config_size; | |
1da177e4 | 176 | |
ceb6c468 | 177 | if (!header) |
1da177e4 LT |
178 | return -EINVAL; |
179 | ||
ceb6c468 | 180 | mcfg = (struct acpi_table_mcfg *)header; |
1da177e4 | 181 | |
54549391 GKH |
182 | /* how many config structures do we have */ |
183 | pci_mmcfg_config_num = 0; | |
ceb6c468 | 184 | i = header->length - sizeof(struct acpi_table_mcfg); |
15a58ed1 | 185 | while (i >= sizeof(struct acpi_mcfg_allocation)) { |
54549391 | 186 | ++pci_mmcfg_config_num; |
15a58ed1 | 187 | i -= sizeof(struct acpi_mcfg_allocation); |
54549391 GKH |
188 | }; |
189 | if (pci_mmcfg_config_num == 0) { | |
190 | printk(KERN_ERR PREFIX "MMCONFIG has no entries\n"); | |
1da177e4 LT |
191 | return -ENODEV; |
192 | } | |
193 | ||
54549391 GKH |
194 | config_size = pci_mmcfg_config_num * sizeof(*pci_mmcfg_config); |
195 | pci_mmcfg_config = kmalloc(config_size, GFP_KERNEL); | |
196 | if (!pci_mmcfg_config) { | |
197 | printk(KERN_WARNING PREFIX | |
198 | "No memory for MCFG config tables\n"); | |
199 | return -ENOMEM; | |
200 | } | |
201 | ||
ad363f80 | 202 | memcpy(pci_mmcfg_config, &mcfg[1], config_size); |
a726c600 JK |
203 | |
204 | acpi_mcfg_oem_check(mcfg); | |
205 | ||
54549391 | 206 | for (i = 0; i < pci_mmcfg_config_num; ++i) { |
a726c600 JK |
207 | if ((pci_mmcfg_config[i].address > 0xFFFFFFFF) && |
208 | !acpi_mcfg_64bit_base_addr) { | |
54549391 GKH |
209 | printk(KERN_ERR PREFIX |
210 | "MMCONFIG not in low 4GB of memory\n"); | |
acc7c2e0 KR |
211 | kfree(pci_mmcfg_config); |
212 | pci_mmcfg_config_num = 0; | |
54549391 GKH |
213 | return -ENODEV; |
214 | } | |
215 | } | |
1da177e4 LT |
216 | |
217 | return 0; | |
218 | } | |
4be44fcd | 219 | #endif /* CONFIG_PCI_MMCONFIG */ |
1da177e4 LT |
220 | |
221 | #ifdef CONFIG_X86_LOCAL_APIC | |
15a58ed1 | 222 | static int __init acpi_parse_madt(struct acpi_table_header *table) |
1da177e4 | 223 | { |
4be44fcd | 224 | struct acpi_table_madt *madt = NULL; |
1da177e4 | 225 | |
15a58ed1 | 226 | if (!cpu_has_apic) |
1da177e4 LT |
227 | return -EINVAL; |
228 | ||
15a58ed1 | 229 | madt = (struct acpi_table_madt *)table; |
1da177e4 LT |
230 | if (!madt) { |
231 | printk(KERN_WARNING PREFIX "Unable to map MADT\n"); | |
232 | return -ENODEV; | |
233 | } | |
234 | ||
ad363f80 AS |
235 | if (madt->address) { |
236 | acpi_lapic_addr = (u64) madt->address; | |
1da177e4 LT |
237 | |
238 | printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n", | |
ad363f80 | 239 | madt->address); |
1da177e4 LT |
240 | } |
241 | ||
242 | acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id); | |
4be44fcd | 243 | |
1da177e4 LT |
244 | return 0; |
245 | } | |
246 | ||
dfac2189 AS |
247 | static void __cpuinit acpi_register_lapic(int id, u8 enabled) |
248 | { | |
fb3bbd6a YL |
249 | unsigned int ver = 0; |
250 | ||
dfac2189 AS |
251 | if (!enabled) { |
252 | ++disabled_cpus; | |
253 | return; | |
254 | } | |
255 | ||
fb3bbd6a YL |
256 | if (boot_cpu_physical_apicid != -1U) |
257 | ver = apic_version[boot_cpu_physical_apicid]; | |
fb3bbd6a YL |
258 | |
259 | generic_processor_info(id, ver); | |
dfac2189 AS |
260 | } |
261 | ||
1da177e4 | 262 | static int __init |
5f3b1a8b | 263 | acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 264 | { |
5f3b1a8b | 265 | struct acpi_madt_local_apic *processor = NULL; |
1da177e4 | 266 | |
5f3b1a8b | 267 | processor = (struct acpi_madt_local_apic *)header; |
1da177e4 LT |
268 | |
269 | if (BAD_MADT_ENTRY(processor, end)) | |
270 | return -EINVAL; | |
271 | ||
272 | acpi_table_print_madt_entry(header); | |
273 | ||
7f66ae48 AR |
274 | /* |
275 | * We need to register disabled CPU as well to permit | |
276 | * counting disabled CPUs. This allows us to size | |
277 | * cpus_possible_map more accurately, to permit | |
278 | * to not preallocating memory for all NR_CPUS | |
279 | * when we use CPU hotplug. | |
280 | */ | |
dfac2189 AS |
281 | acpi_register_lapic(processor->id, /* APIC ID */ |
282 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
1da177e4 LT |
283 | |
284 | return 0; | |
285 | } | |
286 | ||
ac049c1d JS |
287 | static int __init |
288 | acpi_parse_sapic(struct acpi_subtable_header *header, const unsigned long end) | |
289 | { | |
290 | struct acpi_madt_local_sapic *processor = NULL; | |
291 | ||
292 | processor = (struct acpi_madt_local_sapic *)header; | |
293 | ||
294 | if (BAD_MADT_ENTRY(processor, end)) | |
295 | return -EINVAL; | |
296 | ||
297 | acpi_table_print_madt_entry(header); | |
298 | ||
dfac2189 AS |
299 | acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */ |
300 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
ac049c1d JS |
301 | |
302 | return 0; | |
303 | } | |
304 | ||
1da177e4 | 305 | static int __init |
5f3b1a8b | 306 | acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header, |
4be44fcd | 307 | const unsigned long end) |
1da177e4 | 308 | { |
5f3b1a8b | 309 | struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL; |
1da177e4 | 310 | |
5f3b1a8b | 311 | lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header; |
1da177e4 LT |
312 | |
313 | if (BAD_MADT_ENTRY(lapic_addr_ovr, end)) | |
314 | return -EINVAL; | |
315 | ||
316 | acpi_lapic_addr = lapic_addr_ovr->address; | |
317 | ||
318 | return 0; | |
319 | } | |
320 | ||
321 | static int __init | |
5f3b1a8b | 322 | acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 323 | { |
5f3b1a8b | 324 | struct acpi_madt_local_apic_nmi *lapic_nmi = NULL; |
1da177e4 | 325 | |
5f3b1a8b | 326 | lapic_nmi = (struct acpi_madt_local_apic_nmi *)header; |
1da177e4 LT |
327 | |
328 | if (BAD_MADT_ENTRY(lapic_nmi, end)) | |
329 | return -EINVAL; | |
330 | ||
331 | acpi_table_print_madt_entry(header); | |
332 | ||
333 | if (lapic_nmi->lint != 1) | |
334 | printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n"); | |
335 | ||
336 | return 0; | |
337 | } | |
338 | ||
4be44fcd | 339 | #endif /*CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 340 | |
8466361a | 341 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 LT |
342 | |
343 | static int __init | |
5f3b1a8b | 344 | acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 345 | { |
5f3b1a8b | 346 | struct acpi_madt_io_apic *ioapic = NULL; |
1da177e4 | 347 | |
5f3b1a8b | 348 | ioapic = (struct acpi_madt_io_apic *)header; |
1da177e4 LT |
349 | |
350 | if (BAD_MADT_ENTRY(ioapic, end)) | |
351 | return -EINVAL; | |
4be44fcd | 352 | |
1da177e4 LT |
353 | acpi_table_print_madt_entry(header); |
354 | ||
4be44fcd LB |
355 | mp_register_ioapic(ioapic->id, |
356 | ioapic->address, ioapic->global_irq_base); | |
357 | ||
1da177e4 LT |
358 | return 0; |
359 | } | |
360 | ||
361 | /* | |
362 | * Parse Interrupt Source Override for the ACPI SCI | |
363 | */ | |
e82c354b | 364 | static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger) |
1da177e4 LT |
365 | { |
366 | if (trigger == 0) /* compatible SCI trigger is level */ | |
367 | trigger = 3; | |
368 | ||
369 | if (polarity == 0) /* compatible SCI polarity is low */ | |
370 | polarity = 3; | |
371 | ||
372 | /* Command-line over-ride via acpi_sci= */ | |
5f3b1a8b AS |
373 | if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) |
374 | trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2; | |
1da177e4 | 375 | |
5f3b1a8b AS |
376 | if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK) |
377 | polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK; | |
1da177e4 LT |
378 | |
379 | /* | |
4be44fcd | 380 | * mp_config_acpi_legacy_irqs() already setup IRQs < 16 |
1da177e4 LT |
381 | * If GSI is < 16, this will update its flags, |
382 | * else it will create a new mp_irqs[] entry. | |
383 | */ | |
7bdd21ce | 384 | mp_override_legacy_irq(gsi, polarity, trigger, gsi); |
1da177e4 LT |
385 | |
386 | /* | |
387 | * stash over-ride to indicate we've been here | |
cee324b1 | 388 | * and for later update of acpi_gbl_FADT |
1da177e4 | 389 | */ |
7bdd21ce | 390 | acpi_sci_override_gsi = gsi; |
1da177e4 LT |
391 | return; |
392 | } | |
393 | ||
394 | static int __init | |
5f3b1a8b | 395 | acpi_parse_int_src_ovr(struct acpi_subtable_header * header, |
4be44fcd | 396 | const unsigned long end) |
1da177e4 | 397 | { |
5f3b1a8b | 398 | struct acpi_madt_interrupt_override *intsrc = NULL; |
1da177e4 | 399 | |
5f3b1a8b | 400 | intsrc = (struct acpi_madt_interrupt_override *)header; |
1da177e4 LT |
401 | |
402 | if (BAD_MADT_ENTRY(intsrc, end)) | |
403 | return -EINVAL; | |
404 | ||
405 | acpi_table_print_madt_entry(header); | |
406 | ||
5f3b1a8b | 407 | if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) { |
7bdd21ce | 408 | acpi_sci_ioapic_setup(intsrc->global_irq, |
5f3b1a8b AS |
409 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, |
410 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2); | |
1da177e4 LT |
411 | return 0; |
412 | } | |
413 | ||
414 | if (acpi_skip_timer_override && | |
5f3b1a8b | 415 | intsrc->source_irq == 0 && intsrc->global_irq == 2) { |
4be44fcd LB |
416 | printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n"); |
417 | return 0; | |
1da177e4 LT |
418 | } |
419 | ||
5f3b1a8b AS |
420 | mp_override_legacy_irq(intsrc->source_irq, |
421 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, | |
422 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, | |
423 | intsrc->global_irq); | |
1da177e4 LT |
424 | |
425 | return 0; | |
426 | } | |
427 | ||
1da177e4 | 428 | static int __init |
5f3b1a8b | 429 | acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 430 | { |
5f3b1a8b | 431 | struct acpi_madt_nmi_source *nmi_src = NULL; |
1da177e4 | 432 | |
5f3b1a8b | 433 | nmi_src = (struct acpi_madt_nmi_source *)header; |
1da177e4 LT |
434 | |
435 | if (BAD_MADT_ENTRY(nmi_src, end)) | |
436 | return -EINVAL; | |
437 | ||
438 | acpi_table_print_madt_entry(header); | |
439 | ||
440 | /* TBD: Support nimsrc entries? */ | |
441 | ||
442 | return 0; | |
443 | } | |
444 | ||
4be44fcd | 445 | #endif /* CONFIG_X86_IO_APIC */ |
1da177e4 | 446 | |
1da177e4 LT |
447 | /* |
448 | * acpi_pic_sci_set_trigger() | |
5f3b1a8b | 449 | * |
1da177e4 LT |
450 | * use ELCR to set PIC-mode trigger type for SCI |
451 | * | |
452 | * If a PIC-mode SCI is not recognized or gives spurious IRQ7's | |
453 | * it may require Edge Trigger -- use "acpi_sci=edge" | |
454 | * | |
455 | * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers | |
456 | * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. | |
27b46d76 SA |
457 | * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0) |
458 | * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0) | |
1da177e4 LT |
459 | */ |
460 | ||
4be44fcd | 461 | void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) |
1da177e4 LT |
462 | { |
463 | unsigned int mask = 1 << irq; | |
464 | unsigned int old, new; | |
465 | ||
466 | /* Real old ELCR mask */ | |
467 | old = inb(0x4d0) | (inb(0x4d1) << 8); | |
468 | ||
469 | /* | |
27b46d76 | 470 | * If we use ACPI to set PCI IRQs, then we should clear ELCR |
1da177e4 LT |
471 | * since we will set it correctly as we enable the PCI irq |
472 | * routing. | |
473 | */ | |
474 | new = acpi_noirq ? old : 0; | |
475 | ||
476 | /* | |
477 | * Update SCI information in the ELCR, it isn't in the PCI | |
478 | * routing tables.. | |
479 | */ | |
480 | switch (trigger) { | |
4be44fcd | 481 | case 1: /* Edge - clear */ |
1da177e4 LT |
482 | new &= ~mask; |
483 | break; | |
4be44fcd | 484 | case 3: /* Level - set */ |
1da177e4 LT |
485 | new |= mask; |
486 | break; | |
487 | } | |
488 | ||
489 | if (old == new) | |
490 | return; | |
491 | ||
492 | printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old); | |
493 | outb(new, 0x4d0); | |
494 | outb(new >> 8, 0x4d1); | |
495 | } | |
496 | ||
1da177e4 LT |
497 | int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) |
498 | { | |
f023d764 | 499 | *irq = gsi; |
1da177e4 LT |
500 | return 0; |
501 | } | |
502 | ||
1f3a6a15 KK |
503 | /* |
504 | * success: return IRQ number (>=0) | |
505 | * failure: return < 0 | |
506 | */ | |
cb654695 | 507 | int acpi_register_gsi(u32 gsi, int triggering, int polarity) |
1da177e4 LT |
508 | { |
509 | unsigned int irq; | |
510 | unsigned int plat_gsi = gsi; | |
511 | ||
512 | #ifdef CONFIG_PCI | |
513 | /* | |
514 | * Make sure all (legacy) PCI IRQs are set as level-triggered. | |
515 | */ | |
516 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { | |
cb654695 | 517 | if (triggering == ACPI_LEVEL_SENSITIVE) |
4be44fcd | 518 | eisa_set_level_irq(gsi); |
1da177e4 LT |
519 | } |
520 | #endif | |
521 | ||
522 | #ifdef CONFIG_X86_IO_APIC | |
523 | if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) { | |
cb654695 | 524 | plat_gsi = mp_register_gsi(gsi, triggering, polarity); |
1da177e4 LT |
525 | } |
526 | #endif | |
527 | acpi_gsi_to_irq(plat_gsi, &irq); | |
528 | return irq; | |
529 | } | |
4be44fcd | 530 | |
1da177e4 LT |
531 | /* |
532 | * ACPI based hotplug support for CPU | |
533 | */ | |
534 | #ifdef CONFIG_ACPI_HOTPLUG_CPU | |
009cbadb SR |
535 | |
536 | static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu) | |
1da177e4 | 537 | { |
73fea175 AR |
538 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; |
539 | union acpi_object *obj; | |
5f3b1a8b | 540 | struct acpi_madt_local_apic *lapic; |
73fea175 AR |
541 | cpumask_t tmp_map, new_map; |
542 | u8 physid; | |
543 | int cpu; | |
544 | ||
545 | if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer))) | |
546 | return -EINVAL; | |
547 | ||
548 | if (!buffer.length || !buffer.pointer) | |
549 | return -EINVAL; | |
550 | ||
551 | obj = buffer.pointer; | |
552 | if (obj->type != ACPI_TYPE_BUFFER || | |
553 | obj->buffer.length < sizeof(*lapic)) { | |
554 | kfree(buffer.pointer); | |
555 | return -EINVAL; | |
556 | } | |
557 | ||
5f3b1a8b | 558 | lapic = (struct acpi_madt_local_apic *)obj->buffer.pointer; |
73fea175 | 559 | |
5f3b1a8b AS |
560 | if (lapic->header.type != ACPI_MADT_TYPE_LOCAL_APIC || |
561 | !(lapic->lapic_flags & ACPI_MADT_ENABLED)) { | |
73fea175 AR |
562 | kfree(buffer.pointer); |
563 | return -EINVAL; | |
564 | } | |
565 | ||
566 | physid = lapic->id; | |
567 | ||
568 | kfree(buffer.pointer); | |
569 | buffer.length = ACPI_ALLOCATE_BUFFER; | |
570 | buffer.pointer = NULL; | |
571 | ||
572 | tmp_map = cpu_present_map; | |
dfac2189 | 573 | acpi_register_lapic(physid, lapic->lapic_flags & ACPI_MADT_ENABLED); |
73fea175 AR |
574 | |
575 | /* | |
576 | * If mp_register_lapic successfully generates a new logical cpu | |
577 | * number, then the following will get us exactly what was mapped | |
578 | */ | |
579 | cpus_andnot(new_map, cpu_present_map, tmp_map); | |
580 | if (cpus_empty(new_map)) { | |
581 | printk ("Unable to map lapic to logical cpu number\n"); | |
582 | return -EINVAL; | |
583 | } | |
584 | ||
585 | cpu = first_cpu(new_map); | |
586 | ||
587 | *pcpu = cpu; | |
588 | return 0; | |
1da177e4 | 589 | } |
1da177e4 | 590 | |
009cbadb SR |
591 | /* wrapper to silence section mismatch warning */ |
592 | int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu) | |
593 | { | |
594 | return _acpi_map_lsapic(handle, pcpu); | |
595 | } | |
4be44fcd | 596 | EXPORT_SYMBOL(acpi_map_lsapic); |
1da177e4 | 597 | |
4be44fcd | 598 | int acpi_unmap_lsapic(int cpu) |
1da177e4 | 599 | { |
71fff5e6 | 600 | per_cpu(x86_cpu_to_apicid, cpu) = -1; |
73fea175 AR |
601 | cpu_clear(cpu, cpu_present_map); |
602 | num_processors--; | |
603 | ||
604 | return (0); | |
1da177e4 | 605 | } |
4be44fcd | 606 | |
1da177e4 | 607 | EXPORT_SYMBOL(acpi_unmap_lsapic); |
4be44fcd | 608 | #endif /* CONFIG_ACPI_HOTPLUG_CPU */ |
1da177e4 | 609 | |
4be44fcd | 610 | int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base) |
b1bb248a KK |
611 | { |
612 | /* TBD */ | |
613 | return -EINVAL; | |
614 | } | |
4be44fcd | 615 | |
b1bb248a KK |
616 | EXPORT_SYMBOL(acpi_register_ioapic); |
617 | ||
4be44fcd | 618 | int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base) |
b1bb248a KK |
619 | { |
620 | /* TBD */ | |
621 | return -EINVAL; | |
622 | } | |
4be44fcd | 623 | |
b1bb248a KK |
624 | EXPORT_SYMBOL(acpi_unregister_ioapic); |
625 | ||
5f3b1a8b | 626 | static int __init acpi_parse_sbf(struct acpi_table_header *table) |
1da177e4 | 627 | { |
5f3b1a8b | 628 | struct acpi_table_boot *sb; |
1da177e4 | 629 | |
5f3b1a8b | 630 | sb = (struct acpi_table_boot *)table; |
1da177e4 LT |
631 | if (!sb) { |
632 | printk(KERN_WARNING PREFIX "Unable to map SBF\n"); | |
633 | return -ENODEV; | |
634 | } | |
635 | ||
5f3b1a8b | 636 | sbf_port = sb->cmos_index; /* Save CMOS port */ |
1da177e4 LT |
637 | |
638 | return 0; | |
639 | } | |
640 | ||
1da177e4 | 641 | #ifdef CONFIG_HPET_TIMER |
2d0c87c3 | 642 | #include <asm/hpet.h> |
1da177e4 | 643 | |
a1dfd851 AD |
644 | static struct __initdata resource *hpet_res; |
645 | ||
5f3b1a8b | 646 | static int __init acpi_parse_hpet(struct acpi_table_header *table) |
1da177e4 LT |
647 | { |
648 | struct acpi_table_hpet *hpet_tbl; | |
649 | ||
5f3b1a8b | 650 | hpet_tbl = (struct acpi_table_hpet *)table; |
1da177e4 LT |
651 | if (!hpet_tbl) { |
652 | printk(KERN_WARNING PREFIX "Unable to map HPET\n"); | |
653 | return -ENODEV; | |
654 | } | |
655 | ||
ad363f80 | 656 | if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) { |
1da177e4 LT |
657 | printk(KERN_WARNING PREFIX "HPET timers must be located in " |
658 | "memory.\n"); | |
659 | return -1; | |
660 | } | |
f0f4c343 | 661 | |
2d0c87c3 | 662 | hpet_address = hpet_tbl->address.address; |
f4df73c2 TG |
663 | |
664 | /* | |
665 | * Some broken BIOSes advertise HPET at 0x0. We really do not | |
666 | * want to allocate a resource there. | |
667 | */ | |
668 | if (!hpet_address) { | |
669 | printk(KERN_WARNING PREFIX | |
670 | "HPET id: %#x base: %#lx is invalid\n", | |
671 | hpet_tbl->id, hpet_address); | |
672 | return 0; | |
673 | } | |
674 | #ifdef CONFIG_X86_64 | |
675 | /* | |
676 | * Some even more broken BIOSes advertise HPET at | |
677 | * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add | |
678 | * some noise: | |
679 | */ | |
680 | if (hpet_address == 0xfed0000000000000UL) { | |
681 | if (!hpet_force_user) { | |
682 | printk(KERN_WARNING PREFIX "HPET id: %#x " | |
683 | "base: 0xfed0000000000000 is bogus\n " | |
684 | "try hpet=force on the kernel command line to " | |
685 | "fix it up to 0xfed00000.\n", hpet_tbl->id); | |
686 | hpet_address = 0; | |
687 | return 0; | |
688 | } | |
689 | printk(KERN_WARNING PREFIX | |
690 | "HPET id: %#x base: 0xfed0000000000000 fixed up " | |
691 | "to 0xfed00000.\n", hpet_tbl->id); | |
692 | hpet_address >>= 32; | |
693 | } | |
694 | #endif | |
4be44fcd | 695 | printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n", |
2d0c87c3 | 696 | hpet_tbl->id, hpet_address); |
1da177e4 | 697 | |
a1dfd851 AD |
698 | /* |
699 | * Allocate and initialize the HPET firmware resource for adding into | |
700 | * the resource tree during the lateinit timeframe. | |
701 | */ | |
702 | #define HPET_RESOURCE_NAME_SIZE 9 | |
703 | hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE); | |
704 | ||
a1dfd851 AD |
705 | hpet_res->name = (void *)&hpet_res[1]; |
706 | hpet_res->flags = IORESOURCE_MEM; | |
707 | snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u", | |
708 | hpet_tbl->sequence); | |
709 | ||
710 | hpet_res->start = hpet_address; | |
711 | hpet_res->end = hpet_address + (1 * 1024) - 1; | |
712 | ||
1da177e4 LT |
713 | return 0; |
714 | } | |
a1dfd851 AD |
715 | |
716 | /* | |
717 | * hpet_insert_resource inserts the HPET resources used into the resource | |
718 | * tree. | |
719 | */ | |
720 | static __init int hpet_insert_resource(void) | |
721 | { | |
722 | if (!hpet_res) | |
723 | return 1; | |
724 | ||
725 | return insert_resource(&iomem_resource, hpet_res); | |
726 | } | |
727 | ||
728 | late_initcall(hpet_insert_resource); | |
729 | ||
1da177e4 LT |
730 | #else |
731 | #define acpi_parse_hpet NULL | |
732 | #endif | |
733 | ||
5f3b1a8b | 734 | static int __init acpi_parse_fadt(struct acpi_table_header *table) |
1da177e4 | 735 | { |
90660ec3 | 736 | |
1da177e4 LT |
737 | #ifdef CONFIG_X86_PM_TIMER |
738 | /* detect the location of the ACPI PM Timer */ | |
5f3b1a8b | 739 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) { |
1da177e4 | 740 | /* FADT rev. 2 */ |
5f3b1a8b | 741 | if (acpi_gbl_FADT.xpm_timer_block.space_id != |
4be44fcd | 742 | ACPI_ADR_SPACE_SYSTEM_IO) |
1da177e4 LT |
743 | return 0; |
744 | ||
5f3b1a8b | 745 | pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address; |
e6e87b4b DSL |
746 | /* |
747 | * "X" fields are optional extensions to the original V1.0 | |
748 | * fields, so we must selectively expand V1.0 fields if the | |
749 | * corresponding X field is zero. | |
750 | */ | |
751 | if (!pmtmr_ioport) | |
5f3b1a8b | 752 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
753 | } else { |
754 | /* FADT rev. 1 */ | |
5f3b1a8b | 755 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
756 | } |
757 | if (pmtmr_ioport) | |
4be44fcd LB |
758 | printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n", |
759 | pmtmr_ioport); | |
1da177e4 LT |
760 | #endif |
761 | return 0; | |
762 | } | |
763 | ||
1da177e4 LT |
764 | #ifdef CONFIG_X86_LOCAL_APIC |
765 | /* | |
766 | * Parse LAPIC entries in MADT | |
767 | * returns 0 on success, < 0 on error | |
768 | */ | |
31d2092e AS |
769 | |
770 | static void __init acpi_register_lapic_address(unsigned long address) | |
771 | { | |
772 | mp_lapic_addr = address; | |
773 | ||
774 | set_fixmap_nocache(FIX_APIC_BASE, address); | |
fb3bbd6a | 775 | if (boot_cpu_physical_apicid == -1U) { |
4c9961d5 | 776 | boot_cpu_physical_apicid = read_apic_id(); |
fb3bbd6a YL |
777 | apic_version[boot_cpu_physical_apicid] = |
778 | GET_APIC_VERSION(apic_read(APIC_LVR)); | |
fb3bbd6a | 779 | } |
31d2092e AS |
780 | } |
781 | ||
cbf9bd60 YL |
782 | static int __init early_acpi_parse_madt_lapic_addr_ovr(void) |
783 | { | |
784 | int count; | |
785 | ||
786 | if (!cpu_has_apic) | |
787 | return -ENODEV; | |
788 | ||
789 | /* | |
790 | * Note that the LAPIC address is obtained from the MADT (32-bit value) | |
791 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
792 | */ | |
793 | ||
794 | count = | |
795 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, | |
796 | acpi_parse_lapic_addr_ovr, 0); | |
797 | if (count < 0) { | |
798 | printk(KERN_ERR PREFIX | |
799 | "Error parsing LAPIC address override entry\n"); | |
800 | return count; | |
801 | } | |
802 | ||
803 | acpi_register_lapic_address(acpi_lapic_addr); | |
804 | ||
805 | return count; | |
806 | } | |
807 | ||
4be44fcd | 808 | static int __init acpi_parse_madt_lapic_entries(void) |
1da177e4 LT |
809 | { |
810 | int count; | |
811 | ||
0fcd2709 AK |
812 | if (!cpu_has_apic) |
813 | return -ENODEV; | |
814 | ||
5f3b1a8b | 815 | /* |
1da177e4 LT |
816 | * Note that the LAPIC address is obtained from the MADT (32-bit value) |
817 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
818 | */ | |
819 | ||
4be44fcd | 820 | count = |
5f3b1a8b | 821 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, |
4be44fcd | 822 | acpi_parse_lapic_addr_ovr, 0); |
1da177e4 | 823 | if (count < 0) { |
4be44fcd LB |
824 | printk(KERN_ERR PREFIX |
825 | "Error parsing LAPIC address override entry\n"); | |
1da177e4 LT |
826 | return count; |
827 | } | |
828 | ||
31d2092e | 829 | acpi_register_lapic_address(acpi_lapic_addr); |
1da177e4 | 830 | |
ac049c1d JS |
831 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC, |
832 | acpi_parse_sapic, MAX_APICS); | |
833 | ||
834 | if (!count) | |
835 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC, | |
836 | acpi_parse_lapic, MAX_APICS); | |
4be44fcd | 837 | if (!count) { |
1da177e4 LT |
838 | printk(KERN_ERR PREFIX "No LAPIC entries present\n"); |
839 | /* TBD: Cleanup to allow fallback to MPS */ | |
840 | return -ENODEV; | |
4be44fcd | 841 | } else if (count < 0) { |
1da177e4 LT |
842 | printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n"); |
843 | /* TBD: Cleanup to allow fallback to MPS */ | |
844 | return count; | |
845 | } | |
846 | ||
4be44fcd | 847 | count = |
5f3b1a8b | 848 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, acpi_parse_lapic_nmi, 0); |
1da177e4 LT |
849 | if (count < 0) { |
850 | printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n"); | |
851 | /* TBD: Cleanup to allow fallback to MPS */ | |
852 | return count; | |
853 | } | |
854 | return 0; | |
855 | } | |
4be44fcd | 856 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 857 | |
8466361a | 858 | #ifdef CONFIG_X86_IO_APIC |
11113f84 AS |
859 | #define MP_ISA_BUS 0 |
860 | ||
d49c4288 | 861 | #ifdef CONFIG_X86_ES7000 |
11113f84 AS |
862 | extern int es7000_plat; |
863 | #endif | |
864 | ||
5f895148 AS |
865 | static struct { |
866 | int apic_id; | |
867 | int gsi_base; | |
868 | int gsi_end; | |
869 | DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); | |
870 | } mp_ioapic_routing[MAX_IO_APICS]; | |
11113f84 AS |
871 | |
872 | static int mp_find_ioapic(int gsi) | |
873 | { | |
874 | int i = 0; | |
875 | ||
876 | /* Find the IOAPIC that manages this GSI. */ | |
877 | for (i = 0; i < nr_ioapics; i++) { | |
878 | if ((gsi >= mp_ioapic_routing[i].gsi_base) | |
879 | && (gsi <= mp_ioapic_routing[i].gsi_end)) | |
880 | return i; | |
881 | } | |
882 | ||
883 | printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi); | |
884 | return -1; | |
885 | } | |
886 | ||
887 | static u8 __init uniq_ioapic_id(u8 id) | |
888 | { | |
889 | #ifdef CONFIG_X86_32 | |
890 | if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && | |
891 | !APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) | |
892 | return io_apic_get_unique_id(nr_ioapics, id); | |
893 | else | |
894 | return id; | |
895 | #else | |
896 | int i; | |
897 | DECLARE_BITMAP(used, 256); | |
898 | bitmap_zero(used, 256); | |
899 | for (i = 0; i < nr_ioapics; i++) { | |
ec2cd0a2 AS |
900 | struct mp_config_ioapic *ia = &mp_ioapics[i]; |
901 | __set_bit(ia->mp_apicid, used); | |
11113f84 AS |
902 | } |
903 | if (!test_bit(id, used)) | |
904 | return id; | |
905 | return find_first_zero_bit(used, 256); | |
906 | #endif | |
907 | } | |
908 | ||
909 | static int bad_ioapic(unsigned long address) | |
910 | { | |
911 | if (nr_ioapics >= MAX_IO_APICS) { | |
912 | printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " | |
913 | "(found %d)\n", MAX_IO_APICS, nr_ioapics); | |
914 | panic("Recompile kernel with bigger MAX_IO_APICS!\n"); | |
915 | } | |
916 | if (!address) { | |
917 | printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" | |
918 | " found in table, skipping!\n"); | |
919 | return 1; | |
920 | } | |
921 | return 0; | |
922 | } | |
923 | ||
924 | void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) | |
925 | { | |
926 | int idx = 0; | |
927 | ||
928 | if (bad_ioapic(address)) | |
929 | return; | |
930 | ||
931 | idx = nr_ioapics; | |
932 | ||
ec2cd0a2 AS |
933 | mp_ioapics[idx].mp_type = MP_IOAPIC; |
934 | mp_ioapics[idx].mp_flags = MPC_APIC_USABLE; | |
935 | mp_ioapics[idx].mp_apicaddr = address; | |
11113f84 AS |
936 | |
937 | set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); | |
ec2cd0a2 | 938 | mp_ioapics[idx].mp_apicid = uniq_ioapic_id(id); |
11113f84 | 939 | #ifdef CONFIG_X86_32 |
ec2cd0a2 | 940 | mp_ioapics[idx].mp_apicver = io_apic_get_version(idx); |
11113f84 | 941 | #else |
ec2cd0a2 | 942 | mp_ioapics[idx].mp_apicver = 0; |
11113f84 AS |
943 | #endif |
944 | /* | |
945 | * Build basic GSI lookup table to facilitate gsi->io_apic lookups | |
946 | * and to prevent reprogramming of IOAPIC pins (PCI GSIs). | |
947 | */ | |
ec2cd0a2 | 948 | mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mp_apicid; |
11113f84 AS |
949 | mp_ioapic_routing[idx].gsi_base = gsi_base; |
950 | mp_ioapic_routing[idx].gsi_end = gsi_base + | |
951 | io_apic_get_redir_entries(idx); | |
952 | ||
ec2cd0a2 AS |
953 | printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, " |
954 | "GSI %d-%d\n", idx, mp_ioapics[idx].mp_apicid, | |
955 | mp_ioapics[idx].mp_apicver, mp_ioapics[idx].mp_apicaddr, | |
11113f84 AS |
956 | mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end); |
957 | ||
958 | nr_ioapics++; | |
959 | } | |
960 | ||
fcfa146e YL |
961 | static void assign_to_mp_irq(struct mp_config_intsrc *m, |
962 | struct mp_config_intsrc *mp_irq) | |
963 | { | |
964 | memcpy(mp_irq, m, sizeof(struct mp_config_intsrc)); | |
965 | } | |
966 | ||
967 | static int mp_irq_cmp(struct mp_config_intsrc *mp_irq, | |
968 | struct mp_config_intsrc *m) | |
969 | { | |
970 | return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc)); | |
971 | } | |
972 | ||
973 | static void save_mp_irq(struct mp_config_intsrc *m) | |
974 | { | |
975 | int i; | |
976 | ||
977 | for (i = 0; i < mp_irq_entries; i++) { | |
978 | if (!mp_irq_cmp(&mp_irqs[i], m)) | |
979 | return; | |
980 | } | |
981 | ||
982 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | |
983 | if (++mp_irq_entries == MAX_IRQ_SOURCES) | |
984 | panic("Max # of irq sources exceeded!!\n"); | |
985 | } | |
986 | ||
11113f84 AS |
987 | void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) |
988 | { | |
6df8809b YL |
989 | int ioapic; |
990 | int pin; | |
fcfa146e | 991 | struct mp_config_intsrc mp_irq; |
11113f84 AS |
992 | |
993 | /* | |
994 | * Convert 'gsi' to 'ioapic.pin'. | |
995 | */ | |
996 | ioapic = mp_find_ioapic(gsi); | |
997 | if (ioapic < 0) | |
998 | return; | |
999 | pin = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
1000 | ||
1001 | /* | |
1002 | * TBD: This check is for faulty timer entries, where the override | |
1003 | * erroneously sets the trigger to level, resulting in a HUGE | |
1004 | * increase of timer interrupts! | |
1005 | */ | |
1006 | if ((bus_irq == 0) && (trigger == 3)) | |
1007 | trigger = 1; | |
1008 | ||
fcfa146e YL |
1009 | mp_irq.mp_type = MP_INTSRC; |
1010 | mp_irq.mp_irqtype = mp_INT; | |
1011 | mp_irq.mp_irqflag = (trigger << 2) | polarity; | |
1012 | mp_irq.mp_srcbus = MP_ISA_BUS; | |
1013 | mp_irq.mp_srcbusirq = bus_irq; /* IRQ */ | |
1014 | mp_irq.mp_dstapic = mp_ioapics[ioapic].mp_apicid; /* APIC ID */ | |
1015 | mp_irq.mp_dstirq = pin; /* INTIN# */ | |
11113f84 | 1016 | |
fcfa146e | 1017 | save_mp_irq(&mp_irq); |
11113f84 AS |
1018 | } |
1019 | ||
1020 | void __init mp_config_acpi_legacy_irqs(void) | |
1021 | { | |
6df8809b YL |
1022 | int i; |
1023 | int ioapic; | |
1024 | unsigned int dstapic; | |
fcfa146e | 1025 | struct mp_config_intsrc mp_irq; |
11113f84 AS |
1026 | |
1027 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) | |
1028 | /* | |
1029 | * Fabricate the legacy ISA bus (bus #31). | |
1030 | */ | |
1031 | mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; | |
1032 | #endif | |
1033 | set_bit(MP_ISA_BUS, mp_bus_not_pci); | |
cfc1b9a6 | 1034 | pr_debug("Bus #%d is ISA\n", MP_ISA_BUS); |
11113f84 | 1035 | |
d49c4288 | 1036 | #ifdef CONFIG_X86_ES7000 |
11113f84 AS |
1037 | /* |
1038 | * Older generations of ES7000 have no legacy identity mappings | |
1039 | */ | |
1040 | if (es7000_plat == 1) | |
1041 | return; | |
1042 | #endif | |
1043 | ||
1044 | /* | |
1045 | * Locate the IOAPIC that manages the ISA IRQs (0-15). | |
1046 | */ | |
1047 | ioapic = mp_find_ioapic(0); | |
1048 | if (ioapic < 0) | |
1049 | return; | |
6df8809b | 1050 | dstapic = mp_ioapics[ioapic].mp_apicid; |
11113f84 | 1051 | |
11113f84 AS |
1052 | /* |
1053 | * Use the default configuration for the IRQs 0-15. Unless | |
1054 | * overridden by (MADT) interrupt source override entries. | |
1055 | */ | |
1056 | for (i = 0; i < 16; i++) { | |
1057 | int idx; | |
1058 | ||
1059 | for (idx = 0; idx < mp_irq_entries; idx++) { | |
2fddb6e2 | 1060 | struct mp_config_intsrc *irq = mp_irqs + idx; |
11113f84 AS |
1061 | |
1062 | /* Do we already have a mapping for this ISA IRQ? */ | |
2fddb6e2 AS |
1063 | if (irq->mp_srcbus == MP_ISA_BUS |
1064 | && irq->mp_srcbusirq == i) | |
11113f84 AS |
1065 | break; |
1066 | ||
1067 | /* Do we already have a mapping for this IOAPIC pin */ | |
6df8809b YL |
1068 | if (irq->mp_dstapic == dstapic && |
1069 | irq->mp_dstirq == i) | |
11113f84 AS |
1070 | break; |
1071 | } | |
1072 | ||
1073 | if (idx != mp_irq_entries) { | |
1074 | printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i); | |
1075 | continue; /* IRQ already used */ | |
1076 | } | |
1077 | ||
fcfa146e YL |
1078 | mp_irq.mp_type = MP_INTSRC; |
1079 | mp_irq.mp_irqflag = 0; /* Conforming */ | |
1080 | mp_irq.mp_srcbus = MP_ISA_BUS; | |
1081 | mp_irq.mp_dstapic = dstapic; | |
1082 | mp_irq.mp_irqtype = mp_INT; | |
1083 | mp_irq.mp_srcbusirq = i; /* Identity mapped */ | |
1084 | mp_irq.mp_dstirq = i; | |
11113f84 | 1085 | |
fcfa146e | 1086 | save_mp_irq(&mp_irq); |
11113f84 AS |
1087 | } |
1088 | } | |
1089 | ||
1090 | int mp_register_gsi(u32 gsi, int triggering, int polarity) | |
1091 | { | |
1092 | int ioapic; | |
1093 | int ioapic_pin; | |
1094 | #ifdef CONFIG_X86_32 | |
1095 | #define MAX_GSI_NUM 4096 | |
1096 | #define IRQ_COMPRESSION_START 64 | |
1097 | ||
1098 | static int pci_irq = IRQ_COMPRESSION_START; | |
1099 | /* | |
1100 | * Mapping between Global System Interrupts, which | |
1101 | * represent all possible interrupts, and IRQs | |
1102 | * assigned to actual devices. | |
1103 | */ | |
1104 | static int gsi_to_irq[MAX_GSI_NUM]; | |
1105 | #else | |
1106 | ||
1107 | if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) | |
1108 | return gsi; | |
1109 | #endif | |
1110 | ||
1111 | /* Don't set up the ACPI SCI because it's already set up */ | |
1112 | if (acpi_gbl_FADT.sci_interrupt == gsi) | |
1113 | return gsi; | |
1114 | ||
1115 | ioapic = mp_find_ioapic(gsi); | |
1116 | if (ioapic < 0) { | |
1117 | printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi); | |
1118 | return gsi; | |
1119 | } | |
1120 | ||
1121 | ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
1122 | ||
1123 | #ifdef CONFIG_X86_32 | |
1124 | if (ioapic_renumber_irq) | |
1125 | gsi = ioapic_renumber_irq(ioapic, gsi); | |
1126 | #endif | |
1127 | ||
1128 | /* | |
1129 | * Avoid pin reprogramming. PRTs typically include entries | |
1130 | * with redundant pin->gsi mappings (but unique PCI devices); | |
1131 | * we only program the IOAPIC on the first. | |
1132 | */ | |
1133 | if (ioapic_pin > MP_MAX_IOAPIC_PIN) { | |
1134 | printk(KERN_ERR "Invalid reference to IOAPIC pin " | |
1135 | "%d-%d\n", mp_ioapic_routing[ioapic].apic_id, | |
1136 | ioapic_pin); | |
1137 | return gsi; | |
1138 | } | |
1139 | if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) { | |
55410791 | 1140 | pr_debug("Pin %d-%d already programmed\n", |
cfc1b9a6 | 1141 | mp_ioapic_routing[ioapic].apic_id, ioapic_pin); |
11113f84 AS |
1142 | #ifdef CONFIG_X86_32 |
1143 | return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]); | |
1144 | #else | |
1145 | return gsi; | |
1146 | #endif | |
1147 | } | |
1148 | ||
1149 | set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed); | |
1150 | #ifdef CONFIG_X86_32 | |
1151 | /* | |
1152 | * For GSI >= 64, use IRQ compression | |
1153 | */ | |
1154 | if ((gsi >= IRQ_COMPRESSION_START) | |
1155 | && (triggering == ACPI_LEVEL_SENSITIVE)) { | |
1156 | /* | |
1157 | * For PCI devices assign IRQs in order, avoiding gaps | |
1158 | * due to unused I/O APIC pins. | |
1159 | */ | |
1160 | int irq = gsi; | |
1161 | if (gsi < MAX_GSI_NUM) { | |
1162 | /* | |
1163 | * Retain the VIA chipset work-around (gsi > 15), but | |
1164 | * avoid a problem where the 8254 timer (IRQ0) is setup | |
1165 | * via an override (so it's not on pin 0 of the ioapic), | |
1166 | * and at the same time, the pin 0 interrupt is a PCI | |
1167 | * type. The gsi > 15 test could cause these two pins | |
1168 | * to be shared as IRQ0, and they are not shareable. | |
1169 | * So test for this condition, and if necessary, avoid | |
1170 | * the pin collision. | |
1171 | */ | |
1172 | gsi = pci_irq++; | |
1173 | /* | |
1174 | * Don't assign IRQ used by ACPI SCI | |
1175 | */ | |
1176 | if (gsi == acpi_gbl_FADT.sci_interrupt) | |
1177 | gsi = pci_irq++; | |
1178 | gsi_to_irq[irq] = gsi; | |
1179 | } else { | |
1180 | printk(KERN_ERR "GSI %u is too high\n", gsi); | |
1181 | return gsi; | |
1182 | } | |
1183 | } | |
1184 | #endif | |
1185 | io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, | |
1186 | triggering == ACPI_EDGE_SENSITIVE ? 0 : 1, | |
1187 | polarity == ACPI_ACTIVE_HIGH ? 0 : 1); | |
1188 | return gsi; | |
1189 | } | |
1190 | ||
2944e16b YL |
1191 | int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, |
1192 | u32 gsi, int triggering, int polarity) | |
1193 | { | |
fcfa146e YL |
1194 | #ifdef CONFIG_X86_MPPARSE |
1195 | struct mp_config_intsrc mp_irq; | |
2944e16b YL |
1196 | int ioapic; |
1197 | ||
fcfa146e | 1198 | if (!acpi_ioapic) |
d867e531 YL |
1199 | return 0; |
1200 | ||
2944e16b | 1201 | /* print the entry should happen on mptable identically */ |
fcfa146e YL |
1202 | mp_irq.mp_type = MP_INTSRC; |
1203 | mp_irq.mp_irqtype = mp_INT; | |
1204 | mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | | |
2944e16b | 1205 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); |
fcfa146e YL |
1206 | mp_irq.mp_srcbus = number; |
1207 | mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); | |
2944e16b | 1208 | ioapic = mp_find_ioapic(gsi); |
fcfa146e YL |
1209 | mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id; |
1210 | mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
2944e16b | 1211 | |
fcfa146e YL |
1212 | save_mp_irq(&mp_irq); |
1213 | #endif | |
2944e16b YL |
1214 | return 0; |
1215 | } | |
1216 | ||
1da177e4 LT |
1217 | /* |
1218 | * Parse IOAPIC related entries in MADT | |
1219 | * returns 0 on success, < 0 on error | |
1220 | */ | |
4be44fcd | 1221 | static int __init acpi_parse_madt_ioapic_entries(void) |
1da177e4 LT |
1222 | { |
1223 | int count; | |
1224 | ||
1225 | /* | |
1226 | * ACPI interpreter is required to complete interrupt setup, | |
1227 | * so if it is off, don't enumerate the io-apics with ACPI. | |
1228 | * If MPS is present, it will handle them, | |
1229 | * otherwise the system will stay in PIC mode | |
1230 | */ | |
1231 | if (acpi_disabled || acpi_noirq) { | |
1232 | return -ENODEV; | |
4be44fcd | 1233 | } |
1da177e4 | 1234 | |
5f3b1a8b | 1235 | if (!cpu_has_apic) |
d3b6a349 AK |
1236 | return -ENODEV; |
1237 | ||
1da177e4 | 1238 | /* |
4be44fcd | 1239 | * if "noapic" boot option, don't look for IO-APICs |
1da177e4 LT |
1240 | */ |
1241 | if (skip_ioapic_setup) { | |
1242 | printk(KERN_INFO PREFIX "Skipping IOAPIC probe " | |
4be44fcd | 1243 | "due to 'noapic' option.\n"); |
1da177e4 LT |
1244 | return -ENODEV; |
1245 | } | |
1246 | ||
4be44fcd | 1247 | count = |
5f3b1a8b | 1248 | acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic, |
4be44fcd | 1249 | MAX_IO_APICS); |
1da177e4 LT |
1250 | if (!count) { |
1251 | printk(KERN_ERR PREFIX "No IOAPIC entries present\n"); | |
1252 | return -ENODEV; | |
4be44fcd | 1253 | } else if (count < 0) { |
1da177e4 LT |
1254 | printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n"); |
1255 | return count; | |
1256 | } | |
1257 | ||
4be44fcd | 1258 | count = |
5f3b1a8b | 1259 | acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, acpi_parse_int_src_ovr, |
71f521bb | 1260 | nr_irqs); |
1da177e4 | 1261 | if (count < 0) { |
4be44fcd LB |
1262 | printk(KERN_ERR PREFIX |
1263 | "Error parsing interrupt source overrides entry\n"); | |
1da177e4 LT |
1264 | /* TBD: Cleanup to allow fallback to MPS */ |
1265 | return count; | |
1266 | } | |
1267 | ||
1268 | /* | |
1269 | * If BIOS did not supply an INT_SRC_OVR for the SCI | |
1270 | * pretend we got one so we can set the SCI flags. | |
1271 | */ | |
1272 | if (!acpi_sci_override_gsi) | |
cee324b1 | 1273 | acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0); |
1da177e4 LT |
1274 | |
1275 | /* Fill in identity legacy mapings where no override */ | |
1276 | mp_config_acpi_legacy_irqs(); | |
1277 | ||
4be44fcd | 1278 | count = |
5f3b1a8b | 1279 | acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, acpi_parse_nmi_src, |
71f521bb | 1280 | nr_irqs); |
1da177e4 LT |
1281 | if (count < 0) { |
1282 | printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n"); | |
1283 | /* TBD: Cleanup to allow fallback to MPS */ | |
1284 | return count; | |
1285 | } | |
1286 | ||
1287 | return 0; | |
1288 | } | |
1289 | #else | |
1290 | static inline int acpi_parse_madt_ioapic_entries(void) | |
1291 | { | |
1292 | return -1; | |
1293 | } | |
8466361a | 1294 | #endif /* !CONFIG_X86_IO_APIC */ |
1da177e4 | 1295 | |
cbf9bd60 YL |
1296 | static void __init early_acpi_process_madt(void) |
1297 | { | |
1298 | #ifdef CONFIG_X86_LOCAL_APIC | |
1299 | int error; | |
1300 | ||
1301 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { | |
1302 | ||
1303 | /* | |
1304 | * Parse MADT LAPIC entries | |
1305 | */ | |
1306 | error = early_acpi_parse_madt_lapic_addr_ovr(); | |
1307 | if (!error) { | |
1308 | acpi_lapic = 1; | |
1309 | smp_found_config = 1; | |
1310 | } | |
1311 | if (error == -EINVAL) { | |
1312 | /* | |
1313 | * Dell Precision Workstation 410, 610 come here. | |
1314 | */ | |
1315 | printk(KERN_ERR PREFIX | |
1316 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1317 | disable_acpi(); | |
1318 | } | |
1319 | } | |
1320 | #endif | |
1321 | } | |
1322 | ||
4be44fcd | 1323 | static void __init acpi_process_madt(void) |
1da177e4 LT |
1324 | { |
1325 | #ifdef CONFIG_X86_LOCAL_APIC | |
7f8f97c3 | 1326 | int error; |
1da177e4 | 1327 | |
7f8f97c3 | 1328 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { |
1da177e4 LT |
1329 | |
1330 | /* | |
1331 | * Parse MADT LAPIC entries | |
1332 | */ | |
1333 | error = acpi_parse_madt_lapic_entries(); | |
1334 | if (!error) { | |
1335 | acpi_lapic = 1; | |
1336 | ||
911a62d4 VP |
1337 | #ifdef CONFIG_X86_GENERICARCH |
1338 | generic_bigsmp_probe(); | |
1339 | #endif | |
1da177e4 LT |
1340 | /* |
1341 | * Parse MADT IO-APIC entries | |
1342 | */ | |
1343 | error = acpi_parse_madt_ioapic_entries(); | |
1344 | if (!error) { | |
1345 | acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC; | |
1da177e4 LT |
1346 | acpi_ioapic = 1; |
1347 | ||
1348 | smp_found_config = 1; | |
6e1cb38a | 1349 | #ifdef CONFIG_X86_32 |
3c43f039 | 1350 | setup_apic_routing(); |
6e1cb38a | 1351 | #endif |
1da177e4 LT |
1352 | } |
1353 | } | |
1354 | if (error == -EINVAL) { | |
1355 | /* | |
1356 | * Dell Precision Workstation 410, 610 come here. | |
1357 | */ | |
4be44fcd LB |
1358 | printk(KERN_ERR PREFIX |
1359 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1da177e4 LT |
1360 | disable_acpi(); |
1361 | } | |
1362 | } | |
69b88afa YL |
1363 | |
1364 | /* | |
1365 | * ACPI supports both logical (e.g. Hyper-Threading) and physical | |
1366 | * processors, where MPS only supports physical. | |
1367 | */ | |
1368 | if (acpi_lapic && acpi_ioapic) | |
1369 | printk(KERN_INFO "Using ACPI (MADT) for SMP configuration " | |
1370 | "information\n"); | |
1371 | else if (acpi_lapic) | |
1372 | printk(KERN_INFO "Using ACPI for processor (LAPIC) " | |
1373 | "configuration information\n"); | |
1da177e4 LT |
1374 | #endif |
1375 | return; | |
1376 | } | |
1377 | ||
1855256c | 1378 | static int __init disable_acpi_irq(const struct dmi_system_id *d) |
aea00143 AP |
1379 | { |
1380 | if (!acpi_force) { | |
1381 | printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n", | |
1382 | d->ident); | |
1383 | acpi_noirq_set(); | |
1384 | } | |
1385 | return 0; | |
1386 | } | |
1387 | ||
1855256c | 1388 | static int __init disable_acpi_pci(const struct dmi_system_id *d) |
aea00143 AP |
1389 | { |
1390 | if (!acpi_force) { | |
1391 | printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n", | |
1392 | d->ident); | |
1393 | acpi_disable_pci(); | |
1394 | } | |
1395 | return 0; | |
1396 | } | |
aea00143 | 1397 | |
1855256c | 1398 | static int __init dmi_disable_acpi(const struct dmi_system_id *d) |
aea00143 AP |
1399 | { |
1400 | if (!acpi_force) { | |
4be44fcd | 1401 | printk(KERN_NOTICE "%s detected: acpi off\n", d->ident); |
aea00143 AP |
1402 | disable_acpi(); |
1403 | } else { | |
1404 | printk(KERN_NOTICE | |
1405 | "Warning: DMI blacklist says broken, but acpi forced\n"); | |
1406 | } | |
1407 | return 0; | |
1408 | } | |
1409 | ||
1410 | /* | |
1411 | * Limit ACPI to CPU enumeration for HT | |
1412 | */ | |
1855256c | 1413 | static int __init force_acpi_ht(const struct dmi_system_id *d) |
aea00143 AP |
1414 | { |
1415 | if (!acpi_force) { | |
4be44fcd LB |
1416 | printk(KERN_NOTICE "%s detected: force use of acpi=ht\n", |
1417 | d->ident); | |
aea00143 AP |
1418 | disable_acpi(); |
1419 | acpi_ht = 1; | |
1420 | } else { | |
1421 | printk(KERN_NOTICE | |
1422 | "Warning: acpi=force overrules DMI blacklist: acpi=ht\n"); | |
1423 | } | |
1424 | return 0; | |
1425 | } | |
1426 | ||
e2079c43 RW |
1427 | /* |
1428 | * Force ignoring BIOS IRQ0 pin2 override | |
1429 | */ | |
1430 | static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) | |
1431 | { | |
8d89adf4 IM |
1432 | /* |
1433 | * The ati_ixp4x0_rev() early PCI quirk should have set | |
1434 | * the acpi_skip_timer_override flag already: | |
1435 | */ | |
1436 | if (!acpi_skip_timer_override) { | |
1437 | WARN(1, KERN_ERR "ati_ixp4x0 quirk not complete.\n"); | |
1438 | pr_notice("%s detected: Ignoring BIOS IRQ0 pin2 override\n", | |
1439 | d->ident); | |
1440 | acpi_skip_timer_override = 1; | |
1441 | } | |
e2079c43 RW |
1442 | return 0; |
1443 | } | |
1444 | ||
aea00143 AP |
1445 | /* |
1446 | * If your system is blacklisted here, but you find that acpi=force | |
1447 | * works for you, please contact acpi-devel@sourceforge.net | |
1448 | */ | |
1449 | static struct dmi_system_id __initdata acpi_dmi_table[] = { | |
1450 | /* | |
1451 | * Boxes that need ACPI disabled | |
1452 | */ | |
1453 | { | |
4be44fcd LB |
1454 | .callback = dmi_disable_acpi, |
1455 | .ident = "IBM Thinkpad", | |
1456 | .matches = { | |
1457 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1458 | DMI_MATCH(DMI_BOARD_NAME, "2629H1G"), | |
1459 | }, | |
1460 | }, | |
aea00143 AP |
1461 | |
1462 | /* | |
1463 | * Boxes that need acpi=ht | |
1464 | */ | |
1465 | { | |
4be44fcd LB |
1466 | .callback = force_acpi_ht, |
1467 | .ident = "FSC Primergy T850", | |
1468 | .matches = { | |
1469 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), | |
1470 | DMI_MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"), | |
1471 | }, | |
1472 | }, | |
aea00143 | 1473 | { |
4be44fcd LB |
1474 | .callback = force_acpi_ht, |
1475 | .ident = "HP VISUALIZE NT Workstation", | |
1476 | .matches = { | |
1477 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
1478 | DMI_MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"), | |
1479 | }, | |
1480 | }, | |
aea00143 | 1481 | { |
4be44fcd LB |
1482 | .callback = force_acpi_ht, |
1483 | .ident = "Compaq Workstation W8000", | |
1484 | .matches = { | |
1485 | DMI_MATCH(DMI_SYS_VENDOR, "Compaq"), | |
1486 | DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"), | |
1487 | }, | |
1488 | }, | |
aea00143 | 1489 | { |
4be44fcd LB |
1490 | .callback = force_acpi_ht, |
1491 | .ident = "ASUS P4B266", | |
1492 | .matches = { | |
1493 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1494 | DMI_MATCH(DMI_BOARD_NAME, "P4B266"), | |
1495 | }, | |
1496 | }, | |
aea00143 | 1497 | { |
4be44fcd LB |
1498 | .callback = force_acpi_ht, |
1499 | .ident = "ASUS P2B-DS", | |
1500 | .matches = { | |
1501 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1502 | DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"), | |
1503 | }, | |
1504 | }, | |
aea00143 | 1505 | { |
4be44fcd LB |
1506 | .callback = force_acpi_ht, |
1507 | .ident = "ASUS CUR-DLS", | |
1508 | .matches = { | |
1509 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1510 | DMI_MATCH(DMI_BOARD_NAME, "CUR-DLS"), | |
1511 | }, | |
1512 | }, | |
aea00143 | 1513 | { |
4be44fcd LB |
1514 | .callback = force_acpi_ht, |
1515 | .ident = "ABIT i440BX-W83977", | |
1516 | .matches = { | |
1517 | DMI_MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"), | |
1518 | DMI_MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"), | |
1519 | }, | |
1520 | }, | |
aea00143 | 1521 | { |
4be44fcd LB |
1522 | .callback = force_acpi_ht, |
1523 | .ident = "IBM Bladecenter", | |
1524 | .matches = { | |
1525 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1526 | DMI_MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"), | |
1527 | }, | |
1528 | }, | |
aea00143 | 1529 | { |
4be44fcd LB |
1530 | .callback = force_acpi_ht, |
1531 | .ident = "IBM eServer xSeries 360", | |
1532 | .matches = { | |
1533 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1534 | DMI_MATCH(DMI_BOARD_NAME, "eServer xSeries 360"), | |
1535 | }, | |
1536 | }, | |
aea00143 | 1537 | { |
4be44fcd LB |
1538 | .callback = force_acpi_ht, |
1539 | .ident = "IBM eserver xSeries 330", | |
1540 | .matches = { | |
1541 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1542 | DMI_MATCH(DMI_BOARD_NAME, "eserver xSeries 330"), | |
1543 | }, | |
1544 | }, | |
aea00143 | 1545 | { |
4be44fcd LB |
1546 | .callback = force_acpi_ht, |
1547 | .ident = "IBM eserver xSeries 440", | |
1548 | .matches = { | |
1549 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1550 | DMI_MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"), | |
1551 | }, | |
1552 | }, | |
aea00143 | 1553 | |
aea00143 AP |
1554 | /* |
1555 | * Boxes that need ACPI PCI IRQ routing disabled | |
1556 | */ | |
1557 | { | |
4be44fcd LB |
1558 | .callback = disable_acpi_irq, |
1559 | .ident = "ASUS A7V", | |
1560 | .matches = { | |
1561 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"), | |
1562 | DMI_MATCH(DMI_BOARD_NAME, "<A7V>"), | |
1563 | /* newer BIOS, Revision 1011, does work */ | |
1564 | DMI_MATCH(DMI_BIOS_VERSION, | |
1565 | "ASUS A7V ACPI BIOS Revision 1007"), | |
1566 | }, | |
1567 | }, | |
74586fca LB |
1568 | { |
1569 | /* | |
1570 | * Latest BIOS for IBM 600E (1.16) has bad pcinum | |
1571 | * for LPC bridge, which is needed for the PCI | |
1572 | * interrupt links to work. DSDT fix is in bug 5966. | |
1573 | * 2645, 2646 model numbers are shared with 600/600E/600X | |
1574 | */ | |
1575 | .callback = disable_acpi_irq, | |
1576 | .ident = "IBM Thinkpad 600 Series 2645", | |
1577 | .matches = { | |
1578 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1579 | DMI_MATCH(DMI_BOARD_NAME, "2645"), | |
1580 | }, | |
1581 | }, | |
1582 | { | |
1583 | .callback = disable_acpi_irq, | |
1584 | .ident = "IBM Thinkpad 600 Series 2646", | |
1585 | .matches = { | |
1586 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1587 | DMI_MATCH(DMI_BOARD_NAME, "2646"), | |
1588 | }, | |
1589 | }, | |
aea00143 AP |
1590 | /* |
1591 | * Boxes that need ACPI PCI IRQ routing and PCI scan disabled | |
1592 | */ | |
4be44fcd LB |
1593 | { /* _BBN 0 bug */ |
1594 | .callback = disable_acpi_pci, | |
1595 | .ident = "ASUS PR-DLS", | |
1596 | .matches = { | |
1597 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1598 | DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"), | |
1599 | DMI_MATCH(DMI_BIOS_VERSION, | |
1600 | "ASUS PR-DLS ACPI BIOS Revision 1010"), | |
1601 | DMI_MATCH(DMI_BIOS_DATE, "03/21/2003") | |
1602 | }, | |
1603 | }, | |
aea00143 | 1604 | { |
4be44fcd LB |
1605 | .callback = disable_acpi_pci, |
1606 | .ident = "Acer TravelMate 36x Laptop", | |
1607 | .matches = { | |
1608 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), | |
1609 | DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"), | |
1610 | }, | |
1611 | }, | |
35af2821 AH |
1612 | {} |
1613 | }; | |
1614 | ||
1615 | /* second table for DMI checks that should run after early-quirks */ | |
1616 | static struct dmi_system_id __initdata acpi_dmi_table_late[] = { | |
e2079c43 RW |
1617 | /* |
1618 | * HP laptops which use a DSDT reporting as HP/SB400/10000, | |
1619 | * which includes some code which overrides all temperature | |
1620 | * trip points to 16C if the INTIN2 input of the I/O APIC | |
1621 | * is enabled. This input is incorrectly designated the | |
1622 | * ISA IRQ 0 via an interrupt source override even though | |
1623 | * it is wired to the output of the master 8259A and INTIN0 | |
1624 | * is not connected at all. Force ignoring BIOS IRQ0 pin2 | |
1625 | * override in that cases. | |
1626 | */ | |
e84956f9 RW |
1627 | { |
1628 | .callback = dmi_ignore_irq0_timer_override, | |
1629 | .ident = "HP nx6115 laptop", | |
1630 | .matches = { | |
1631 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1632 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6115"), | |
1633 | }, | |
1634 | }, | |
e2079c43 RW |
1635 | { |
1636 | .callback = dmi_ignore_irq0_timer_override, | |
1637 | .ident = "HP NX6125 laptop", | |
1638 | .matches = { | |
1639 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1640 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"), | |
1641 | }, | |
1642 | }, | |
1643 | { | |
1644 | .callback = dmi_ignore_irq0_timer_override, | |
1645 | .ident = "HP NX6325 laptop", | |
1646 | .matches = { | |
1647 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1648 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), | |
1649 | }, | |
1650 | }, | |
e84956f9 RW |
1651 | { |
1652 | .callback = dmi_ignore_irq0_timer_override, | |
1653 | .ident = "HP 6715b laptop", | |
1654 | .matches = { | |
1655 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1656 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b"), | |
1657 | }, | |
1658 | }, | |
4be44fcd | 1659 | {} |
aea00143 AP |
1660 | }; |
1661 | ||
1da177e4 LT |
1662 | /* |
1663 | * acpi_boot_table_init() and acpi_boot_init() | |
1664 | * called from setup_arch(), always. | |
1665 | * 1. checksums all tables | |
1666 | * 2. enumerates lapics | |
1667 | * 3. enumerates io-apics | |
1668 | * | |
1669 | * acpi_table_init() is separate to allow reading SRAT without | |
1670 | * other side effects. | |
1671 | * | |
1672 | * side effects of acpi_boot_init: | |
1673 | * acpi_lapic = 1 if LAPIC found | |
1674 | * acpi_ioapic = 1 if IOAPIC found | |
1675 | * if (acpi_lapic && acpi_ioapic) smp_found_config = 1; | |
1676 | * if acpi_blacklisted() acpi_disabled = 1; | |
1677 | * acpi_irq_model=... | |
1678 | * ... | |
1679 | * | |
1680 | * return value: (currently ignored) | |
1681 | * 0: success | |
1682 | * !0: failure | |
1683 | */ | |
1684 | ||
4be44fcd | 1685 | int __init acpi_boot_table_init(void) |
1da177e4 LT |
1686 | { |
1687 | int error; | |
1688 | ||
aea00143 | 1689 | dmi_check_system(acpi_dmi_table); |
aea00143 | 1690 | |
1da177e4 LT |
1691 | /* |
1692 | * If acpi_disabled, bail out | |
1693 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1694 | */ | |
1695 | if (acpi_disabled && !acpi_ht) | |
4be44fcd | 1696 | return 1; |
1da177e4 | 1697 | |
5f3b1a8b | 1698 | /* |
1da177e4 LT |
1699 | * Initialize the ACPI boot-time table parser. |
1700 | */ | |
1701 | error = acpi_table_init(); | |
1702 | if (error) { | |
1703 | disable_acpi(); | |
1704 | return error; | |
1705 | } | |
1da177e4 | 1706 | |
5f3b1a8b | 1707 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1708 | |
1709 | /* | |
1710 | * blacklist may disable ACPI entirely | |
1711 | */ | |
1712 | error = acpi_blacklisted(); | |
1713 | if (error) { | |
1da177e4 LT |
1714 | if (acpi_force) { |
1715 | printk(KERN_WARNING PREFIX "acpi=force override\n"); | |
1716 | } else { | |
1717 | printk(KERN_WARNING PREFIX "Disabling ACPI support\n"); | |
1718 | disable_acpi(); | |
1719 | return error; | |
1720 | } | |
1721 | } | |
cbf9bd60 YL |
1722 | |
1723 | return 0; | |
1724 | } | |
1725 | ||
1726 | int __init early_acpi_boot_init(void) | |
1727 | { | |
1728 | /* | |
1729 | * If acpi_disabled, bail out | |
1730 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1731 | */ | |
1732 | if (acpi_disabled && !acpi_ht) | |
1733 | return 1; | |
1734 | ||
1735 | /* | |
1736 | * Process the Multiple APIC Description Table (MADT), if present | |
1737 | */ | |
1738 | early_acpi_process_madt(); | |
1da177e4 LT |
1739 | |
1740 | return 0; | |
1741 | } | |
1742 | ||
1da177e4 LT |
1743 | int __init acpi_boot_init(void) |
1744 | { | |
35af2821 AH |
1745 | /* those are executed after early-quirks are executed */ |
1746 | dmi_check_system(acpi_dmi_table_late); | |
1747 | ||
1da177e4 LT |
1748 | /* |
1749 | * If acpi_disabled, bail out | |
1750 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1751 | */ | |
1752 | if (acpi_disabled && !acpi_ht) | |
4be44fcd | 1753 | return 1; |
1da177e4 | 1754 | |
5f3b1a8b | 1755 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1756 | |
1757 | /* | |
1758 | * set sci_int and PM timer address | |
1759 | */ | |
ceb6c468 | 1760 | acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt); |
1da177e4 LT |
1761 | |
1762 | /* | |
1763 | * Process the Multiple APIC Description Table (MADT), if present | |
1764 | */ | |
1765 | acpi_process_madt(); | |
1766 | ||
5f3b1a8b | 1767 | acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet); |
1da177e4 LT |
1768 | |
1769 | return 0; | |
1770 | } | |
1a3f239d RR |
1771 | |
1772 | static int __init parse_acpi(char *arg) | |
1773 | { | |
1774 | if (!arg) | |
1775 | return -EINVAL; | |
1776 | ||
1777 | /* "acpi=off" disables both ACPI table parsing and interpreter */ | |
1778 | if (strcmp(arg, "off") == 0) { | |
1779 | disable_acpi(); | |
1780 | } | |
1781 | /* acpi=force to over-ride black-list */ | |
1782 | else if (strcmp(arg, "force") == 0) { | |
1783 | acpi_force = 1; | |
1784 | acpi_ht = 1; | |
1785 | acpi_disabled = 0; | |
1786 | } | |
1787 | /* acpi=strict disables out-of-spec workarounds */ | |
1788 | else if (strcmp(arg, "strict") == 0) { | |
1789 | acpi_strict = 1; | |
1790 | } | |
1791 | /* Limit ACPI just to boot-time to enable HT */ | |
1792 | else if (strcmp(arg, "ht") == 0) { | |
1793 | if (!acpi_force) | |
1794 | disable_acpi(); | |
1795 | acpi_ht = 1; | |
1796 | } | |
1797 | /* "acpi=noirq" disables ACPI interrupt routing */ | |
1798 | else if (strcmp(arg, "noirq") == 0) { | |
1799 | acpi_noirq_set(); | |
1800 | } else { | |
1801 | /* Core will printk when we return error. */ | |
1802 | return -EINVAL; | |
1803 | } | |
1804 | return 0; | |
1805 | } | |
1806 | early_param("acpi", parse_acpi); | |
1807 | ||
1808 | /* FIXME: Using pci= for an ACPI parameter is a travesty. */ | |
1809 | static int __init parse_pci(char *arg) | |
1810 | { | |
1811 | if (arg && strcmp(arg, "noacpi") == 0) | |
1812 | acpi_disable_pci(); | |
1813 | return 0; | |
1814 | } | |
1815 | early_param("pci", parse_pci); | |
1816 | ||
3c999f14 YL |
1817 | int __init acpi_mps_check(void) |
1818 | { | |
1819 | #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE) | |
1820 | /* mptable code is not built-in*/ | |
1821 | if (acpi_disabled || acpi_noirq) { | |
1822 | printk(KERN_WARNING "MPS support code is not built-in.\n" | |
1823 | "Using acpi=off or acpi=noirq or pci=noacpi " | |
1824 | "may have problem\n"); | |
1825 | return 1; | |
1826 | } | |
1827 | #endif | |
1828 | return 0; | |
1829 | } | |
1830 | ||
1a3f239d RR |
1831 | #ifdef CONFIG_X86_IO_APIC |
1832 | static int __init parse_acpi_skip_timer_override(char *arg) | |
1833 | { | |
1834 | acpi_skip_timer_override = 1; | |
1835 | return 0; | |
1836 | } | |
1837 | early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override); | |
fa18f477 AK |
1838 | |
1839 | static int __init parse_acpi_use_timer_override(char *arg) | |
1840 | { | |
1841 | acpi_use_timer_override = 1; | |
1842 | return 0; | |
1843 | } | |
1844 | early_param("acpi_use_timer_override", parse_acpi_use_timer_override); | |
1a3f239d RR |
1845 | #endif /* CONFIG_X86_IO_APIC */ |
1846 | ||
1847 | static int __init setup_acpi_sci(char *s) | |
1848 | { | |
1849 | if (!s) | |
1850 | return -EINVAL; | |
1851 | if (!strcmp(s, "edge")) | |
5f3b1a8b AS |
1852 | acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE | |
1853 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1854 | else if (!strcmp(s, "level")) |
5f3b1a8b AS |
1855 | acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL | |
1856 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1857 | else if (!strcmp(s, "high")) |
5f3b1a8b AS |
1858 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH | |
1859 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d | 1860 | else if (!strcmp(s, "low")) |
5f3b1a8b AS |
1861 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW | |
1862 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d RR |
1863 | else |
1864 | return -EINVAL; | |
1865 | return 0; | |
1866 | } | |
1867 | early_param("acpi_sci", setup_acpi_sci); | |
d0a9081b AM |
1868 | |
1869 | int __acpi_acquire_global_lock(unsigned int *lock) | |
1870 | { | |
1871 | unsigned int old, new, val; | |
1872 | do { | |
1873 | old = *lock; | |
1874 | new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1)); | |
1875 | val = cmpxchg(lock, old, new); | |
1876 | } while (unlikely (val != old)); | |
1877 | return (new < 3) ? -1 : 0; | |
1878 | } | |
1879 | ||
1880 | int __acpi_release_global_lock(unsigned int *lock) | |
1881 | { | |
1882 | unsigned int old, new, val; | |
1883 | do { | |
1884 | old = *lock; | |
1885 | new = old & ~0x3; | |
1886 | val = cmpxchg(lock, old, new); | |
1887 | } while (unlikely (val != old)); | |
1888 | return old & 0x1; | |
1889 | } |