]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * boot.c - Architecture-Specific Low-Level ACPI Boot Support | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
5 | * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com> | |
6 | * | |
7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
24 | */ | |
25 | ||
26 | #include <linux/init.h> | |
1da177e4 | 27 | #include <linux/acpi.h> |
d66bea57 | 28 | #include <linux/acpi_pmtmr.h> |
1da177e4 | 29 | #include <linux/efi.h> |
73fea175 | 30 | #include <linux/cpumask.h> |
1da177e4 | 31 | #include <linux/module.h> |
aea00143 | 32 | #include <linux/dmi.h> |
b33fa1f3 | 33 | #include <linux/irq.h> |
f0f4c343 AD |
34 | #include <linux/bootmem.h> |
35 | #include <linux/ioport.h> | |
1da177e4 LT |
36 | |
37 | #include <asm/pgtable.h> | |
38 | #include <asm/io_apic.h> | |
39 | #include <asm/apic.h> | |
183fe065 | 40 | #include <asm/genapic.h> |
1da177e4 | 41 | #include <asm/io.h> |
1da177e4 | 42 | #include <asm/mpspec.h> |
dfac2189 | 43 | #include <asm/smp.h> |
1da177e4 | 44 | |
f6bc4029 GOC |
45 | #ifdef CONFIG_X86_LOCAL_APIC |
46 | # include <mach_apic.h> | |
47 | #endif | |
48 | ||
e8924acb | 49 | static int __initdata acpi_force = 0; |
1a3f239d | 50 | |
df3bb57d AK |
51 | #ifdef CONFIG_ACPI |
52 | int acpi_disabled = 0; | |
53 | #else | |
54 | int acpi_disabled = 1; | |
55 | #endif | |
56 | EXPORT_SYMBOL(acpi_disabled); | |
57 | ||
1da177e4 LT |
58 | #ifdef CONFIG_X86_64 |
59 | ||
1da177e4 | 60 | #include <asm/proto.h> |
ae261868 | 61 | #include <asm/genapic.h> |
637029c6 | 62 | |
4be44fcd | 63 | #else /* X86 */ |
1da177e4 LT |
64 | |
65 | #ifdef CONFIG_X86_LOCAL_APIC | |
66 | #include <mach_apic.h> | |
67 | #include <mach_mpparse.h> | |
4be44fcd | 68 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 69 | |
4be44fcd | 70 | #endif /* X86 */ |
1da177e4 LT |
71 | |
72 | #define BAD_MADT_ENTRY(entry, end) ( \ | |
73 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ | |
5f3b1a8b | 74 | ((struct acpi_subtable_header *)entry)->length < sizeof(*entry)) |
1da177e4 LT |
75 | |
76 | #define PREFIX "ACPI: " | |
77 | ||
90d53909 | 78 | int acpi_noirq; /* skip ACPI IRQ initialization */ |
6e4be1ff YL |
79 | int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ |
80 | EXPORT_SYMBOL(acpi_pci_disabled); | |
1da177e4 LT |
81 | int acpi_ht __initdata = 1; /* enable HT */ |
82 | ||
83 | int acpi_lapic; | |
84 | int acpi_ioapic; | |
85 | int acpi_strict; | |
1da177e4 | 86 | |
5f3b1a8b | 87 | u8 acpi_sci_flags __initdata; |
1da177e4 LT |
88 | int acpi_sci_override_gsi __initdata; |
89 | int acpi_skip_timer_override __initdata; | |
fa18f477 | 90 | int acpi_use_timer_override __initdata; |
1da177e4 LT |
91 | |
92 | #ifdef CONFIG_X86_LOCAL_APIC | |
93 | static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; | |
94 | #endif | |
95 | ||
96 | #ifndef __HAVE_ARCH_CMPXCHG | |
97 | #warning ACPI uses CMPXCHG, i486 and later hardware | |
98 | #endif | |
99 | ||
1da177e4 LT |
100 | /* -------------------------------------------------------------------------- |
101 | Boot-time Configuration | |
102 | -------------------------------------------------------------------------- */ | |
103 | ||
104 | /* | |
105 | * The default interrupt routing model is PIC (8259). This gets | |
27b46d76 | 106 | * overridden if IOAPICs are enumerated (below). |
1da177e4 | 107 | */ |
4be44fcd | 108 | enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; |
1da177e4 | 109 | |
1da177e4 LT |
110 | |
111 | /* | |
112 | * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END, | |
113 | * to map the target physical address. The problem is that set_fixmap() | |
114 | * provides a single page, and it is possible that the page is not | |
115 | * sufficient. | |
116 | * By using this area, we can map up to MAX_IO_APICS pages temporarily, | |
117 | * i.e. until the next __va_range() call. | |
118 | * | |
119 | * Important Safety Note: The fixed I/O APIC page numbers are *subtracted* | |
120 | * from the fixed base. That's why we start at FIX_IO_APIC_BASE_END and | |
121 | * count idx down while incrementing the phys address. | |
122 | */ | |
2fdf0741 | 123 | char *__init __acpi_map_table(unsigned long phys, unsigned long size) |
1da177e4 LT |
124 | { |
125 | unsigned long base, offset, mapped_size; | |
126 | int idx; | |
127 | ||
f34fa82b YL |
128 | if (!phys || !size) |
129 | return NULL; | |
130 | ||
f361a450 | 131 | if (phys+size <= (max_low_pfn_mapped << PAGE_SHIFT)) |
4be44fcd | 132 | return __va(phys); |
1da177e4 LT |
133 | |
134 | offset = phys & (PAGE_SIZE - 1); | |
135 | mapped_size = PAGE_SIZE - offset; | |
f34fa82b | 136 | clear_fixmap(FIX_ACPI_END); |
1da177e4 LT |
137 | set_fixmap(FIX_ACPI_END, phys); |
138 | base = fix_to_virt(FIX_ACPI_END); | |
139 | ||
140 | /* | |
141 | * Most cases can be covered by the below. | |
142 | */ | |
143 | idx = FIX_ACPI_END; | |
144 | while (mapped_size < size) { | |
145 | if (--idx < FIX_ACPI_BEGIN) | |
146 | return NULL; /* cannot handle this */ | |
147 | phys += PAGE_SIZE; | |
f34fa82b | 148 | clear_fixmap(idx); |
1da177e4 LT |
149 | set_fixmap(idx, phys); |
150 | mapped_size += PAGE_SIZE; | |
151 | } | |
152 | ||
4be44fcd | 153 | return ((unsigned char *)base + offset); |
1da177e4 | 154 | } |
1da177e4 LT |
155 | |
156 | #ifdef CONFIG_PCI_MMCONFIG | |
54549391 | 157 | /* The physical address of the MMCONFIG aperture. Set from ACPI tables. */ |
15a58ed1 | 158 | struct acpi_mcfg_allocation *pci_mmcfg_config; |
54549391 GKH |
159 | int pci_mmcfg_config_num; |
160 | ||
ceb6c468 | 161 | int __init acpi_parse_mcfg(struct acpi_table_header *header) |
1da177e4 LT |
162 | { |
163 | struct acpi_table_mcfg *mcfg; | |
54549391 GKH |
164 | unsigned long i; |
165 | int config_size; | |
1da177e4 | 166 | |
ceb6c468 | 167 | if (!header) |
1da177e4 LT |
168 | return -EINVAL; |
169 | ||
ceb6c468 | 170 | mcfg = (struct acpi_table_mcfg *)header; |
1da177e4 | 171 | |
54549391 GKH |
172 | /* how many config structures do we have */ |
173 | pci_mmcfg_config_num = 0; | |
ceb6c468 | 174 | i = header->length - sizeof(struct acpi_table_mcfg); |
15a58ed1 | 175 | while (i >= sizeof(struct acpi_mcfg_allocation)) { |
54549391 | 176 | ++pci_mmcfg_config_num; |
15a58ed1 | 177 | i -= sizeof(struct acpi_mcfg_allocation); |
54549391 GKH |
178 | }; |
179 | if (pci_mmcfg_config_num == 0) { | |
180 | printk(KERN_ERR PREFIX "MMCONFIG has no entries\n"); | |
1da177e4 LT |
181 | return -ENODEV; |
182 | } | |
183 | ||
54549391 GKH |
184 | config_size = pci_mmcfg_config_num * sizeof(*pci_mmcfg_config); |
185 | pci_mmcfg_config = kmalloc(config_size, GFP_KERNEL); | |
186 | if (!pci_mmcfg_config) { | |
187 | printk(KERN_WARNING PREFIX | |
188 | "No memory for MCFG config tables\n"); | |
189 | return -ENOMEM; | |
190 | } | |
191 | ||
ad363f80 | 192 | memcpy(pci_mmcfg_config, &mcfg[1], config_size); |
54549391 | 193 | for (i = 0; i < pci_mmcfg_config_num; ++i) { |
15a58ed1 | 194 | if (pci_mmcfg_config[i].address > 0xFFFFFFFF) { |
54549391 GKH |
195 | printk(KERN_ERR PREFIX |
196 | "MMCONFIG not in low 4GB of memory\n"); | |
acc7c2e0 KR |
197 | kfree(pci_mmcfg_config); |
198 | pci_mmcfg_config_num = 0; | |
54549391 GKH |
199 | return -ENODEV; |
200 | } | |
201 | } | |
1da177e4 LT |
202 | |
203 | return 0; | |
204 | } | |
4be44fcd | 205 | #endif /* CONFIG_PCI_MMCONFIG */ |
1da177e4 LT |
206 | |
207 | #ifdef CONFIG_X86_LOCAL_APIC | |
15a58ed1 | 208 | static int __init acpi_parse_madt(struct acpi_table_header *table) |
1da177e4 | 209 | { |
4be44fcd | 210 | struct acpi_table_madt *madt = NULL; |
1da177e4 | 211 | |
15a58ed1 | 212 | if (!cpu_has_apic) |
1da177e4 LT |
213 | return -EINVAL; |
214 | ||
15a58ed1 | 215 | madt = (struct acpi_table_madt *)table; |
1da177e4 LT |
216 | if (!madt) { |
217 | printk(KERN_WARNING PREFIX "Unable to map MADT\n"); | |
218 | return -ENODEV; | |
219 | } | |
220 | ||
ad363f80 AS |
221 | if (madt->address) { |
222 | acpi_lapic_addr = (u64) madt->address; | |
1da177e4 LT |
223 | |
224 | printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n", | |
ad363f80 | 225 | madt->address); |
1da177e4 LT |
226 | } |
227 | ||
228 | acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id); | |
4be44fcd | 229 | |
1da177e4 LT |
230 | return 0; |
231 | } | |
232 | ||
dfac2189 AS |
233 | static void __cpuinit acpi_register_lapic(int id, u8 enabled) |
234 | { | |
fb3bbd6a YL |
235 | unsigned int ver = 0; |
236 | ||
dfac2189 AS |
237 | if (!enabled) { |
238 | ++disabled_cpus; | |
239 | return; | |
240 | } | |
241 | ||
fb3bbd6a YL |
242 | #ifdef CONFIG_X86_32 |
243 | if (boot_cpu_physical_apicid != -1U) | |
244 | ver = apic_version[boot_cpu_physical_apicid]; | |
245 | #endif | |
246 | ||
247 | generic_processor_info(id, ver); | |
dfac2189 AS |
248 | } |
249 | ||
1da177e4 | 250 | static int __init |
5f3b1a8b | 251 | acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 252 | { |
5f3b1a8b | 253 | struct acpi_madt_local_apic *processor = NULL; |
1da177e4 | 254 | |
5f3b1a8b | 255 | processor = (struct acpi_madt_local_apic *)header; |
1da177e4 LT |
256 | |
257 | if (BAD_MADT_ENTRY(processor, end)) | |
258 | return -EINVAL; | |
259 | ||
260 | acpi_table_print_madt_entry(header); | |
261 | ||
7f66ae48 AR |
262 | /* |
263 | * We need to register disabled CPU as well to permit | |
264 | * counting disabled CPUs. This allows us to size | |
265 | * cpus_possible_map more accurately, to permit | |
266 | * to not preallocating memory for all NR_CPUS | |
267 | * when we use CPU hotplug. | |
268 | */ | |
dfac2189 AS |
269 | acpi_register_lapic(processor->id, /* APIC ID */ |
270 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
1da177e4 LT |
271 | |
272 | return 0; | |
273 | } | |
274 | ||
ac049c1d JS |
275 | static int __init |
276 | acpi_parse_sapic(struct acpi_subtable_header *header, const unsigned long end) | |
277 | { | |
278 | struct acpi_madt_local_sapic *processor = NULL; | |
279 | ||
280 | processor = (struct acpi_madt_local_sapic *)header; | |
281 | ||
282 | if (BAD_MADT_ENTRY(processor, end)) | |
283 | return -EINVAL; | |
284 | ||
285 | acpi_table_print_madt_entry(header); | |
286 | ||
dfac2189 AS |
287 | acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */ |
288 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
ac049c1d JS |
289 | |
290 | return 0; | |
291 | } | |
292 | ||
1da177e4 | 293 | static int __init |
5f3b1a8b | 294 | acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header, |
4be44fcd | 295 | const unsigned long end) |
1da177e4 | 296 | { |
5f3b1a8b | 297 | struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL; |
1da177e4 | 298 | |
5f3b1a8b | 299 | lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header; |
1da177e4 LT |
300 | |
301 | if (BAD_MADT_ENTRY(lapic_addr_ovr, end)) | |
302 | return -EINVAL; | |
303 | ||
304 | acpi_lapic_addr = lapic_addr_ovr->address; | |
305 | ||
306 | return 0; | |
307 | } | |
308 | ||
309 | static int __init | |
5f3b1a8b | 310 | acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 311 | { |
5f3b1a8b | 312 | struct acpi_madt_local_apic_nmi *lapic_nmi = NULL; |
1da177e4 | 313 | |
5f3b1a8b | 314 | lapic_nmi = (struct acpi_madt_local_apic_nmi *)header; |
1da177e4 LT |
315 | |
316 | if (BAD_MADT_ENTRY(lapic_nmi, end)) | |
317 | return -EINVAL; | |
318 | ||
319 | acpi_table_print_madt_entry(header); | |
320 | ||
321 | if (lapic_nmi->lint != 1) | |
322 | printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n"); | |
323 | ||
324 | return 0; | |
325 | } | |
326 | ||
4be44fcd | 327 | #endif /*CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 328 | |
8466361a | 329 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 LT |
330 | |
331 | static int __init | |
5f3b1a8b | 332 | acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 333 | { |
5f3b1a8b | 334 | struct acpi_madt_io_apic *ioapic = NULL; |
1da177e4 | 335 | |
5f3b1a8b | 336 | ioapic = (struct acpi_madt_io_apic *)header; |
1da177e4 LT |
337 | |
338 | if (BAD_MADT_ENTRY(ioapic, end)) | |
339 | return -EINVAL; | |
4be44fcd | 340 | |
1da177e4 LT |
341 | acpi_table_print_madt_entry(header); |
342 | ||
4be44fcd LB |
343 | mp_register_ioapic(ioapic->id, |
344 | ioapic->address, ioapic->global_irq_base); | |
345 | ||
1da177e4 LT |
346 | return 0; |
347 | } | |
348 | ||
349 | /* | |
350 | * Parse Interrupt Source Override for the ACPI SCI | |
351 | */ | |
e82c354b | 352 | static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger) |
1da177e4 LT |
353 | { |
354 | if (trigger == 0) /* compatible SCI trigger is level */ | |
355 | trigger = 3; | |
356 | ||
357 | if (polarity == 0) /* compatible SCI polarity is low */ | |
358 | polarity = 3; | |
359 | ||
360 | /* Command-line over-ride via acpi_sci= */ | |
5f3b1a8b AS |
361 | if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) |
362 | trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2; | |
1da177e4 | 363 | |
5f3b1a8b AS |
364 | if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK) |
365 | polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK; | |
1da177e4 LT |
366 | |
367 | /* | |
4be44fcd | 368 | * mp_config_acpi_legacy_irqs() already setup IRQs < 16 |
1da177e4 LT |
369 | * If GSI is < 16, this will update its flags, |
370 | * else it will create a new mp_irqs[] entry. | |
371 | */ | |
7bdd21ce | 372 | mp_override_legacy_irq(gsi, polarity, trigger, gsi); |
1da177e4 LT |
373 | |
374 | /* | |
375 | * stash over-ride to indicate we've been here | |
cee324b1 | 376 | * and for later update of acpi_gbl_FADT |
1da177e4 | 377 | */ |
7bdd21ce | 378 | acpi_sci_override_gsi = gsi; |
1da177e4 LT |
379 | return; |
380 | } | |
381 | ||
382 | static int __init | |
5f3b1a8b | 383 | acpi_parse_int_src_ovr(struct acpi_subtable_header * header, |
4be44fcd | 384 | const unsigned long end) |
1da177e4 | 385 | { |
5f3b1a8b | 386 | struct acpi_madt_interrupt_override *intsrc = NULL; |
1da177e4 | 387 | |
5f3b1a8b | 388 | intsrc = (struct acpi_madt_interrupt_override *)header; |
1da177e4 LT |
389 | |
390 | if (BAD_MADT_ENTRY(intsrc, end)) | |
391 | return -EINVAL; | |
392 | ||
393 | acpi_table_print_madt_entry(header); | |
394 | ||
5f3b1a8b | 395 | if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) { |
7bdd21ce | 396 | acpi_sci_ioapic_setup(intsrc->global_irq, |
5f3b1a8b AS |
397 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, |
398 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2); | |
1da177e4 LT |
399 | return 0; |
400 | } | |
401 | ||
402 | if (acpi_skip_timer_override && | |
5f3b1a8b | 403 | intsrc->source_irq == 0 && intsrc->global_irq == 2) { |
4be44fcd LB |
404 | printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n"); |
405 | return 0; | |
1da177e4 LT |
406 | } |
407 | ||
5f3b1a8b AS |
408 | mp_override_legacy_irq(intsrc->source_irq, |
409 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, | |
410 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, | |
411 | intsrc->global_irq); | |
1da177e4 LT |
412 | |
413 | return 0; | |
414 | } | |
415 | ||
1da177e4 | 416 | static int __init |
5f3b1a8b | 417 | acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 418 | { |
5f3b1a8b | 419 | struct acpi_madt_nmi_source *nmi_src = NULL; |
1da177e4 | 420 | |
5f3b1a8b | 421 | nmi_src = (struct acpi_madt_nmi_source *)header; |
1da177e4 LT |
422 | |
423 | if (BAD_MADT_ENTRY(nmi_src, end)) | |
424 | return -EINVAL; | |
425 | ||
426 | acpi_table_print_madt_entry(header); | |
427 | ||
428 | /* TBD: Support nimsrc entries? */ | |
429 | ||
430 | return 0; | |
431 | } | |
432 | ||
4be44fcd | 433 | #endif /* CONFIG_X86_IO_APIC */ |
1da177e4 | 434 | |
1da177e4 LT |
435 | /* |
436 | * acpi_pic_sci_set_trigger() | |
5f3b1a8b | 437 | * |
1da177e4 LT |
438 | * use ELCR to set PIC-mode trigger type for SCI |
439 | * | |
440 | * If a PIC-mode SCI is not recognized or gives spurious IRQ7's | |
441 | * it may require Edge Trigger -- use "acpi_sci=edge" | |
442 | * | |
443 | * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers | |
444 | * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. | |
27b46d76 SA |
445 | * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0) |
446 | * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0) | |
1da177e4 LT |
447 | */ |
448 | ||
4be44fcd | 449 | void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) |
1da177e4 LT |
450 | { |
451 | unsigned int mask = 1 << irq; | |
452 | unsigned int old, new; | |
453 | ||
454 | /* Real old ELCR mask */ | |
455 | old = inb(0x4d0) | (inb(0x4d1) << 8); | |
456 | ||
457 | /* | |
27b46d76 | 458 | * If we use ACPI to set PCI IRQs, then we should clear ELCR |
1da177e4 LT |
459 | * since we will set it correctly as we enable the PCI irq |
460 | * routing. | |
461 | */ | |
462 | new = acpi_noirq ? old : 0; | |
463 | ||
464 | /* | |
465 | * Update SCI information in the ELCR, it isn't in the PCI | |
466 | * routing tables.. | |
467 | */ | |
468 | switch (trigger) { | |
4be44fcd | 469 | case 1: /* Edge - clear */ |
1da177e4 LT |
470 | new &= ~mask; |
471 | break; | |
4be44fcd | 472 | case 3: /* Level - set */ |
1da177e4 LT |
473 | new |= mask; |
474 | break; | |
475 | } | |
476 | ||
477 | if (old == new) | |
478 | return; | |
479 | ||
480 | printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old); | |
481 | outb(new, 0x4d0); | |
482 | outb(new >> 8, 0x4d1); | |
483 | } | |
484 | ||
1da177e4 LT |
485 | int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) |
486 | { | |
f023d764 | 487 | *irq = gsi; |
1da177e4 LT |
488 | return 0; |
489 | } | |
490 | ||
1f3a6a15 KK |
491 | /* |
492 | * success: return IRQ number (>=0) | |
493 | * failure: return < 0 | |
494 | */ | |
cb654695 | 495 | int acpi_register_gsi(u32 gsi, int triggering, int polarity) |
1da177e4 LT |
496 | { |
497 | unsigned int irq; | |
498 | unsigned int plat_gsi = gsi; | |
499 | ||
500 | #ifdef CONFIG_PCI | |
501 | /* | |
502 | * Make sure all (legacy) PCI IRQs are set as level-triggered. | |
503 | */ | |
504 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { | |
cb654695 | 505 | if (triggering == ACPI_LEVEL_SENSITIVE) |
4be44fcd | 506 | eisa_set_level_irq(gsi); |
1da177e4 LT |
507 | } |
508 | #endif | |
509 | ||
510 | #ifdef CONFIG_X86_IO_APIC | |
511 | if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) { | |
cb654695 | 512 | plat_gsi = mp_register_gsi(gsi, triggering, polarity); |
1da177e4 LT |
513 | } |
514 | #endif | |
515 | acpi_gsi_to_irq(plat_gsi, &irq); | |
516 | return irq; | |
517 | } | |
4be44fcd | 518 | |
1da177e4 LT |
519 | /* |
520 | * ACPI based hotplug support for CPU | |
521 | */ | |
522 | #ifdef CONFIG_ACPI_HOTPLUG_CPU | |
009cbadb SR |
523 | |
524 | static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu) | |
1da177e4 | 525 | { |
73fea175 AR |
526 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; |
527 | union acpi_object *obj; | |
5f3b1a8b | 528 | struct acpi_madt_local_apic *lapic; |
73fea175 AR |
529 | cpumask_t tmp_map, new_map; |
530 | u8 physid; | |
531 | int cpu; | |
532 | ||
533 | if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer))) | |
534 | return -EINVAL; | |
535 | ||
536 | if (!buffer.length || !buffer.pointer) | |
537 | return -EINVAL; | |
538 | ||
539 | obj = buffer.pointer; | |
540 | if (obj->type != ACPI_TYPE_BUFFER || | |
541 | obj->buffer.length < sizeof(*lapic)) { | |
542 | kfree(buffer.pointer); | |
543 | return -EINVAL; | |
544 | } | |
545 | ||
5f3b1a8b | 546 | lapic = (struct acpi_madt_local_apic *)obj->buffer.pointer; |
73fea175 | 547 | |
5f3b1a8b AS |
548 | if (lapic->header.type != ACPI_MADT_TYPE_LOCAL_APIC || |
549 | !(lapic->lapic_flags & ACPI_MADT_ENABLED)) { | |
73fea175 AR |
550 | kfree(buffer.pointer); |
551 | return -EINVAL; | |
552 | } | |
553 | ||
554 | physid = lapic->id; | |
555 | ||
556 | kfree(buffer.pointer); | |
557 | buffer.length = ACPI_ALLOCATE_BUFFER; | |
558 | buffer.pointer = NULL; | |
559 | ||
560 | tmp_map = cpu_present_map; | |
dfac2189 | 561 | acpi_register_lapic(physid, lapic->lapic_flags & ACPI_MADT_ENABLED); |
73fea175 AR |
562 | |
563 | /* | |
564 | * If mp_register_lapic successfully generates a new logical cpu | |
565 | * number, then the following will get us exactly what was mapped | |
566 | */ | |
567 | cpus_andnot(new_map, cpu_present_map, tmp_map); | |
568 | if (cpus_empty(new_map)) { | |
569 | printk ("Unable to map lapic to logical cpu number\n"); | |
570 | return -EINVAL; | |
571 | } | |
572 | ||
573 | cpu = first_cpu(new_map); | |
574 | ||
575 | *pcpu = cpu; | |
576 | return 0; | |
1da177e4 | 577 | } |
1da177e4 | 578 | |
009cbadb SR |
579 | /* wrapper to silence section mismatch warning */ |
580 | int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu) | |
581 | { | |
582 | return _acpi_map_lsapic(handle, pcpu); | |
583 | } | |
4be44fcd | 584 | EXPORT_SYMBOL(acpi_map_lsapic); |
1da177e4 | 585 | |
4be44fcd | 586 | int acpi_unmap_lsapic(int cpu) |
1da177e4 | 587 | { |
71fff5e6 | 588 | per_cpu(x86_cpu_to_apicid, cpu) = -1; |
73fea175 AR |
589 | cpu_clear(cpu, cpu_present_map); |
590 | num_processors--; | |
591 | ||
592 | return (0); | |
1da177e4 | 593 | } |
4be44fcd | 594 | |
1da177e4 | 595 | EXPORT_SYMBOL(acpi_unmap_lsapic); |
4be44fcd | 596 | #endif /* CONFIG_ACPI_HOTPLUG_CPU */ |
1da177e4 | 597 | |
4be44fcd | 598 | int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base) |
b1bb248a KK |
599 | { |
600 | /* TBD */ | |
601 | return -EINVAL; | |
602 | } | |
4be44fcd | 603 | |
b1bb248a KK |
604 | EXPORT_SYMBOL(acpi_register_ioapic); |
605 | ||
4be44fcd | 606 | int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base) |
b1bb248a KK |
607 | { |
608 | /* TBD */ | |
609 | return -EINVAL; | |
610 | } | |
4be44fcd | 611 | |
b1bb248a KK |
612 | EXPORT_SYMBOL(acpi_unregister_ioapic); |
613 | ||
5f3b1a8b | 614 | static int __init acpi_parse_sbf(struct acpi_table_header *table) |
1da177e4 | 615 | { |
5f3b1a8b | 616 | struct acpi_table_boot *sb; |
1da177e4 | 617 | |
5f3b1a8b | 618 | sb = (struct acpi_table_boot *)table; |
1da177e4 LT |
619 | if (!sb) { |
620 | printk(KERN_WARNING PREFIX "Unable to map SBF\n"); | |
621 | return -ENODEV; | |
622 | } | |
623 | ||
5f3b1a8b | 624 | sbf_port = sb->cmos_index; /* Save CMOS port */ |
1da177e4 LT |
625 | |
626 | return 0; | |
627 | } | |
628 | ||
1da177e4 | 629 | #ifdef CONFIG_HPET_TIMER |
2d0c87c3 | 630 | #include <asm/hpet.h> |
1da177e4 | 631 | |
a1dfd851 AD |
632 | static struct __initdata resource *hpet_res; |
633 | ||
5f3b1a8b | 634 | static int __init acpi_parse_hpet(struct acpi_table_header *table) |
1da177e4 LT |
635 | { |
636 | struct acpi_table_hpet *hpet_tbl; | |
637 | ||
5f3b1a8b | 638 | hpet_tbl = (struct acpi_table_hpet *)table; |
1da177e4 LT |
639 | if (!hpet_tbl) { |
640 | printk(KERN_WARNING PREFIX "Unable to map HPET\n"); | |
641 | return -ENODEV; | |
642 | } | |
643 | ||
ad363f80 | 644 | if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) { |
1da177e4 LT |
645 | printk(KERN_WARNING PREFIX "HPET timers must be located in " |
646 | "memory.\n"); | |
647 | return -1; | |
648 | } | |
f0f4c343 | 649 | |
2d0c87c3 | 650 | hpet_address = hpet_tbl->address.address; |
f4df73c2 TG |
651 | |
652 | /* | |
653 | * Some broken BIOSes advertise HPET at 0x0. We really do not | |
654 | * want to allocate a resource there. | |
655 | */ | |
656 | if (!hpet_address) { | |
657 | printk(KERN_WARNING PREFIX | |
658 | "HPET id: %#x base: %#lx is invalid\n", | |
659 | hpet_tbl->id, hpet_address); | |
660 | return 0; | |
661 | } | |
662 | #ifdef CONFIG_X86_64 | |
663 | /* | |
664 | * Some even more broken BIOSes advertise HPET at | |
665 | * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add | |
666 | * some noise: | |
667 | */ | |
668 | if (hpet_address == 0xfed0000000000000UL) { | |
669 | if (!hpet_force_user) { | |
670 | printk(KERN_WARNING PREFIX "HPET id: %#x " | |
671 | "base: 0xfed0000000000000 is bogus\n " | |
672 | "try hpet=force on the kernel command line to " | |
673 | "fix it up to 0xfed00000.\n", hpet_tbl->id); | |
674 | hpet_address = 0; | |
675 | return 0; | |
676 | } | |
677 | printk(KERN_WARNING PREFIX | |
678 | "HPET id: %#x base: 0xfed0000000000000 fixed up " | |
679 | "to 0xfed00000.\n", hpet_tbl->id); | |
680 | hpet_address >>= 32; | |
681 | } | |
682 | #endif | |
4be44fcd | 683 | printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n", |
2d0c87c3 | 684 | hpet_tbl->id, hpet_address); |
1da177e4 | 685 | |
a1dfd851 AD |
686 | /* |
687 | * Allocate and initialize the HPET firmware resource for adding into | |
688 | * the resource tree during the lateinit timeframe. | |
689 | */ | |
690 | #define HPET_RESOURCE_NAME_SIZE 9 | |
691 | hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE); | |
692 | ||
a1dfd851 AD |
693 | hpet_res->name = (void *)&hpet_res[1]; |
694 | hpet_res->flags = IORESOURCE_MEM; | |
695 | snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u", | |
696 | hpet_tbl->sequence); | |
697 | ||
698 | hpet_res->start = hpet_address; | |
699 | hpet_res->end = hpet_address + (1 * 1024) - 1; | |
700 | ||
1da177e4 LT |
701 | return 0; |
702 | } | |
a1dfd851 AD |
703 | |
704 | /* | |
705 | * hpet_insert_resource inserts the HPET resources used into the resource | |
706 | * tree. | |
707 | */ | |
708 | static __init int hpet_insert_resource(void) | |
709 | { | |
710 | if (!hpet_res) | |
711 | return 1; | |
712 | ||
713 | return insert_resource(&iomem_resource, hpet_res); | |
714 | } | |
715 | ||
716 | late_initcall(hpet_insert_resource); | |
717 | ||
1da177e4 LT |
718 | #else |
719 | #define acpi_parse_hpet NULL | |
720 | #endif | |
721 | ||
5f3b1a8b | 722 | static int __init acpi_parse_fadt(struct acpi_table_header *table) |
1da177e4 | 723 | { |
90660ec3 | 724 | |
1da177e4 LT |
725 | #ifdef CONFIG_X86_PM_TIMER |
726 | /* detect the location of the ACPI PM Timer */ | |
5f3b1a8b | 727 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) { |
1da177e4 | 728 | /* FADT rev. 2 */ |
5f3b1a8b | 729 | if (acpi_gbl_FADT.xpm_timer_block.space_id != |
4be44fcd | 730 | ACPI_ADR_SPACE_SYSTEM_IO) |
1da177e4 LT |
731 | return 0; |
732 | ||
5f3b1a8b | 733 | pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address; |
e6e87b4b DSL |
734 | /* |
735 | * "X" fields are optional extensions to the original V1.0 | |
736 | * fields, so we must selectively expand V1.0 fields if the | |
737 | * corresponding X field is zero. | |
738 | */ | |
739 | if (!pmtmr_ioport) | |
5f3b1a8b | 740 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
741 | } else { |
742 | /* FADT rev. 1 */ | |
5f3b1a8b | 743 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
744 | } |
745 | if (pmtmr_ioport) | |
4be44fcd LB |
746 | printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n", |
747 | pmtmr_ioport); | |
1da177e4 LT |
748 | #endif |
749 | return 0; | |
750 | } | |
751 | ||
1da177e4 LT |
752 | #ifdef CONFIG_X86_LOCAL_APIC |
753 | /* | |
754 | * Parse LAPIC entries in MADT | |
755 | * returns 0 on success, < 0 on error | |
756 | */ | |
31d2092e AS |
757 | |
758 | static void __init acpi_register_lapic_address(unsigned long address) | |
759 | { | |
760 | mp_lapic_addr = address; | |
761 | ||
762 | set_fixmap_nocache(FIX_APIC_BASE, address); | |
fb3bbd6a | 763 | if (boot_cpu_physical_apicid == -1U) { |
31d2092e | 764 | boot_cpu_physical_apicid = GET_APIC_ID(read_apic_id()); |
fb3bbd6a YL |
765 | #ifdef CONFIG_X86_32 |
766 | apic_version[boot_cpu_physical_apicid] = | |
767 | GET_APIC_VERSION(apic_read(APIC_LVR)); | |
768 | #endif | |
769 | } | |
31d2092e AS |
770 | } |
771 | ||
cbf9bd60 YL |
772 | static int __init early_acpi_parse_madt_lapic_addr_ovr(void) |
773 | { | |
774 | int count; | |
775 | ||
776 | if (!cpu_has_apic) | |
777 | return -ENODEV; | |
778 | ||
779 | /* | |
780 | * Note that the LAPIC address is obtained from the MADT (32-bit value) | |
781 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
782 | */ | |
783 | ||
784 | count = | |
785 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, | |
786 | acpi_parse_lapic_addr_ovr, 0); | |
787 | if (count < 0) { | |
788 | printk(KERN_ERR PREFIX | |
789 | "Error parsing LAPIC address override entry\n"); | |
790 | return count; | |
791 | } | |
792 | ||
793 | acpi_register_lapic_address(acpi_lapic_addr); | |
794 | ||
795 | return count; | |
796 | } | |
797 | ||
4be44fcd | 798 | static int __init acpi_parse_madt_lapic_entries(void) |
1da177e4 LT |
799 | { |
800 | int count; | |
801 | ||
0fcd2709 AK |
802 | if (!cpu_has_apic) |
803 | return -ENODEV; | |
804 | ||
5f3b1a8b | 805 | /* |
1da177e4 LT |
806 | * Note that the LAPIC address is obtained from the MADT (32-bit value) |
807 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
808 | */ | |
809 | ||
4be44fcd | 810 | count = |
5f3b1a8b | 811 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, |
4be44fcd | 812 | acpi_parse_lapic_addr_ovr, 0); |
1da177e4 | 813 | if (count < 0) { |
4be44fcd LB |
814 | printk(KERN_ERR PREFIX |
815 | "Error parsing LAPIC address override entry\n"); | |
1da177e4 LT |
816 | return count; |
817 | } | |
818 | ||
31d2092e | 819 | acpi_register_lapic_address(acpi_lapic_addr); |
1da177e4 | 820 | |
ac049c1d JS |
821 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC, |
822 | acpi_parse_sapic, MAX_APICS); | |
823 | ||
824 | if (!count) | |
825 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC, | |
826 | acpi_parse_lapic, MAX_APICS); | |
4be44fcd | 827 | if (!count) { |
1da177e4 LT |
828 | printk(KERN_ERR PREFIX "No LAPIC entries present\n"); |
829 | /* TBD: Cleanup to allow fallback to MPS */ | |
830 | return -ENODEV; | |
4be44fcd | 831 | } else if (count < 0) { |
1da177e4 LT |
832 | printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n"); |
833 | /* TBD: Cleanup to allow fallback to MPS */ | |
834 | return count; | |
835 | } | |
836 | ||
4be44fcd | 837 | count = |
5f3b1a8b | 838 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, acpi_parse_lapic_nmi, 0); |
1da177e4 LT |
839 | if (count < 0) { |
840 | printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n"); | |
841 | /* TBD: Cleanup to allow fallback to MPS */ | |
842 | return count; | |
843 | } | |
844 | return 0; | |
845 | } | |
4be44fcd | 846 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 847 | |
8466361a | 848 | #ifdef CONFIG_X86_IO_APIC |
11113f84 AS |
849 | #define MP_ISA_BUS 0 |
850 | ||
d49c4288 | 851 | #ifdef CONFIG_X86_ES7000 |
11113f84 AS |
852 | extern int es7000_plat; |
853 | #endif | |
854 | ||
5f895148 AS |
855 | static struct { |
856 | int apic_id; | |
857 | int gsi_base; | |
858 | int gsi_end; | |
859 | DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); | |
860 | } mp_ioapic_routing[MAX_IO_APICS]; | |
11113f84 AS |
861 | |
862 | static int mp_find_ioapic(int gsi) | |
863 | { | |
864 | int i = 0; | |
865 | ||
866 | /* Find the IOAPIC that manages this GSI. */ | |
867 | for (i = 0; i < nr_ioapics; i++) { | |
868 | if ((gsi >= mp_ioapic_routing[i].gsi_base) | |
869 | && (gsi <= mp_ioapic_routing[i].gsi_end)) | |
870 | return i; | |
871 | } | |
872 | ||
873 | printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi); | |
874 | return -1; | |
875 | } | |
876 | ||
877 | static u8 __init uniq_ioapic_id(u8 id) | |
878 | { | |
879 | #ifdef CONFIG_X86_32 | |
880 | if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && | |
881 | !APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) | |
882 | return io_apic_get_unique_id(nr_ioapics, id); | |
883 | else | |
884 | return id; | |
885 | #else | |
886 | int i; | |
887 | DECLARE_BITMAP(used, 256); | |
888 | bitmap_zero(used, 256); | |
889 | for (i = 0; i < nr_ioapics; i++) { | |
ec2cd0a2 AS |
890 | struct mp_config_ioapic *ia = &mp_ioapics[i]; |
891 | __set_bit(ia->mp_apicid, used); | |
11113f84 AS |
892 | } |
893 | if (!test_bit(id, used)) | |
894 | return id; | |
895 | return find_first_zero_bit(used, 256); | |
896 | #endif | |
897 | } | |
898 | ||
899 | static int bad_ioapic(unsigned long address) | |
900 | { | |
901 | if (nr_ioapics >= MAX_IO_APICS) { | |
902 | printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " | |
903 | "(found %d)\n", MAX_IO_APICS, nr_ioapics); | |
904 | panic("Recompile kernel with bigger MAX_IO_APICS!\n"); | |
905 | } | |
906 | if (!address) { | |
907 | printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" | |
908 | " found in table, skipping!\n"); | |
909 | return 1; | |
910 | } | |
911 | return 0; | |
912 | } | |
913 | ||
914 | void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) | |
915 | { | |
916 | int idx = 0; | |
917 | ||
918 | if (bad_ioapic(address)) | |
919 | return; | |
920 | ||
921 | idx = nr_ioapics; | |
922 | ||
ec2cd0a2 AS |
923 | mp_ioapics[idx].mp_type = MP_IOAPIC; |
924 | mp_ioapics[idx].mp_flags = MPC_APIC_USABLE; | |
925 | mp_ioapics[idx].mp_apicaddr = address; | |
11113f84 AS |
926 | |
927 | set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); | |
ec2cd0a2 | 928 | mp_ioapics[idx].mp_apicid = uniq_ioapic_id(id); |
11113f84 | 929 | #ifdef CONFIG_X86_32 |
ec2cd0a2 | 930 | mp_ioapics[idx].mp_apicver = io_apic_get_version(idx); |
11113f84 | 931 | #else |
ec2cd0a2 | 932 | mp_ioapics[idx].mp_apicver = 0; |
11113f84 AS |
933 | #endif |
934 | /* | |
935 | * Build basic GSI lookup table to facilitate gsi->io_apic lookups | |
936 | * and to prevent reprogramming of IOAPIC pins (PCI GSIs). | |
937 | */ | |
ec2cd0a2 | 938 | mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mp_apicid; |
11113f84 AS |
939 | mp_ioapic_routing[idx].gsi_base = gsi_base; |
940 | mp_ioapic_routing[idx].gsi_end = gsi_base + | |
941 | io_apic_get_redir_entries(idx); | |
942 | ||
ec2cd0a2 AS |
943 | printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, " |
944 | "GSI %d-%d\n", idx, mp_ioapics[idx].mp_apicid, | |
945 | mp_ioapics[idx].mp_apicver, mp_ioapics[idx].mp_apicaddr, | |
11113f84 AS |
946 | mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end); |
947 | ||
948 | nr_ioapics++; | |
949 | } | |
950 | ||
fcfa146e YL |
951 | static void assign_to_mp_irq(struct mp_config_intsrc *m, |
952 | struct mp_config_intsrc *mp_irq) | |
953 | { | |
954 | memcpy(mp_irq, m, sizeof(struct mp_config_intsrc)); | |
955 | } | |
956 | ||
957 | static int mp_irq_cmp(struct mp_config_intsrc *mp_irq, | |
958 | struct mp_config_intsrc *m) | |
959 | { | |
960 | return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc)); | |
961 | } | |
962 | ||
963 | static void save_mp_irq(struct mp_config_intsrc *m) | |
964 | { | |
965 | int i; | |
966 | ||
967 | for (i = 0; i < mp_irq_entries; i++) { | |
968 | if (!mp_irq_cmp(&mp_irqs[i], m)) | |
969 | return; | |
970 | } | |
971 | ||
972 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | |
973 | if (++mp_irq_entries == MAX_IRQ_SOURCES) | |
974 | panic("Max # of irq sources exceeded!!\n"); | |
975 | } | |
976 | ||
11113f84 AS |
977 | void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) |
978 | { | |
6df8809b YL |
979 | int ioapic; |
980 | int pin; | |
fcfa146e | 981 | struct mp_config_intsrc mp_irq; |
11113f84 AS |
982 | |
983 | /* | |
984 | * Convert 'gsi' to 'ioapic.pin'. | |
985 | */ | |
986 | ioapic = mp_find_ioapic(gsi); | |
987 | if (ioapic < 0) | |
988 | return; | |
989 | pin = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
990 | ||
991 | /* | |
992 | * TBD: This check is for faulty timer entries, where the override | |
993 | * erroneously sets the trigger to level, resulting in a HUGE | |
994 | * increase of timer interrupts! | |
995 | */ | |
996 | if ((bus_irq == 0) && (trigger == 3)) | |
997 | trigger = 1; | |
998 | ||
fcfa146e YL |
999 | mp_irq.mp_type = MP_INTSRC; |
1000 | mp_irq.mp_irqtype = mp_INT; | |
1001 | mp_irq.mp_irqflag = (trigger << 2) | polarity; | |
1002 | mp_irq.mp_srcbus = MP_ISA_BUS; | |
1003 | mp_irq.mp_srcbusirq = bus_irq; /* IRQ */ | |
1004 | mp_irq.mp_dstapic = mp_ioapics[ioapic].mp_apicid; /* APIC ID */ | |
1005 | mp_irq.mp_dstirq = pin; /* INTIN# */ | |
11113f84 | 1006 | |
fcfa146e | 1007 | save_mp_irq(&mp_irq); |
11113f84 AS |
1008 | } |
1009 | ||
1010 | void __init mp_config_acpi_legacy_irqs(void) | |
1011 | { | |
6df8809b YL |
1012 | int i; |
1013 | int ioapic; | |
1014 | unsigned int dstapic; | |
fcfa146e | 1015 | struct mp_config_intsrc mp_irq; |
11113f84 AS |
1016 | |
1017 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) | |
1018 | /* | |
1019 | * Fabricate the legacy ISA bus (bus #31). | |
1020 | */ | |
1021 | mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; | |
1022 | #endif | |
1023 | set_bit(MP_ISA_BUS, mp_bus_not_pci); | |
cfc1b9a6 | 1024 | pr_debug("Bus #%d is ISA\n", MP_ISA_BUS); |
11113f84 | 1025 | |
d49c4288 | 1026 | #ifdef CONFIG_X86_ES7000 |
11113f84 AS |
1027 | /* |
1028 | * Older generations of ES7000 have no legacy identity mappings | |
1029 | */ | |
1030 | if (es7000_plat == 1) | |
1031 | return; | |
1032 | #endif | |
1033 | ||
1034 | /* | |
1035 | * Locate the IOAPIC that manages the ISA IRQs (0-15). | |
1036 | */ | |
1037 | ioapic = mp_find_ioapic(0); | |
1038 | if (ioapic < 0) | |
1039 | return; | |
6df8809b | 1040 | dstapic = mp_ioapics[ioapic].mp_apicid; |
11113f84 | 1041 | |
11113f84 AS |
1042 | /* |
1043 | * Use the default configuration for the IRQs 0-15. Unless | |
1044 | * overridden by (MADT) interrupt source override entries. | |
1045 | */ | |
1046 | for (i = 0; i < 16; i++) { | |
1047 | int idx; | |
1048 | ||
1049 | for (idx = 0; idx < mp_irq_entries; idx++) { | |
2fddb6e2 | 1050 | struct mp_config_intsrc *irq = mp_irqs + idx; |
11113f84 AS |
1051 | |
1052 | /* Do we already have a mapping for this ISA IRQ? */ | |
2fddb6e2 AS |
1053 | if (irq->mp_srcbus == MP_ISA_BUS |
1054 | && irq->mp_srcbusirq == i) | |
11113f84 AS |
1055 | break; |
1056 | ||
1057 | /* Do we already have a mapping for this IOAPIC pin */ | |
6df8809b YL |
1058 | if (irq->mp_dstapic == dstapic && |
1059 | irq->mp_dstirq == i) | |
11113f84 AS |
1060 | break; |
1061 | } | |
1062 | ||
1063 | if (idx != mp_irq_entries) { | |
1064 | printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i); | |
1065 | continue; /* IRQ already used */ | |
1066 | } | |
1067 | ||
fcfa146e YL |
1068 | mp_irq.mp_type = MP_INTSRC; |
1069 | mp_irq.mp_irqflag = 0; /* Conforming */ | |
1070 | mp_irq.mp_srcbus = MP_ISA_BUS; | |
1071 | mp_irq.mp_dstapic = dstapic; | |
1072 | mp_irq.mp_irqtype = mp_INT; | |
1073 | mp_irq.mp_srcbusirq = i; /* Identity mapped */ | |
1074 | mp_irq.mp_dstirq = i; | |
11113f84 | 1075 | |
fcfa146e | 1076 | save_mp_irq(&mp_irq); |
11113f84 AS |
1077 | } |
1078 | } | |
1079 | ||
1080 | int mp_register_gsi(u32 gsi, int triggering, int polarity) | |
1081 | { | |
1082 | int ioapic; | |
1083 | int ioapic_pin; | |
1084 | #ifdef CONFIG_X86_32 | |
1085 | #define MAX_GSI_NUM 4096 | |
1086 | #define IRQ_COMPRESSION_START 64 | |
1087 | ||
1088 | static int pci_irq = IRQ_COMPRESSION_START; | |
1089 | /* | |
1090 | * Mapping between Global System Interrupts, which | |
1091 | * represent all possible interrupts, and IRQs | |
1092 | * assigned to actual devices. | |
1093 | */ | |
1094 | static int gsi_to_irq[MAX_GSI_NUM]; | |
1095 | #else | |
1096 | ||
1097 | if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) | |
1098 | return gsi; | |
1099 | #endif | |
1100 | ||
1101 | /* Don't set up the ACPI SCI because it's already set up */ | |
1102 | if (acpi_gbl_FADT.sci_interrupt == gsi) | |
1103 | return gsi; | |
1104 | ||
1105 | ioapic = mp_find_ioapic(gsi); | |
1106 | if (ioapic < 0) { | |
1107 | printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi); | |
1108 | return gsi; | |
1109 | } | |
1110 | ||
1111 | ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
1112 | ||
1113 | #ifdef CONFIG_X86_32 | |
1114 | if (ioapic_renumber_irq) | |
1115 | gsi = ioapic_renumber_irq(ioapic, gsi); | |
1116 | #endif | |
1117 | ||
1118 | /* | |
1119 | * Avoid pin reprogramming. PRTs typically include entries | |
1120 | * with redundant pin->gsi mappings (but unique PCI devices); | |
1121 | * we only program the IOAPIC on the first. | |
1122 | */ | |
1123 | if (ioapic_pin > MP_MAX_IOAPIC_PIN) { | |
1124 | printk(KERN_ERR "Invalid reference to IOAPIC pin " | |
1125 | "%d-%d\n", mp_ioapic_routing[ioapic].apic_id, | |
1126 | ioapic_pin); | |
1127 | return gsi; | |
1128 | } | |
1129 | if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) { | |
cfc1b9a6 TG |
1130 | pr_debug(KERN_DEBUG "Pin %d-%d already programmed\n", |
1131 | mp_ioapic_routing[ioapic].apic_id, ioapic_pin); | |
11113f84 AS |
1132 | #ifdef CONFIG_X86_32 |
1133 | return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]); | |
1134 | #else | |
1135 | return gsi; | |
1136 | #endif | |
1137 | } | |
1138 | ||
1139 | set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed); | |
1140 | #ifdef CONFIG_X86_32 | |
1141 | /* | |
1142 | * For GSI >= 64, use IRQ compression | |
1143 | */ | |
1144 | if ((gsi >= IRQ_COMPRESSION_START) | |
1145 | && (triggering == ACPI_LEVEL_SENSITIVE)) { | |
1146 | /* | |
1147 | * For PCI devices assign IRQs in order, avoiding gaps | |
1148 | * due to unused I/O APIC pins. | |
1149 | */ | |
1150 | int irq = gsi; | |
1151 | if (gsi < MAX_GSI_NUM) { | |
1152 | /* | |
1153 | * Retain the VIA chipset work-around (gsi > 15), but | |
1154 | * avoid a problem where the 8254 timer (IRQ0) is setup | |
1155 | * via an override (so it's not on pin 0 of the ioapic), | |
1156 | * and at the same time, the pin 0 interrupt is a PCI | |
1157 | * type. The gsi > 15 test could cause these two pins | |
1158 | * to be shared as IRQ0, and they are not shareable. | |
1159 | * So test for this condition, and if necessary, avoid | |
1160 | * the pin collision. | |
1161 | */ | |
1162 | gsi = pci_irq++; | |
1163 | /* | |
1164 | * Don't assign IRQ used by ACPI SCI | |
1165 | */ | |
1166 | if (gsi == acpi_gbl_FADT.sci_interrupt) | |
1167 | gsi = pci_irq++; | |
1168 | gsi_to_irq[irq] = gsi; | |
1169 | } else { | |
1170 | printk(KERN_ERR "GSI %u is too high\n", gsi); | |
1171 | return gsi; | |
1172 | } | |
1173 | } | |
1174 | #endif | |
1175 | io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, | |
1176 | triggering == ACPI_EDGE_SENSITIVE ? 0 : 1, | |
1177 | polarity == ACPI_ACTIVE_HIGH ? 0 : 1); | |
1178 | return gsi; | |
1179 | } | |
1180 | ||
2944e16b YL |
1181 | int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, |
1182 | u32 gsi, int triggering, int polarity) | |
1183 | { | |
fcfa146e YL |
1184 | #ifdef CONFIG_X86_MPPARSE |
1185 | struct mp_config_intsrc mp_irq; | |
2944e16b YL |
1186 | int ioapic; |
1187 | ||
fcfa146e | 1188 | if (!acpi_ioapic) |
d867e531 YL |
1189 | return 0; |
1190 | ||
2944e16b | 1191 | /* print the entry should happen on mptable identically */ |
fcfa146e YL |
1192 | mp_irq.mp_type = MP_INTSRC; |
1193 | mp_irq.mp_irqtype = mp_INT; | |
1194 | mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | | |
2944e16b | 1195 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); |
fcfa146e YL |
1196 | mp_irq.mp_srcbus = number; |
1197 | mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); | |
2944e16b | 1198 | ioapic = mp_find_ioapic(gsi); |
fcfa146e YL |
1199 | mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id; |
1200 | mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
2944e16b | 1201 | |
fcfa146e YL |
1202 | save_mp_irq(&mp_irq); |
1203 | #endif | |
2944e16b YL |
1204 | return 0; |
1205 | } | |
1206 | ||
1da177e4 LT |
1207 | /* |
1208 | * Parse IOAPIC related entries in MADT | |
1209 | * returns 0 on success, < 0 on error | |
1210 | */ | |
4be44fcd | 1211 | static int __init acpi_parse_madt_ioapic_entries(void) |
1da177e4 LT |
1212 | { |
1213 | int count; | |
1214 | ||
1215 | /* | |
1216 | * ACPI interpreter is required to complete interrupt setup, | |
1217 | * so if it is off, don't enumerate the io-apics with ACPI. | |
1218 | * If MPS is present, it will handle them, | |
1219 | * otherwise the system will stay in PIC mode | |
1220 | */ | |
1221 | if (acpi_disabled || acpi_noirq) { | |
1222 | return -ENODEV; | |
4be44fcd | 1223 | } |
1da177e4 | 1224 | |
5f3b1a8b | 1225 | if (!cpu_has_apic) |
d3b6a349 AK |
1226 | return -ENODEV; |
1227 | ||
1da177e4 | 1228 | /* |
4be44fcd | 1229 | * if "noapic" boot option, don't look for IO-APICs |
1da177e4 LT |
1230 | */ |
1231 | if (skip_ioapic_setup) { | |
1232 | printk(KERN_INFO PREFIX "Skipping IOAPIC probe " | |
4be44fcd | 1233 | "due to 'noapic' option.\n"); |
1da177e4 LT |
1234 | return -ENODEV; |
1235 | } | |
1236 | ||
4be44fcd | 1237 | count = |
5f3b1a8b | 1238 | acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic, |
4be44fcd | 1239 | MAX_IO_APICS); |
1da177e4 LT |
1240 | if (!count) { |
1241 | printk(KERN_ERR PREFIX "No IOAPIC entries present\n"); | |
1242 | return -ENODEV; | |
4be44fcd | 1243 | } else if (count < 0) { |
1da177e4 LT |
1244 | printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n"); |
1245 | return count; | |
1246 | } | |
1247 | ||
4be44fcd | 1248 | count = |
5f3b1a8b | 1249 | acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, acpi_parse_int_src_ovr, |
4be44fcd | 1250 | NR_IRQ_VECTORS); |
1da177e4 | 1251 | if (count < 0) { |
4be44fcd LB |
1252 | printk(KERN_ERR PREFIX |
1253 | "Error parsing interrupt source overrides entry\n"); | |
1da177e4 LT |
1254 | /* TBD: Cleanup to allow fallback to MPS */ |
1255 | return count; | |
1256 | } | |
1257 | ||
1258 | /* | |
1259 | * If BIOS did not supply an INT_SRC_OVR for the SCI | |
1260 | * pretend we got one so we can set the SCI flags. | |
1261 | */ | |
1262 | if (!acpi_sci_override_gsi) | |
cee324b1 | 1263 | acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0); |
1da177e4 LT |
1264 | |
1265 | /* Fill in identity legacy mapings where no override */ | |
1266 | mp_config_acpi_legacy_irqs(); | |
1267 | ||
4be44fcd | 1268 | count = |
5f3b1a8b | 1269 | acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, acpi_parse_nmi_src, |
4be44fcd | 1270 | NR_IRQ_VECTORS); |
1da177e4 LT |
1271 | if (count < 0) { |
1272 | printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n"); | |
1273 | /* TBD: Cleanup to allow fallback to MPS */ | |
1274 | return count; | |
1275 | } | |
1276 | ||
1277 | return 0; | |
1278 | } | |
1279 | #else | |
1280 | static inline int acpi_parse_madt_ioapic_entries(void) | |
1281 | { | |
1282 | return -1; | |
1283 | } | |
8466361a | 1284 | #endif /* !CONFIG_X86_IO_APIC */ |
1da177e4 | 1285 | |
cbf9bd60 YL |
1286 | static void __init early_acpi_process_madt(void) |
1287 | { | |
1288 | #ifdef CONFIG_X86_LOCAL_APIC | |
1289 | int error; | |
1290 | ||
1291 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { | |
1292 | ||
1293 | /* | |
1294 | * Parse MADT LAPIC entries | |
1295 | */ | |
1296 | error = early_acpi_parse_madt_lapic_addr_ovr(); | |
1297 | if (!error) { | |
1298 | acpi_lapic = 1; | |
1299 | smp_found_config = 1; | |
1300 | } | |
1301 | if (error == -EINVAL) { | |
1302 | /* | |
1303 | * Dell Precision Workstation 410, 610 come here. | |
1304 | */ | |
1305 | printk(KERN_ERR PREFIX | |
1306 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1307 | disable_acpi(); | |
1308 | } | |
1309 | } | |
1310 | #endif | |
1311 | } | |
1312 | ||
4be44fcd | 1313 | static void __init acpi_process_madt(void) |
1da177e4 LT |
1314 | { |
1315 | #ifdef CONFIG_X86_LOCAL_APIC | |
7f8f97c3 | 1316 | int error; |
1da177e4 | 1317 | |
7f8f97c3 | 1318 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { |
1da177e4 LT |
1319 | |
1320 | /* | |
1321 | * Parse MADT LAPIC entries | |
1322 | */ | |
1323 | error = acpi_parse_madt_lapic_entries(); | |
1324 | if (!error) { | |
1325 | acpi_lapic = 1; | |
1326 | ||
911a62d4 VP |
1327 | #ifdef CONFIG_X86_GENERICARCH |
1328 | generic_bigsmp_probe(); | |
1329 | #endif | |
1da177e4 LT |
1330 | /* |
1331 | * Parse MADT IO-APIC entries | |
1332 | */ | |
1333 | error = acpi_parse_madt_ioapic_entries(); | |
1334 | if (!error) { | |
1335 | acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC; | |
1336 | acpi_irq_balance_set(NULL); | |
1337 | acpi_ioapic = 1; | |
1338 | ||
1339 | smp_found_config = 1; | |
3c43f039 | 1340 | setup_apic_routing(); |
1da177e4 LT |
1341 | } |
1342 | } | |
1343 | if (error == -EINVAL) { | |
1344 | /* | |
1345 | * Dell Precision Workstation 410, 610 come here. | |
1346 | */ | |
4be44fcd LB |
1347 | printk(KERN_ERR PREFIX |
1348 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1da177e4 LT |
1349 | disable_acpi(); |
1350 | } | |
1351 | } | |
1352 | #endif | |
1353 | return; | |
1354 | } | |
1355 | ||
1855256c | 1356 | static int __init disable_acpi_irq(const struct dmi_system_id *d) |
aea00143 AP |
1357 | { |
1358 | if (!acpi_force) { | |
1359 | printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n", | |
1360 | d->ident); | |
1361 | acpi_noirq_set(); | |
1362 | } | |
1363 | return 0; | |
1364 | } | |
1365 | ||
1855256c | 1366 | static int __init disable_acpi_pci(const struct dmi_system_id *d) |
aea00143 AP |
1367 | { |
1368 | if (!acpi_force) { | |
1369 | printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n", | |
1370 | d->ident); | |
1371 | acpi_disable_pci(); | |
1372 | } | |
1373 | return 0; | |
1374 | } | |
aea00143 | 1375 | |
1855256c | 1376 | static int __init dmi_disable_acpi(const struct dmi_system_id *d) |
aea00143 AP |
1377 | { |
1378 | if (!acpi_force) { | |
4be44fcd | 1379 | printk(KERN_NOTICE "%s detected: acpi off\n", d->ident); |
aea00143 AP |
1380 | disable_acpi(); |
1381 | } else { | |
1382 | printk(KERN_NOTICE | |
1383 | "Warning: DMI blacklist says broken, but acpi forced\n"); | |
1384 | } | |
1385 | return 0; | |
1386 | } | |
1387 | ||
1388 | /* | |
1389 | * Limit ACPI to CPU enumeration for HT | |
1390 | */ | |
1855256c | 1391 | static int __init force_acpi_ht(const struct dmi_system_id *d) |
aea00143 AP |
1392 | { |
1393 | if (!acpi_force) { | |
4be44fcd LB |
1394 | printk(KERN_NOTICE "%s detected: force use of acpi=ht\n", |
1395 | d->ident); | |
aea00143 AP |
1396 | disable_acpi(); |
1397 | acpi_ht = 1; | |
1398 | } else { | |
1399 | printk(KERN_NOTICE | |
1400 | "Warning: acpi=force overrules DMI blacklist: acpi=ht\n"); | |
1401 | } | |
1402 | return 0; | |
1403 | } | |
1404 | ||
e2079c43 RW |
1405 | /* |
1406 | * Force ignoring BIOS IRQ0 pin2 override | |
1407 | */ | |
1408 | static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) | |
1409 | { | |
1410 | pr_notice("%s detected: Ignoring BIOS IRQ0 pin2 override\n", d->ident); | |
1411 | acpi_skip_timer_override = 1; | |
e2079c43 RW |
1412 | return 0; |
1413 | } | |
1414 | ||
aea00143 AP |
1415 | /* |
1416 | * If your system is blacklisted here, but you find that acpi=force | |
1417 | * works for you, please contact acpi-devel@sourceforge.net | |
1418 | */ | |
1419 | static struct dmi_system_id __initdata acpi_dmi_table[] = { | |
1420 | /* | |
1421 | * Boxes that need ACPI disabled | |
1422 | */ | |
1423 | { | |
4be44fcd LB |
1424 | .callback = dmi_disable_acpi, |
1425 | .ident = "IBM Thinkpad", | |
1426 | .matches = { | |
1427 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1428 | DMI_MATCH(DMI_BOARD_NAME, "2629H1G"), | |
1429 | }, | |
1430 | }, | |
aea00143 AP |
1431 | |
1432 | /* | |
1433 | * Boxes that need acpi=ht | |
1434 | */ | |
1435 | { | |
4be44fcd LB |
1436 | .callback = force_acpi_ht, |
1437 | .ident = "FSC Primergy T850", | |
1438 | .matches = { | |
1439 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), | |
1440 | DMI_MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"), | |
1441 | }, | |
1442 | }, | |
aea00143 | 1443 | { |
4be44fcd LB |
1444 | .callback = force_acpi_ht, |
1445 | .ident = "HP VISUALIZE NT Workstation", | |
1446 | .matches = { | |
1447 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
1448 | DMI_MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"), | |
1449 | }, | |
1450 | }, | |
aea00143 | 1451 | { |
4be44fcd LB |
1452 | .callback = force_acpi_ht, |
1453 | .ident = "Compaq Workstation W8000", | |
1454 | .matches = { | |
1455 | DMI_MATCH(DMI_SYS_VENDOR, "Compaq"), | |
1456 | DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"), | |
1457 | }, | |
1458 | }, | |
aea00143 | 1459 | { |
4be44fcd LB |
1460 | .callback = force_acpi_ht, |
1461 | .ident = "ASUS P4B266", | |
1462 | .matches = { | |
1463 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1464 | DMI_MATCH(DMI_BOARD_NAME, "P4B266"), | |
1465 | }, | |
1466 | }, | |
aea00143 | 1467 | { |
4be44fcd LB |
1468 | .callback = force_acpi_ht, |
1469 | .ident = "ASUS P2B-DS", | |
1470 | .matches = { | |
1471 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1472 | DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"), | |
1473 | }, | |
1474 | }, | |
aea00143 | 1475 | { |
4be44fcd LB |
1476 | .callback = force_acpi_ht, |
1477 | .ident = "ASUS CUR-DLS", | |
1478 | .matches = { | |
1479 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1480 | DMI_MATCH(DMI_BOARD_NAME, "CUR-DLS"), | |
1481 | }, | |
1482 | }, | |
aea00143 | 1483 | { |
4be44fcd LB |
1484 | .callback = force_acpi_ht, |
1485 | .ident = "ABIT i440BX-W83977", | |
1486 | .matches = { | |
1487 | DMI_MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"), | |
1488 | DMI_MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"), | |
1489 | }, | |
1490 | }, | |
aea00143 | 1491 | { |
4be44fcd LB |
1492 | .callback = force_acpi_ht, |
1493 | .ident = "IBM Bladecenter", | |
1494 | .matches = { | |
1495 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1496 | DMI_MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"), | |
1497 | }, | |
1498 | }, | |
aea00143 | 1499 | { |
4be44fcd LB |
1500 | .callback = force_acpi_ht, |
1501 | .ident = "IBM eServer xSeries 360", | |
1502 | .matches = { | |
1503 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1504 | DMI_MATCH(DMI_BOARD_NAME, "eServer xSeries 360"), | |
1505 | }, | |
1506 | }, | |
aea00143 | 1507 | { |
4be44fcd LB |
1508 | .callback = force_acpi_ht, |
1509 | .ident = "IBM eserver xSeries 330", | |
1510 | .matches = { | |
1511 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1512 | DMI_MATCH(DMI_BOARD_NAME, "eserver xSeries 330"), | |
1513 | }, | |
1514 | }, | |
aea00143 | 1515 | { |
4be44fcd LB |
1516 | .callback = force_acpi_ht, |
1517 | .ident = "IBM eserver xSeries 440", | |
1518 | .matches = { | |
1519 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1520 | DMI_MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"), | |
1521 | }, | |
1522 | }, | |
aea00143 | 1523 | |
aea00143 AP |
1524 | /* |
1525 | * Boxes that need ACPI PCI IRQ routing disabled | |
1526 | */ | |
1527 | { | |
4be44fcd LB |
1528 | .callback = disable_acpi_irq, |
1529 | .ident = "ASUS A7V", | |
1530 | .matches = { | |
1531 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"), | |
1532 | DMI_MATCH(DMI_BOARD_NAME, "<A7V>"), | |
1533 | /* newer BIOS, Revision 1011, does work */ | |
1534 | DMI_MATCH(DMI_BIOS_VERSION, | |
1535 | "ASUS A7V ACPI BIOS Revision 1007"), | |
1536 | }, | |
1537 | }, | |
74586fca LB |
1538 | { |
1539 | /* | |
1540 | * Latest BIOS for IBM 600E (1.16) has bad pcinum | |
1541 | * for LPC bridge, which is needed for the PCI | |
1542 | * interrupt links to work. DSDT fix is in bug 5966. | |
1543 | * 2645, 2646 model numbers are shared with 600/600E/600X | |
1544 | */ | |
1545 | .callback = disable_acpi_irq, | |
1546 | .ident = "IBM Thinkpad 600 Series 2645", | |
1547 | .matches = { | |
1548 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1549 | DMI_MATCH(DMI_BOARD_NAME, "2645"), | |
1550 | }, | |
1551 | }, | |
1552 | { | |
1553 | .callback = disable_acpi_irq, | |
1554 | .ident = "IBM Thinkpad 600 Series 2646", | |
1555 | .matches = { | |
1556 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1557 | DMI_MATCH(DMI_BOARD_NAME, "2646"), | |
1558 | }, | |
1559 | }, | |
aea00143 AP |
1560 | /* |
1561 | * Boxes that need ACPI PCI IRQ routing and PCI scan disabled | |
1562 | */ | |
4be44fcd LB |
1563 | { /* _BBN 0 bug */ |
1564 | .callback = disable_acpi_pci, | |
1565 | .ident = "ASUS PR-DLS", | |
1566 | .matches = { | |
1567 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1568 | DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"), | |
1569 | DMI_MATCH(DMI_BIOS_VERSION, | |
1570 | "ASUS PR-DLS ACPI BIOS Revision 1010"), | |
1571 | DMI_MATCH(DMI_BIOS_DATE, "03/21/2003") | |
1572 | }, | |
1573 | }, | |
aea00143 | 1574 | { |
4be44fcd LB |
1575 | .callback = disable_acpi_pci, |
1576 | .ident = "Acer TravelMate 36x Laptop", | |
1577 | .matches = { | |
1578 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), | |
1579 | DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"), | |
1580 | }, | |
1581 | }, | |
e2079c43 RW |
1582 | /* |
1583 | * HP laptops which use a DSDT reporting as HP/SB400/10000, | |
1584 | * which includes some code which overrides all temperature | |
1585 | * trip points to 16C if the INTIN2 input of the I/O APIC | |
1586 | * is enabled. This input is incorrectly designated the | |
1587 | * ISA IRQ 0 via an interrupt source override even though | |
1588 | * it is wired to the output of the master 8259A and INTIN0 | |
1589 | * is not connected at all. Force ignoring BIOS IRQ0 pin2 | |
1590 | * override in that cases. | |
1591 | */ | |
1592 | { | |
1593 | .callback = dmi_ignore_irq0_timer_override, | |
1594 | .ident = "HP NX6125 laptop", | |
1595 | .matches = { | |
1596 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1597 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"), | |
1598 | }, | |
1599 | }, | |
1600 | { | |
1601 | .callback = dmi_ignore_irq0_timer_override, | |
1602 | .ident = "HP NX6325 laptop", | |
1603 | .matches = { | |
1604 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1605 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), | |
1606 | }, | |
1607 | }, | |
4be44fcd | 1608 | {} |
aea00143 AP |
1609 | }; |
1610 | ||
1da177e4 LT |
1611 | /* |
1612 | * acpi_boot_table_init() and acpi_boot_init() | |
1613 | * called from setup_arch(), always. | |
1614 | * 1. checksums all tables | |
1615 | * 2. enumerates lapics | |
1616 | * 3. enumerates io-apics | |
1617 | * | |
1618 | * acpi_table_init() is separate to allow reading SRAT without | |
1619 | * other side effects. | |
1620 | * | |
1621 | * side effects of acpi_boot_init: | |
1622 | * acpi_lapic = 1 if LAPIC found | |
1623 | * acpi_ioapic = 1 if IOAPIC found | |
1624 | * if (acpi_lapic && acpi_ioapic) smp_found_config = 1; | |
1625 | * if acpi_blacklisted() acpi_disabled = 1; | |
1626 | * acpi_irq_model=... | |
1627 | * ... | |
1628 | * | |
1629 | * return value: (currently ignored) | |
1630 | * 0: success | |
1631 | * !0: failure | |
1632 | */ | |
1633 | ||
4be44fcd | 1634 | int __init acpi_boot_table_init(void) |
1da177e4 LT |
1635 | { |
1636 | int error; | |
1637 | ||
aea00143 | 1638 | dmi_check_system(acpi_dmi_table); |
aea00143 | 1639 | |
1da177e4 LT |
1640 | /* |
1641 | * If acpi_disabled, bail out | |
1642 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1643 | */ | |
1644 | if (acpi_disabled && !acpi_ht) | |
4be44fcd | 1645 | return 1; |
1da177e4 | 1646 | |
5f3b1a8b | 1647 | /* |
1da177e4 LT |
1648 | * Initialize the ACPI boot-time table parser. |
1649 | */ | |
1650 | error = acpi_table_init(); | |
1651 | if (error) { | |
1652 | disable_acpi(); | |
1653 | return error; | |
1654 | } | |
1da177e4 | 1655 | |
5f3b1a8b | 1656 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1657 | |
1658 | /* | |
1659 | * blacklist may disable ACPI entirely | |
1660 | */ | |
1661 | error = acpi_blacklisted(); | |
1662 | if (error) { | |
1da177e4 LT |
1663 | if (acpi_force) { |
1664 | printk(KERN_WARNING PREFIX "acpi=force override\n"); | |
1665 | } else { | |
1666 | printk(KERN_WARNING PREFIX "Disabling ACPI support\n"); | |
1667 | disable_acpi(); | |
1668 | return error; | |
1669 | } | |
1670 | } | |
cbf9bd60 YL |
1671 | |
1672 | return 0; | |
1673 | } | |
1674 | ||
1675 | int __init early_acpi_boot_init(void) | |
1676 | { | |
1677 | /* | |
1678 | * If acpi_disabled, bail out | |
1679 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1680 | */ | |
1681 | if (acpi_disabled && !acpi_ht) | |
1682 | return 1; | |
1683 | ||
1684 | /* | |
1685 | * Process the Multiple APIC Description Table (MADT), if present | |
1686 | */ | |
1687 | early_acpi_process_madt(); | |
1da177e4 LT |
1688 | |
1689 | return 0; | |
1690 | } | |
1691 | ||
1da177e4 LT |
1692 | int __init acpi_boot_init(void) |
1693 | { | |
1694 | /* | |
1695 | * If acpi_disabled, bail out | |
1696 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1697 | */ | |
1698 | if (acpi_disabled && !acpi_ht) | |
4be44fcd | 1699 | return 1; |
1da177e4 | 1700 | |
5f3b1a8b | 1701 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1702 | |
1703 | /* | |
1704 | * set sci_int and PM timer address | |
1705 | */ | |
ceb6c468 | 1706 | acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt); |
1da177e4 LT |
1707 | |
1708 | /* | |
1709 | * Process the Multiple APIC Description Table (MADT), if present | |
1710 | */ | |
1711 | acpi_process_madt(); | |
1712 | ||
5f3b1a8b | 1713 | acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet); |
1da177e4 LT |
1714 | |
1715 | return 0; | |
1716 | } | |
1a3f239d RR |
1717 | |
1718 | static int __init parse_acpi(char *arg) | |
1719 | { | |
1720 | if (!arg) | |
1721 | return -EINVAL; | |
1722 | ||
1723 | /* "acpi=off" disables both ACPI table parsing and interpreter */ | |
1724 | if (strcmp(arg, "off") == 0) { | |
1725 | disable_acpi(); | |
1726 | } | |
1727 | /* acpi=force to over-ride black-list */ | |
1728 | else if (strcmp(arg, "force") == 0) { | |
1729 | acpi_force = 1; | |
1730 | acpi_ht = 1; | |
1731 | acpi_disabled = 0; | |
1732 | } | |
1733 | /* acpi=strict disables out-of-spec workarounds */ | |
1734 | else if (strcmp(arg, "strict") == 0) { | |
1735 | acpi_strict = 1; | |
1736 | } | |
1737 | /* Limit ACPI just to boot-time to enable HT */ | |
1738 | else if (strcmp(arg, "ht") == 0) { | |
1739 | if (!acpi_force) | |
1740 | disable_acpi(); | |
1741 | acpi_ht = 1; | |
1742 | } | |
1743 | /* "acpi=noirq" disables ACPI interrupt routing */ | |
1744 | else if (strcmp(arg, "noirq") == 0) { | |
1745 | acpi_noirq_set(); | |
1746 | } else { | |
1747 | /* Core will printk when we return error. */ | |
1748 | return -EINVAL; | |
1749 | } | |
1750 | return 0; | |
1751 | } | |
1752 | early_param("acpi", parse_acpi); | |
1753 | ||
1754 | /* FIXME: Using pci= for an ACPI parameter is a travesty. */ | |
1755 | static int __init parse_pci(char *arg) | |
1756 | { | |
1757 | if (arg && strcmp(arg, "noacpi") == 0) | |
1758 | acpi_disable_pci(); | |
1759 | return 0; | |
1760 | } | |
1761 | early_param("pci", parse_pci); | |
1762 | ||
3c999f14 YL |
1763 | int __init acpi_mps_check(void) |
1764 | { | |
1765 | #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE) | |
1766 | /* mptable code is not built-in*/ | |
1767 | if (acpi_disabled || acpi_noirq) { | |
1768 | printk(KERN_WARNING "MPS support code is not built-in.\n" | |
1769 | "Using acpi=off or acpi=noirq or pci=noacpi " | |
1770 | "may have problem\n"); | |
1771 | return 1; | |
1772 | } | |
1773 | #endif | |
1774 | return 0; | |
1775 | } | |
1776 | ||
1a3f239d RR |
1777 | #ifdef CONFIG_X86_IO_APIC |
1778 | static int __init parse_acpi_skip_timer_override(char *arg) | |
1779 | { | |
1780 | acpi_skip_timer_override = 1; | |
1781 | return 0; | |
1782 | } | |
1783 | early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override); | |
fa18f477 AK |
1784 | |
1785 | static int __init parse_acpi_use_timer_override(char *arg) | |
1786 | { | |
1787 | acpi_use_timer_override = 1; | |
1788 | return 0; | |
1789 | } | |
1790 | early_param("acpi_use_timer_override", parse_acpi_use_timer_override); | |
1a3f239d RR |
1791 | #endif /* CONFIG_X86_IO_APIC */ |
1792 | ||
1793 | static int __init setup_acpi_sci(char *s) | |
1794 | { | |
1795 | if (!s) | |
1796 | return -EINVAL; | |
1797 | if (!strcmp(s, "edge")) | |
5f3b1a8b AS |
1798 | acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE | |
1799 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1800 | else if (!strcmp(s, "level")) |
5f3b1a8b AS |
1801 | acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL | |
1802 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1803 | else if (!strcmp(s, "high")) |
5f3b1a8b AS |
1804 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH | |
1805 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d | 1806 | else if (!strcmp(s, "low")) |
5f3b1a8b AS |
1807 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW | |
1808 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d RR |
1809 | else |
1810 | return -EINVAL; | |
1811 | return 0; | |
1812 | } | |
1813 | early_param("acpi_sci", setup_acpi_sci); | |
d0a9081b AM |
1814 | |
1815 | int __acpi_acquire_global_lock(unsigned int *lock) | |
1816 | { | |
1817 | unsigned int old, new, val; | |
1818 | do { | |
1819 | old = *lock; | |
1820 | new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1)); | |
1821 | val = cmpxchg(lock, old, new); | |
1822 | } while (unlikely (val != old)); | |
1823 | return (new < 3) ? -1 : 0; | |
1824 | } | |
1825 | ||
1826 | int __acpi_release_global_lock(unsigned int *lock) | |
1827 | { | |
1828 | unsigned int old, new, val; | |
1829 | do { | |
1830 | old = *lock; | |
1831 | new = old & ~0x3; | |
1832 | val = cmpxchg(lock, old, new); | |
1833 | } while (unlikely (val != old)); | |
1834 | return old & 0x1; | |
1835 | } |