]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * boot.c - Architecture-Specific Low-Level ACPI Boot Support | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
5 | * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com> | |
6 | * | |
7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
24 | */ | |
25 | ||
26 | #include <linux/init.h> | |
1da177e4 | 27 | #include <linux/acpi.h> |
d66bea57 | 28 | #include <linux/acpi_pmtmr.h> |
1da177e4 | 29 | #include <linux/efi.h> |
73fea175 | 30 | #include <linux/cpumask.h> |
1da177e4 | 31 | #include <linux/module.h> |
aea00143 | 32 | #include <linux/dmi.h> |
b33fa1f3 | 33 | #include <linux/irq.h> |
f0f4c343 AD |
34 | #include <linux/bootmem.h> |
35 | #include <linux/ioport.h> | |
1da177e4 LT |
36 | |
37 | #include <asm/pgtable.h> | |
38 | #include <asm/io_apic.h> | |
39 | #include <asm/apic.h> | |
7b6aa335 | 40 | #include <asm/apic.h> |
1da177e4 | 41 | #include <asm/io.h> |
1da177e4 | 42 | #include <asm/mpspec.h> |
dfac2189 | 43 | #include <asm/smp.h> |
1da177e4 | 44 | |
e8924acb | 45 | static int __initdata acpi_force = 0; |
237889bf | 46 | u32 acpi_rsdt_forced; |
df3bb57d AK |
47 | #ifdef CONFIG_ACPI |
48 | int acpi_disabled = 0; | |
49 | #else | |
50 | int acpi_disabled = 1; | |
51 | #endif | |
52 | EXPORT_SYMBOL(acpi_disabled); | |
53 | ||
1da177e4 | 54 | #ifdef CONFIG_X86_64 |
1dcdd3d1 | 55 | # include <asm/proto.h> |
4be44fcd | 56 | #endif /* X86 */ |
1da177e4 LT |
57 | |
58 | #define BAD_MADT_ENTRY(entry, end) ( \ | |
59 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ | |
5f3b1a8b | 60 | ((struct acpi_subtable_header *)entry)->length < sizeof(*entry)) |
1da177e4 LT |
61 | |
62 | #define PREFIX "ACPI: " | |
63 | ||
90d53909 | 64 | int acpi_noirq; /* skip ACPI IRQ initialization */ |
6e4be1ff YL |
65 | int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ |
66 | EXPORT_SYMBOL(acpi_pci_disabled); | |
1da177e4 LT |
67 | int acpi_ht __initdata = 1; /* enable HT */ |
68 | ||
69 | int acpi_lapic; | |
70 | int acpi_ioapic; | |
71 | int acpi_strict; | |
1da177e4 | 72 | |
5f3b1a8b | 73 | u8 acpi_sci_flags __initdata; |
1da177e4 LT |
74 | int acpi_sci_override_gsi __initdata; |
75 | int acpi_skip_timer_override __initdata; | |
fa18f477 | 76 | int acpi_use_timer_override __initdata; |
1da177e4 LT |
77 | |
78 | #ifdef CONFIG_X86_LOCAL_APIC | |
79 | static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; | |
80 | #endif | |
81 | ||
82 | #ifndef __HAVE_ARCH_CMPXCHG | |
83 | #warning ACPI uses CMPXCHG, i486 and later hardware | |
84 | #endif | |
85 | ||
1da177e4 LT |
86 | /* -------------------------------------------------------------------------- |
87 | Boot-time Configuration | |
88 | -------------------------------------------------------------------------- */ | |
89 | ||
90 | /* | |
91 | * The default interrupt routing model is PIC (8259). This gets | |
27b46d76 | 92 | * overridden if IOAPICs are enumerated (below). |
1da177e4 | 93 | */ |
4be44fcd | 94 | enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; |
1da177e4 | 95 | |
1da177e4 LT |
96 | |
97 | /* | |
98 | * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END, | |
99 | * to map the target physical address. The problem is that set_fixmap() | |
100 | * provides a single page, and it is possible that the page is not | |
101 | * sufficient. | |
102 | * By using this area, we can map up to MAX_IO_APICS pages temporarily, | |
103 | * i.e. until the next __va_range() call. | |
104 | * | |
105 | * Important Safety Note: The fixed I/O APIC page numbers are *subtracted* | |
106 | * from the fixed base. That's why we start at FIX_IO_APIC_BASE_END and | |
107 | * count idx down while incrementing the phys address. | |
108 | */ | |
2fdf0741 | 109 | char *__init __acpi_map_table(unsigned long phys, unsigned long size) |
1da177e4 | 110 | { |
1da177e4 | 111 | |
f34fa82b YL |
112 | if (!phys || !size) |
113 | return NULL; | |
114 | ||
7d97277b YL |
115 | return early_ioremap(phys, size); |
116 | } | |
117 | void __init __acpi_unmap_table(char *map, unsigned long size) | |
118 | { | |
119 | if (!map || !size) | |
120 | return; | |
1c14fa49 | 121 | |
7d97277b | 122 | early_iounmap(map, size); |
1da177e4 | 123 | } |
1da177e4 LT |
124 | |
125 | #ifdef CONFIG_PCI_MMCONFIG | |
1339c367 PV |
126 | |
127 | static int acpi_mcfg_64bit_base_addr __initdata = FALSE; | |
128 | ||
54549391 | 129 | /* The physical address of the MMCONFIG aperture. Set from ACPI tables. */ |
15a58ed1 | 130 | struct acpi_mcfg_allocation *pci_mmcfg_config; |
54549391 GKH |
131 | int pci_mmcfg_config_num; |
132 | ||
a726c600 JK |
133 | static int __init acpi_mcfg_oem_check(struct acpi_table_mcfg *mcfg) |
134 | { | |
135 | if (!strcmp(mcfg->header.oem_id, "SGI")) | |
136 | acpi_mcfg_64bit_base_addr = TRUE; | |
137 | ||
138 | return 0; | |
139 | } | |
140 | ||
ceb6c468 | 141 | int __init acpi_parse_mcfg(struct acpi_table_header *header) |
1da177e4 LT |
142 | { |
143 | struct acpi_table_mcfg *mcfg; | |
54549391 GKH |
144 | unsigned long i; |
145 | int config_size; | |
1da177e4 | 146 | |
ceb6c468 | 147 | if (!header) |
1da177e4 LT |
148 | return -EINVAL; |
149 | ||
ceb6c468 | 150 | mcfg = (struct acpi_table_mcfg *)header; |
1da177e4 | 151 | |
54549391 GKH |
152 | /* how many config structures do we have */ |
153 | pci_mmcfg_config_num = 0; | |
ceb6c468 | 154 | i = header->length - sizeof(struct acpi_table_mcfg); |
15a58ed1 | 155 | while (i >= sizeof(struct acpi_mcfg_allocation)) { |
54549391 | 156 | ++pci_mmcfg_config_num; |
15a58ed1 | 157 | i -= sizeof(struct acpi_mcfg_allocation); |
54549391 GKH |
158 | }; |
159 | if (pci_mmcfg_config_num == 0) { | |
160 | printk(KERN_ERR PREFIX "MMCONFIG has no entries\n"); | |
1da177e4 LT |
161 | return -ENODEV; |
162 | } | |
163 | ||
54549391 GKH |
164 | config_size = pci_mmcfg_config_num * sizeof(*pci_mmcfg_config); |
165 | pci_mmcfg_config = kmalloc(config_size, GFP_KERNEL); | |
166 | if (!pci_mmcfg_config) { | |
167 | printk(KERN_WARNING PREFIX | |
168 | "No memory for MCFG config tables\n"); | |
169 | return -ENOMEM; | |
170 | } | |
171 | ||
ad363f80 | 172 | memcpy(pci_mmcfg_config, &mcfg[1], config_size); |
a726c600 JK |
173 | |
174 | acpi_mcfg_oem_check(mcfg); | |
175 | ||
54549391 | 176 | for (i = 0; i < pci_mmcfg_config_num; ++i) { |
a726c600 JK |
177 | if ((pci_mmcfg_config[i].address > 0xFFFFFFFF) && |
178 | !acpi_mcfg_64bit_base_addr) { | |
54549391 GKH |
179 | printk(KERN_ERR PREFIX |
180 | "MMCONFIG not in low 4GB of memory\n"); | |
acc7c2e0 KR |
181 | kfree(pci_mmcfg_config); |
182 | pci_mmcfg_config_num = 0; | |
54549391 GKH |
183 | return -ENODEV; |
184 | } | |
185 | } | |
1da177e4 LT |
186 | |
187 | return 0; | |
188 | } | |
4be44fcd | 189 | #endif /* CONFIG_PCI_MMCONFIG */ |
1da177e4 LT |
190 | |
191 | #ifdef CONFIG_X86_LOCAL_APIC | |
15a58ed1 | 192 | static int __init acpi_parse_madt(struct acpi_table_header *table) |
1da177e4 | 193 | { |
4be44fcd | 194 | struct acpi_table_madt *madt = NULL; |
1da177e4 | 195 | |
15a58ed1 | 196 | if (!cpu_has_apic) |
1da177e4 LT |
197 | return -EINVAL; |
198 | ||
15a58ed1 | 199 | madt = (struct acpi_table_madt *)table; |
1da177e4 LT |
200 | if (!madt) { |
201 | printk(KERN_WARNING PREFIX "Unable to map MADT\n"); | |
202 | return -ENODEV; | |
203 | } | |
204 | ||
ad363f80 AS |
205 | if (madt->address) { |
206 | acpi_lapic_addr = (u64) madt->address; | |
1da177e4 LT |
207 | |
208 | printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n", | |
ad363f80 | 209 | madt->address); |
1da177e4 LT |
210 | } |
211 | ||
306db03b IM |
212 | default_acpi_madt_oem_check(madt->header.oem_id, |
213 | madt->header.oem_table_id); | |
4be44fcd | 214 | |
1da177e4 LT |
215 | return 0; |
216 | } | |
217 | ||
dfac2189 AS |
218 | static void __cpuinit acpi_register_lapic(int id, u8 enabled) |
219 | { | |
fb3bbd6a YL |
220 | unsigned int ver = 0; |
221 | ||
dfac2189 AS |
222 | if (!enabled) { |
223 | ++disabled_cpus; | |
224 | return; | |
225 | } | |
226 | ||
fb3bbd6a YL |
227 | if (boot_cpu_physical_apicid != -1U) |
228 | ver = apic_version[boot_cpu_physical_apicid]; | |
fb3bbd6a YL |
229 | |
230 | generic_processor_info(id, ver); | |
dfac2189 AS |
231 | } |
232 | ||
1da177e4 | 233 | static int __init |
5f3b1a8b | 234 | acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 235 | { |
5f3b1a8b | 236 | struct acpi_madt_local_apic *processor = NULL; |
1da177e4 | 237 | |
5f3b1a8b | 238 | processor = (struct acpi_madt_local_apic *)header; |
1da177e4 LT |
239 | |
240 | if (BAD_MADT_ENTRY(processor, end)) | |
241 | return -EINVAL; | |
242 | ||
243 | acpi_table_print_madt_entry(header); | |
244 | ||
7f66ae48 AR |
245 | /* |
246 | * We need to register disabled CPU as well to permit | |
247 | * counting disabled CPUs. This allows us to size | |
248 | * cpus_possible_map more accurately, to permit | |
249 | * to not preallocating memory for all NR_CPUS | |
250 | * when we use CPU hotplug. | |
251 | */ | |
dfac2189 AS |
252 | acpi_register_lapic(processor->id, /* APIC ID */ |
253 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
1da177e4 LT |
254 | |
255 | return 0; | |
256 | } | |
257 | ||
ac049c1d JS |
258 | static int __init |
259 | acpi_parse_sapic(struct acpi_subtable_header *header, const unsigned long end) | |
260 | { | |
261 | struct acpi_madt_local_sapic *processor = NULL; | |
262 | ||
263 | processor = (struct acpi_madt_local_sapic *)header; | |
264 | ||
265 | if (BAD_MADT_ENTRY(processor, end)) | |
266 | return -EINVAL; | |
267 | ||
268 | acpi_table_print_madt_entry(header); | |
269 | ||
dfac2189 AS |
270 | acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */ |
271 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
ac049c1d JS |
272 | |
273 | return 0; | |
274 | } | |
275 | ||
1da177e4 | 276 | static int __init |
5f3b1a8b | 277 | acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header, |
4be44fcd | 278 | const unsigned long end) |
1da177e4 | 279 | { |
5f3b1a8b | 280 | struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL; |
1da177e4 | 281 | |
5f3b1a8b | 282 | lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header; |
1da177e4 LT |
283 | |
284 | if (BAD_MADT_ENTRY(lapic_addr_ovr, end)) | |
285 | return -EINVAL; | |
286 | ||
287 | acpi_lapic_addr = lapic_addr_ovr->address; | |
288 | ||
289 | return 0; | |
290 | } | |
291 | ||
292 | static int __init | |
5f3b1a8b | 293 | acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 294 | { |
5f3b1a8b | 295 | struct acpi_madt_local_apic_nmi *lapic_nmi = NULL; |
1da177e4 | 296 | |
5f3b1a8b | 297 | lapic_nmi = (struct acpi_madt_local_apic_nmi *)header; |
1da177e4 LT |
298 | |
299 | if (BAD_MADT_ENTRY(lapic_nmi, end)) | |
300 | return -EINVAL; | |
301 | ||
302 | acpi_table_print_madt_entry(header); | |
303 | ||
304 | if (lapic_nmi->lint != 1) | |
305 | printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n"); | |
306 | ||
307 | return 0; | |
308 | } | |
309 | ||
4be44fcd | 310 | #endif /*CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 311 | |
8466361a | 312 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 LT |
313 | |
314 | static int __init | |
5f3b1a8b | 315 | acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 316 | { |
5f3b1a8b | 317 | struct acpi_madt_io_apic *ioapic = NULL; |
1da177e4 | 318 | |
5f3b1a8b | 319 | ioapic = (struct acpi_madt_io_apic *)header; |
1da177e4 LT |
320 | |
321 | if (BAD_MADT_ENTRY(ioapic, end)) | |
322 | return -EINVAL; | |
4be44fcd | 323 | |
1da177e4 LT |
324 | acpi_table_print_madt_entry(header); |
325 | ||
4be44fcd LB |
326 | mp_register_ioapic(ioapic->id, |
327 | ioapic->address, ioapic->global_irq_base); | |
328 | ||
1da177e4 LT |
329 | return 0; |
330 | } | |
331 | ||
332 | /* | |
333 | * Parse Interrupt Source Override for the ACPI SCI | |
334 | */ | |
e82c354b | 335 | static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger) |
1da177e4 LT |
336 | { |
337 | if (trigger == 0) /* compatible SCI trigger is level */ | |
338 | trigger = 3; | |
339 | ||
340 | if (polarity == 0) /* compatible SCI polarity is low */ | |
341 | polarity = 3; | |
342 | ||
343 | /* Command-line over-ride via acpi_sci= */ | |
5f3b1a8b AS |
344 | if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) |
345 | trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2; | |
1da177e4 | 346 | |
5f3b1a8b AS |
347 | if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK) |
348 | polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK; | |
1da177e4 LT |
349 | |
350 | /* | |
4be44fcd | 351 | * mp_config_acpi_legacy_irqs() already setup IRQs < 16 |
1da177e4 LT |
352 | * If GSI is < 16, this will update its flags, |
353 | * else it will create a new mp_irqs[] entry. | |
354 | */ | |
7bdd21ce | 355 | mp_override_legacy_irq(gsi, polarity, trigger, gsi); |
1da177e4 LT |
356 | |
357 | /* | |
358 | * stash over-ride to indicate we've been here | |
cee324b1 | 359 | * and for later update of acpi_gbl_FADT |
1da177e4 | 360 | */ |
7bdd21ce | 361 | acpi_sci_override_gsi = gsi; |
1da177e4 LT |
362 | return; |
363 | } | |
364 | ||
365 | static int __init | |
5f3b1a8b | 366 | acpi_parse_int_src_ovr(struct acpi_subtable_header * header, |
4be44fcd | 367 | const unsigned long end) |
1da177e4 | 368 | { |
5f3b1a8b | 369 | struct acpi_madt_interrupt_override *intsrc = NULL; |
1da177e4 | 370 | |
5f3b1a8b | 371 | intsrc = (struct acpi_madt_interrupt_override *)header; |
1da177e4 LT |
372 | |
373 | if (BAD_MADT_ENTRY(intsrc, end)) | |
374 | return -EINVAL; | |
375 | ||
376 | acpi_table_print_madt_entry(header); | |
377 | ||
5f3b1a8b | 378 | if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) { |
7bdd21ce | 379 | acpi_sci_ioapic_setup(intsrc->global_irq, |
5f3b1a8b AS |
380 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, |
381 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2); | |
1da177e4 LT |
382 | return 0; |
383 | } | |
384 | ||
385 | if (acpi_skip_timer_override && | |
5f3b1a8b | 386 | intsrc->source_irq == 0 && intsrc->global_irq == 2) { |
4be44fcd LB |
387 | printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n"); |
388 | return 0; | |
1da177e4 LT |
389 | } |
390 | ||
5f3b1a8b AS |
391 | mp_override_legacy_irq(intsrc->source_irq, |
392 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, | |
393 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, | |
394 | intsrc->global_irq); | |
1da177e4 LT |
395 | |
396 | return 0; | |
397 | } | |
398 | ||
1da177e4 | 399 | static int __init |
5f3b1a8b | 400 | acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 401 | { |
5f3b1a8b | 402 | struct acpi_madt_nmi_source *nmi_src = NULL; |
1da177e4 | 403 | |
5f3b1a8b | 404 | nmi_src = (struct acpi_madt_nmi_source *)header; |
1da177e4 LT |
405 | |
406 | if (BAD_MADT_ENTRY(nmi_src, end)) | |
407 | return -EINVAL; | |
408 | ||
409 | acpi_table_print_madt_entry(header); | |
410 | ||
411 | /* TBD: Support nimsrc entries? */ | |
412 | ||
413 | return 0; | |
414 | } | |
415 | ||
4be44fcd | 416 | #endif /* CONFIG_X86_IO_APIC */ |
1da177e4 | 417 | |
1da177e4 LT |
418 | /* |
419 | * acpi_pic_sci_set_trigger() | |
5f3b1a8b | 420 | * |
1da177e4 LT |
421 | * use ELCR to set PIC-mode trigger type for SCI |
422 | * | |
423 | * If a PIC-mode SCI is not recognized or gives spurious IRQ7's | |
424 | * it may require Edge Trigger -- use "acpi_sci=edge" | |
425 | * | |
426 | * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers | |
427 | * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. | |
27b46d76 SA |
428 | * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0) |
429 | * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0) | |
1da177e4 LT |
430 | */ |
431 | ||
4be44fcd | 432 | void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) |
1da177e4 LT |
433 | { |
434 | unsigned int mask = 1 << irq; | |
435 | unsigned int old, new; | |
436 | ||
437 | /* Real old ELCR mask */ | |
438 | old = inb(0x4d0) | (inb(0x4d1) << 8); | |
439 | ||
440 | /* | |
27b46d76 | 441 | * If we use ACPI to set PCI IRQs, then we should clear ELCR |
1da177e4 LT |
442 | * since we will set it correctly as we enable the PCI irq |
443 | * routing. | |
444 | */ | |
445 | new = acpi_noirq ? old : 0; | |
446 | ||
447 | /* | |
448 | * Update SCI information in the ELCR, it isn't in the PCI | |
449 | * routing tables.. | |
450 | */ | |
451 | switch (trigger) { | |
4be44fcd | 452 | case 1: /* Edge - clear */ |
1da177e4 LT |
453 | new &= ~mask; |
454 | break; | |
4be44fcd | 455 | case 3: /* Level - set */ |
1da177e4 LT |
456 | new |= mask; |
457 | break; | |
458 | } | |
459 | ||
460 | if (old == new) | |
461 | return; | |
462 | ||
463 | printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old); | |
464 | outb(new, 0x4d0); | |
465 | outb(new >> 8, 0x4d1); | |
466 | } | |
467 | ||
1da177e4 LT |
468 | int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) |
469 | { | |
f023d764 | 470 | *irq = gsi; |
1da177e4 LT |
471 | return 0; |
472 | } | |
473 | ||
1f3a6a15 KK |
474 | /* |
475 | * success: return IRQ number (>=0) | |
476 | * failure: return < 0 | |
477 | */ | |
cb654695 | 478 | int acpi_register_gsi(u32 gsi, int triggering, int polarity) |
1da177e4 LT |
479 | { |
480 | unsigned int irq; | |
481 | unsigned int plat_gsi = gsi; | |
482 | ||
483 | #ifdef CONFIG_PCI | |
484 | /* | |
485 | * Make sure all (legacy) PCI IRQs are set as level-triggered. | |
486 | */ | |
487 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { | |
cb654695 | 488 | if (triggering == ACPI_LEVEL_SENSITIVE) |
4be44fcd | 489 | eisa_set_level_irq(gsi); |
1da177e4 LT |
490 | } |
491 | #endif | |
492 | ||
493 | #ifdef CONFIG_X86_IO_APIC | |
494 | if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) { | |
cb654695 | 495 | plat_gsi = mp_register_gsi(gsi, triggering, polarity); |
1da177e4 LT |
496 | } |
497 | #endif | |
498 | acpi_gsi_to_irq(plat_gsi, &irq); | |
499 | return irq; | |
500 | } | |
4be44fcd | 501 | |
1da177e4 LT |
502 | /* |
503 | * ACPI based hotplug support for CPU | |
504 | */ | |
505 | #ifdef CONFIG_ACPI_HOTPLUG_CPU | |
009cbadb SR |
506 | |
507 | static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu) | |
1da177e4 | 508 | { |
73fea175 AR |
509 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; |
510 | union acpi_object *obj; | |
5f3b1a8b | 511 | struct acpi_madt_local_apic *lapic; |
ee943a82 | 512 | cpumask_var_t tmp_map, new_map; |
73fea175 AR |
513 | u8 physid; |
514 | int cpu; | |
ee943a82 | 515 | int retval = -ENOMEM; |
73fea175 AR |
516 | |
517 | if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer))) | |
518 | return -EINVAL; | |
519 | ||
520 | if (!buffer.length || !buffer.pointer) | |
521 | return -EINVAL; | |
522 | ||
523 | obj = buffer.pointer; | |
524 | if (obj->type != ACPI_TYPE_BUFFER || | |
525 | obj->buffer.length < sizeof(*lapic)) { | |
526 | kfree(buffer.pointer); | |
527 | return -EINVAL; | |
528 | } | |
529 | ||
5f3b1a8b | 530 | lapic = (struct acpi_madt_local_apic *)obj->buffer.pointer; |
73fea175 | 531 | |
5f3b1a8b AS |
532 | if (lapic->header.type != ACPI_MADT_TYPE_LOCAL_APIC || |
533 | !(lapic->lapic_flags & ACPI_MADT_ENABLED)) { | |
73fea175 AR |
534 | kfree(buffer.pointer); |
535 | return -EINVAL; | |
536 | } | |
537 | ||
538 | physid = lapic->id; | |
539 | ||
540 | kfree(buffer.pointer); | |
541 | buffer.length = ACPI_ALLOCATE_BUFFER; | |
542 | buffer.pointer = NULL; | |
543 | ||
ee943a82 RR |
544 | if (!alloc_cpumask_var(&tmp_map, GFP_KERNEL)) |
545 | goto out; | |
546 | ||
547 | if (!alloc_cpumask_var(&new_map, GFP_KERNEL)) | |
548 | goto free_tmp_map; | |
549 | ||
550 | cpumask_copy(tmp_map, cpu_present_mask); | |
dfac2189 | 551 | acpi_register_lapic(physid, lapic->lapic_flags & ACPI_MADT_ENABLED); |
73fea175 AR |
552 | |
553 | /* | |
554 | * If mp_register_lapic successfully generates a new logical cpu | |
555 | * number, then the following will get us exactly what was mapped | |
556 | */ | |
ee943a82 RR |
557 | cpumask_andnot(new_map, cpu_present_mask, tmp_map); |
558 | if (cpumask_empty(new_map)) { | |
73fea175 | 559 | printk ("Unable to map lapic to logical cpu number\n"); |
ee943a82 RR |
560 | retval = -EINVAL; |
561 | goto free_new_map; | |
73fea175 AR |
562 | } |
563 | ||
ee943a82 | 564 | cpu = cpumask_first(new_map); |
73fea175 AR |
565 | |
566 | *pcpu = cpu; | |
ee943a82 RR |
567 | retval = 0; |
568 | ||
569 | free_new_map: | |
570 | free_cpumask_var(new_map); | |
571 | free_tmp_map: | |
572 | free_cpumask_var(tmp_map); | |
573 | out: | |
574 | return retval; | |
1da177e4 | 575 | } |
1da177e4 | 576 | |
009cbadb SR |
577 | /* wrapper to silence section mismatch warning */ |
578 | int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu) | |
579 | { | |
580 | return _acpi_map_lsapic(handle, pcpu); | |
581 | } | |
4be44fcd | 582 | EXPORT_SYMBOL(acpi_map_lsapic); |
1da177e4 | 583 | |
4be44fcd | 584 | int acpi_unmap_lsapic(int cpu) |
1da177e4 | 585 | { |
71fff5e6 | 586 | per_cpu(x86_cpu_to_apicid, cpu) = -1; |
9628937d | 587 | set_cpu_present(cpu, false); |
73fea175 AR |
588 | num_processors--; |
589 | ||
590 | return (0); | |
1da177e4 | 591 | } |
4be44fcd | 592 | |
1da177e4 | 593 | EXPORT_SYMBOL(acpi_unmap_lsapic); |
4be44fcd | 594 | #endif /* CONFIG_ACPI_HOTPLUG_CPU */ |
1da177e4 | 595 | |
4be44fcd | 596 | int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base) |
b1bb248a KK |
597 | { |
598 | /* TBD */ | |
599 | return -EINVAL; | |
600 | } | |
4be44fcd | 601 | |
b1bb248a KK |
602 | EXPORT_SYMBOL(acpi_register_ioapic); |
603 | ||
4be44fcd | 604 | int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base) |
b1bb248a KK |
605 | { |
606 | /* TBD */ | |
607 | return -EINVAL; | |
608 | } | |
4be44fcd | 609 | |
b1bb248a KK |
610 | EXPORT_SYMBOL(acpi_unregister_ioapic); |
611 | ||
5f3b1a8b | 612 | static int __init acpi_parse_sbf(struct acpi_table_header *table) |
1da177e4 | 613 | { |
5f3b1a8b | 614 | struct acpi_table_boot *sb; |
1da177e4 | 615 | |
5f3b1a8b | 616 | sb = (struct acpi_table_boot *)table; |
1da177e4 LT |
617 | if (!sb) { |
618 | printk(KERN_WARNING PREFIX "Unable to map SBF\n"); | |
619 | return -ENODEV; | |
620 | } | |
621 | ||
5f3b1a8b | 622 | sbf_port = sb->cmos_index; /* Save CMOS port */ |
1da177e4 LT |
623 | |
624 | return 0; | |
625 | } | |
626 | ||
1da177e4 | 627 | #ifdef CONFIG_HPET_TIMER |
2d0c87c3 | 628 | #include <asm/hpet.h> |
1da177e4 | 629 | |
a1dfd851 AD |
630 | static struct __initdata resource *hpet_res; |
631 | ||
5f3b1a8b | 632 | static int __init acpi_parse_hpet(struct acpi_table_header *table) |
1da177e4 LT |
633 | { |
634 | struct acpi_table_hpet *hpet_tbl; | |
635 | ||
5f3b1a8b | 636 | hpet_tbl = (struct acpi_table_hpet *)table; |
1da177e4 LT |
637 | if (!hpet_tbl) { |
638 | printk(KERN_WARNING PREFIX "Unable to map HPET\n"); | |
639 | return -ENODEV; | |
640 | } | |
641 | ||
ad363f80 | 642 | if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) { |
1da177e4 LT |
643 | printk(KERN_WARNING PREFIX "HPET timers must be located in " |
644 | "memory.\n"); | |
645 | return -1; | |
646 | } | |
f0f4c343 | 647 | |
2d0c87c3 | 648 | hpet_address = hpet_tbl->address.address; |
f4df73c2 TG |
649 | |
650 | /* | |
651 | * Some broken BIOSes advertise HPET at 0x0. We really do not | |
652 | * want to allocate a resource there. | |
653 | */ | |
654 | if (!hpet_address) { | |
655 | printk(KERN_WARNING PREFIX | |
656 | "HPET id: %#x base: %#lx is invalid\n", | |
657 | hpet_tbl->id, hpet_address); | |
658 | return 0; | |
659 | } | |
660 | #ifdef CONFIG_X86_64 | |
661 | /* | |
662 | * Some even more broken BIOSes advertise HPET at | |
663 | * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add | |
664 | * some noise: | |
665 | */ | |
666 | if (hpet_address == 0xfed0000000000000UL) { | |
667 | if (!hpet_force_user) { | |
668 | printk(KERN_WARNING PREFIX "HPET id: %#x " | |
669 | "base: 0xfed0000000000000 is bogus\n " | |
670 | "try hpet=force on the kernel command line to " | |
671 | "fix it up to 0xfed00000.\n", hpet_tbl->id); | |
672 | hpet_address = 0; | |
673 | return 0; | |
674 | } | |
675 | printk(KERN_WARNING PREFIX | |
676 | "HPET id: %#x base: 0xfed0000000000000 fixed up " | |
677 | "to 0xfed00000.\n", hpet_tbl->id); | |
678 | hpet_address >>= 32; | |
679 | } | |
680 | #endif | |
4be44fcd | 681 | printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n", |
2d0c87c3 | 682 | hpet_tbl->id, hpet_address); |
1da177e4 | 683 | |
a1dfd851 AD |
684 | /* |
685 | * Allocate and initialize the HPET firmware resource for adding into | |
686 | * the resource tree during the lateinit timeframe. | |
687 | */ | |
688 | #define HPET_RESOURCE_NAME_SIZE 9 | |
689 | hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE); | |
690 | ||
a1dfd851 AD |
691 | hpet_res->name = (void *)&hpet_res[1]; |
692 | hpet_res->flags = IORESOURCE_MEM; | |
693 | snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u", | |
694 | hpet_tbl->sequence); | |
695 | ||
696 | hpet_res->start = hpet_address; | |
697 | hpet_res->end = hpet_address + (1 * 1024) - 1; | |
698 | ||
1da177e4 LT |
699 | return 0; |
700 | } | |
a1dfd851 AD |
701 | |
702 | /* | |
703 | * hpet_insert_resource inserts the HPET resources used into the resource | |
704 | * tree. | |
705 | */ | |
706 | static __init int hpet_insert_resource(void) | |
707 | { | |
708 | if (!hpet_res) | |
709 | return 1; | |
710 | ||
711 | return insert_resource(&iomem_resource, hpet_res); | |
712 | } | |
713 | ||
714 | late_initcall(hpet_insert_resource); | |
715 | ||
1da177e4 LT |
716 | #else |
717 | #define acpi_parse_hpet NULL | |
718 | #endif | |
719 | ||
5f3b1a8b | 720 | static int __init acpi_parse_fadt(struct acpi_table_header *table) |
1da177e4 | 721 | { |
90660ec3 | 722 | |
1da177e4 LT |
723 | #ifdef CONFIG_X86_PM_TIMER |
724 | /* detect the location of the ACPI PM Timer */ | |
5f3b1a8b | 725 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) { |
1da177e4 | 726 | /* FADT rev. 2 */ |
5f3b1a8b | 727 | if (acpi_gbl_FADT.xpm_timer_block.space_id != |
4be44fcd | 728 | ACPI_ADR_SPACE_SYSTEM_IO) |
1da177e4 LT |
729 | return 0; |
730 | ||
5f3b1a8b | 731 | pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address; |
e6e87b4b DSL |
732 | /* |
733 | * "X" fields are optional extensions to the original V1.0 | |
734 | * fields, so we must selectively expand V1.0 fields if the | |
735 | * corresponding X field is zero. | |
736 | */ | |
737 | if (!pmtmr_ioport) | |
5f3b1a8b | 738 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
739 | } else { |
740 | /* FADT rev. 1 */ | |
5f3b1a8b | 741 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
742 | } |
743 | if (pmtmr_ioport) | |
4be44fcd LB |
744 | printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n", |
745 | pmtmr_ioport); | |
1da177e4 LT |
746 | #endif |
747 | return 0; | |
748 | } | |
749 | ||
1da177e4 LT |
750 | #ifdef CONFIG_X86_LOCAL_APIC |
751 | /* | |
752 | * Parse LAPIC entries in MADT | |
753 | * returns 0 on success, < 0 on error | |
754 | */ | |
31d2092e AS |
755 | |
756 | static void __init acpi_register_lapic_address(unsigned long address) | |
757 | { | |
758 | mp_lapic_addr = address; | |
759 | ||
760 | set_fixmap_nocache(FIX_APIC_BASE, address); | |
fb3bbd6a | 761 | if (boot_cpu_physical_apicid == -1U) { |
4c9961d5 | 762 | boot_cpu_physical_apicid = read_apic_id(); |
fb3bbd6a YL |
763 | apic_version[boot_cpu_physical_apicid] = |
764 | GET_APIC_VERSION(apic_read(APIC_LVR)); | |
fb3bbd6a | 765 | } |
31d2092e AS |
766 | } |
767 | ||
cbf9bd60 YL |
768 | static int __init early_acpi_parse_madt_lapic_addr_ovr(void) |
769 | { | |
770 | int count; | |
771 | ||
772 | if (!cpu_has_apic) | |
773 | return -ENODEV; | |
774 | ||
775 | /* | |
776 | * Note that the LAPIC address is obtained from the MADT (32-bit value) | |
777 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
778 | */ | |
779 | ||
780 | count = | |
781 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, | |
782 | acpi_parse_lapic_addr_ovr, 0); | |
783 | if (count < 0) { | |
784 | printk(KERN_ERR PREFIX | |
785 | "Error parsing LAPIC address override entry\n"); | |
786 | return count; | |
787 | } | |
788 | ||
789 | acpi_register_lapic_address(acpi_lapic_addr); | |
790 | ||
791 | return count; | |
792 | } | |
793 | ||
4be44fcd | 794 | static int __init acpi_parse_madt_lapic_entries(void) |
1da177e4 LT |
795 | { |
796 | int count; | |
797 | ||
0fcd2709 AK |
798 | if (!cpu_has_apic) |
799 | return -ENODEV; | |
800 | ||
5f3b1a8b | 801 | /* |
1da177e4 LT |
802 | * Note that the LAPIC address is obtained from the MADT (32-bit value) |
803 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
804 | */ | |
805 | ||
4be44fcd | 806 | count = |
5f3b1a8b | 807 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, |
4be44fcd | 808 | acpi_parse_lapic_addr_ovr, 0); |
1da177e4 | 809 | if (count < 0) { |
4be44fcd LB |
810 | printk(KERN_ERR PREFIX |
811 | "Error parsing LAPIC address override entry\n"); | |
1da177e4 LT |
812 | return count; |
813 | } | |
814 | ||
31d2092e | 815 | acpi_register_lapic_address(acpi_lapic_addr); |
1da177e4 | 816 | |
ac049c1d JS |
817 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC, |
818 | acpi_parse_sapic, MAX_APICS); | |
819 | ||
820 | if (!count) | |
821 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC, | |
822 | acpi_parse_lapic, MAX_APICS); | |
4be44fcd | 823 | if (!count) { |
1da177e4 LT |
824 | printk(KERN_ERR PREFIX "No LAPIC entries present\n"); |
825 | /* TBD: Cleanup to allow fallback to MPS */ | |
826 | return -ENODEV; | |
4be44fcd | 827 | } else if (count < 0) { |
1da177e4 LT |
828 | printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n"); |
829 | /* TBD: Cleanup to allow fallback to MPS */ | |
830 | return count; | |
831 | } | |
832 | ||
4be44fcd | 833 | count = |
5f3b1a8b | 834 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, acpi_parse_lapic_nmi, 0); |
1da177e4 LT |
835 | if (count < 0) { |
836 | printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n"); | |
837 | /* TBD: Cleanup to allow fallback to MPS */ | |
838 | return count; | |
839 | } | |
840 | return 0; | |
841 | } | |
4be44fcd | 842 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 843 | |
8466361a | 844 | #ifdef CONFIG_X86_IO_APIC |
11113f84 AS |
845 | #define MP_ISA_BUS 0 |
846 | ||
d49c4288 | 847 | #ifdef CONFIG_X86_ES7000 |
11113f84 AS |
848 | extern int es7000_plat; |
849 | #endif | |
850 | ||
5f895148 AS |
851 | static struct { |
852 | int apic_id; | |
853 | int gsi_base; | |
854 | int gsi_end; | |
855 | DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); | |
856 | } mp_ioapic_routing[MAX_IO_APICS]; | |
11113f84 | 857 | |
4924e228 | 858 | int mp_find_ioapic(int gsi) |
11113f84 AS |
859 | { |
860 | int i = 0; | |
861 | ||
862 | /* Find the IOAPIC that manages this GSI. */ | |
863 | for (i = 0; i < nr_ioapics; i++) { | |
864 | if ((gsi >= mp_ioapic_routing[i].gsi_base) | |
865 | && (gsi <= mp_ioapic_routing[i].gsi_end)) | |
866 | return i; | |
867 | } | |
868 | ||
869 | printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi); | |
870 | return -1; | |
871 | } | |
872 | ||
c3e137d1 JF |
873 | int mp_find_ioapic_pin(int ioapic, int gsi) |
874 | { | |
875 | if (WARN_ON(ioapic == -1)) | |
876 | return -1; | |
877 | if (WARN_ON(gsi > mp_ioapic_routing[ioapic].gsi_end)) | |
878 | return -1; | |
879 | ||
880 | return gsi - mp_ioapic_routing[ioapic].gsi_base; | |
881 | } | |
882 | ||
11113f84 AS |
883 | static u8 __init uniq_ioapic_id(u8 id) |
884 | { | |
885 | #ifdef CONFIG_X86_32 | |
886 | if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && | |
887 | !APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) | |
888 | return io_apic_get_unique_id(nr_ioapics, id); | |
889 | else | |
890 | return id; | |
891 | #else | |
892 | int i; | |
893 | DECLARE_BITMAP(used, 256); | |
894 | bitmap_zero(used, 256); | |
895 | for (i = 0; i < nr_ioapics; i++) { | |
b5ba7e6d JSR |
896 | struct mpc_ioapic *ia = &mp_ioapics[i]; |
897 | __set_bit(ia->apicid, used); | |
11113f84 AS |
898 | } |
899 | if (!test_bit(id, used)) | |
900 | return id; | |
901 | return find_first_zero_bit(used, 256); | |
902 | #endif | |
903 | } | |
904 | ||
905 | static int bad_ioapic(unsigned long address) | |
906 | { | |
907 | if (nr_ioapics >= MAX_IO_APICS) { | |
908 | printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " | |
909 | "(found %d)\n", MAX_IO_APICS, nr_ioapics); | |
910 | panic("Recompile kernel with bigger MAX_IO_APICS!\n"); | |
911 | } | |
912 | if (!address) { | |
913 | printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" | |
914 | " found in table, skipping!\n"); | |
915 | return 1; | |
916 | } | |
917 | return 0; | |
918 | } | |
919 | ||
920 | void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) | |
921 | { | |
922 | int idx = 0; | |
923 | ||
924 | if (bad_ioapic(address)) | |
925 | return; | |
926 | ||
927 | idx = nr_ioapics; | |
928 | ||
b5ba7e6d JSR |
929 | mp_ioapics[idx].type = MP_IOAPIC; |
930 | mp_ioapics[idx].flags = MPC_APIC_USABLE; | |
931 | mp_ioapics[idx].apicaddr = address; | |
11113f84 AS |
932 | |
933 | set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); | |
b5ba7e6d | 934 | mp_ioapics[idx].apicid = uniq_ioapic_id(id); |
11113f84 | 935 | #ifdef CONFIG_X86_32 |
b5ba7e6d | 936 | mp_ioapics[idx].apicver = io_apic_get_version(idx); |
11113f84 | 937 | #else |
b5ba7e6d | 938 | mp_ioapics[idx].apicver = 0; |
11113f84 AS |
939 | #endif |
940 | /* | |
941 | * Build basic GSI lookup table to facilitate gsi->io_apic lookups | |
942 | * and to prevent reprogramming of IOAPIC pins (PCI GSIs). | |
943 | */ | |
b5ba7e6d | 944 | mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].apicid; |
11113f84 AS |
945 | mp_ioapic_routing[idx].gsi_base = gsi_base; |
946 | mp_ioapic_routing[idx].gsi_end = gsi_base + | |
947 | io_apic_get_redir_entries(idx); | |
948 | ||
b5ba7e6d JSR |
949 | printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%x, " |
950 | "GSI %d-%d\n", idx, mp_ioapics[idx].apicid, | |
951 | mp_ioapics[idx].apicver, mp_ioapics[idx].apicaddr, | |
11113f84 AS |
952 | mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end); |
953 | ||
954 | nr_ioapics++; | |
955 | } | |
956 | ||
cc6c5006 YL |
957 | int __init acpi_probe_gsi(void) |
958 | { | |
959 | int idx; | |
960 | int gsi; | |
961 | int max_gsi = 0; | |
962 | ||
963 | if (acpi_disabled) | |
964 | return 0; | |
965 | ||
966 | if (!acpi_ioapic) | |
967 | return 0; | |
968 | ||
969 | max_gsi = 0; | |
970 | for (idx = 0; idx < nr_ioapics; idx++) { | |
971 | gsi = mp_ioapic_routing[idx].gsi_end; | |
972 | ||
973 | if (gsi > max_gsi) | |
974 | max_gsi = gsi; | |
975 | } | |
976 | ||
977 | return max_gsi + 1; | |
978 | } | |
979 | ||
c2c21745 JSR |
980 | static void assign_to_mp_irq(struct mpc_intsrc *m, |
981 | struct mpc_intsrc *mp_irq) | |
fcfa146e | 982 | { |
c2c21745 | 983 | memcpy(mp_irq, m, sizeof(struct mpc_intsrc)); |
fcfa146e YL |
984 | } |
985 | ||
c2c21745 JSR |
986 | static int mp_irq_cmp(struct mpc_intsrc *mp_irq, |
987 | struct mpc_intsrc *m) | |
fcfa146e | 988 | { |
c2c21745 | 989 | return memcmp(mp_irq, m, sizeof(struct mpc_intsrc)); |
fcfa146e YL |
990 | } |
991 | ||
c2c21745 | 992 | static void save_mp_irq(struct mpc_intsrc *m) |
fcfa146e YL |
993 | { |
994 | int i; | |
995 | ||
996 | for (i = 0; i < mp_irq_entries; i++) { | |
997 | if (!mp_irq_cmp(&mp_irqs[i], m)) | |
998 | return; | |
999 | } | |
1000 | ||
1001 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | |
1002 | if (++mp_irq_entries == MAX_IRQ_SOURCES) | |
1003 | panic("Max # of irq sources exceeded!!\n"); | |
1004 | } | |
1005 | ||
11113f84 AS |
1006 | void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) |
1007 | { | |
6df8809b YL |
1008 | int ioapic; |
1009 | int pin; | |
c2c21745 | 1010 | struct mpc_intsrc mp_irq; |
11113f84 AS |
1011 | |
1012 | /* | |
1013 | * Convert 'gsi' to 'ioapic.pin'. | |
1014 | */ | |
1015 | ioapic = mp_find_ioapic(gsi); | |
1016 | if (ioapic < 0) | |
1017 | return; | |
c3e137d1 | 1018 | pin = mp_find_ioapic_pin(ioapic, gsi); |
11113f84 AS |
1019 | |
1020 | /* | |
1021 | * TBD: This check is for faulty timer entries, where the override | |
1022 | * erroneously sets the trigger to level, resulting in a HUGE | |
1023 | * increase of timer interrupts! | |
1024 | */ | |
1025 | if ((bus_irq == 0) && (trigger == 3)) | |
1026 | trigger = 1; | |
1027 | ||
c2c21745 JSR |
1028 | mp_irq.type = MP_INTSRC; |
1029 | mp_irq.irqtype = mp_INT; | |
1030 | mp_irq.irqflag = (trigger << 2) | polarity; | |
1031 | mp_irq.srcbus = MP_ISA_BUS; | |
1032 | mp_irq.srcbusirq = bus_irq; /* IRQ */ | |
1033 | mp_irq.dstapic = mp_ioapics[ioapic].apicid; /* APIC ID */ | |
1034 | mp_irq.dstirq = pin; /* INTIN# */ | |
11113f84 | 1035 | |
fcfa146e | 1036 | save_mp_irq(&mp_irq); |
11113f84 AS |
1037 | } |
1038 | ||
1039 | void __init mp_config_acpi_legacy_irqs(void) | |
1040 | { | |
6df8809b YL |
1041 | int i; |
1042 | int ioapic; | |
1043 | unsigned int dstapic; | |
c2c21745 | 1044 | struct mpc_intsrc mp_irq; |
11113f84 AS |
1045 | |
1046 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) | |
1047 | /* | |
1048 | * Fabricate the legacy ISA bus (bus #31). | |
1049 | */ | |
1050 | mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; | |
1051 | #endif | |
1052 | set_bit(MP_ISA_BUS, mp_bus_not_pci); | |
cfc1b9a6 | 1053 | pr_debug("Bus #%d is ISA\n", MP_ISA_BUS); |
11113f84 | 1054 | |
d49c4288 | 1055 | #ifdef CONFIG_X86_ES7000 |
11113f84 AS |
1056 | /* |
1057 | * Older generations of ES7000 have no legacy identity mappings | |
1058 | */ | |
1059 | if (es7000_plat == 1) | |
1060 | return; | |
1061 | #endif | |
1062 | ||
1063 | /* | |
1064 | * Locate the IOAPIC that manages the ISA IRQs (0-15). | |
1065 | */ | |
1066 | ioapic = mp_find_ioapic(0); | |
1067 | if (ioapic < 0) | |
1068 | return; | |
b5ba7e6d | 1069 | dstapic = mp_ioapics[ioapic].apicid; |
11113f84 | 1070 | |
11113f84 AS |
1071 | /* |
1072 | * Use the default configuration for the IRQs 0-15. Unless | |
1073 | * overridden by (MADT) interrupt source override entries. | |
1074 | */ | |
1075 | for (i = 0; i < 16; i++) { | |
1076 | int idx; | |
1077 | ||
1078 | for (idx = 0; idx < mp_irq_entries; idx++) { | |
c2c21745 | 1079 | struct mpc_intsrc *irq = mp_irqs + idx; |
11113f84 AS |
1080 | |
1081 | /* Do we already have a mapping for this ISA IRQ? */ | |
c2c21745 | 1082 | if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i) |
11113f84 AS |
1083 | break; |
1084 | ||
1085 | /* Do we already have a mapping for this IOAPIC pin */ | |
c2c21745 | 1086 | if (irq->dstapic == dstapic && irq->dstirq == i) |
11113f84 AS |
1087 | break; |
1088 | } | |
1089 | ||
1090 | if (idx != mp_irq_entries) { | |
1091 | printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i); | |
1092 | continue; /* IRQ already used */ | |
1093 | } | |
1094 | ||
c2c21745 JSR |
1095 | mp_irq.type = MP_INTSRC; |
1096 | mp_irq.irqflag = 0; /* Conforming */ | |
1097 | mp_irq.srcbus = MP_ISA_BUS; | |
1098 | mp_irq.dstapic = dstapic; | |
1099 | mp_irq.irqtype = mp_INT; | |
1100 | mp_irq.srcbusirq = i; /* Identity mapped */ | |
1101 | mp_irq.dstirq = i; | |
11113f84 | 1102 | |
fcfa146e | 1103 | save_mp_irq(&mp_irq); |
11113f84 AS |
1104 | } |
1105 | } | |
1106 | ||
1107 | int mp_register_gsi(u32 gsi, int triggering, int polarity) | |
1108 | { | |
1109 | int ioapic; | |
1110 | int ioapic_pin; | |
1111 | #ifdef CONFIG_X86_32 | |
1112 | #define MAX_GSI_NUM 4096 | |
1113 | #define IRQ_COMPRESSION_START 64 | |
1114 | ||
1115 | static int pci_irq = IRQ_COMPRESSION_START; | |
1116 | /* | |
1117 | * Mapping between Global System Interrupts, which | |
1118 | * represent all possible interrupts, and IRQs | |
1119 | * assigned to actual devices. | |
1120 | */ | |
1121 | static int gsi_to_irq[MAX_GSI_NUM]; | |
1122 | #else | |
1123 | ||
1124 | if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) | |
1125 | return gsi; | |
1126 | #endif | |
1127 | ||
1128 | /* Don't set up the ACPI SCI because it's already set up */ | |
1129 | if (acpi_gbl_FADT.sci_interrupt == gsi) | |
1130 | return gsi; | |
1131 | ||
1132 | ioapic = mp_find_ioapic(gsi); | |
1133 | if (ioapic < 0) { | |
1134 | printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi); | |
1135 | return gsi; | |
1136 | } | |
1137 | ||
c3e137d1 | 1138 | ioapic_pin = mp_find_ioapic_pin(ioapic, gsi); |
11113f84 AS |
1139 | |
1140 | #ifdef CONFIG_X86_32 | |
1141 | if (ioapic_renumber_irq) | |
1142 | gsi = ioapic_renumber_irq(ioapic, gsi); | |
1143 | #endif | |
1144 | ||
1145 | /* | |
1146 | * Avoid pin reprogramming. PRTs typically include entries | |
1147 | * with redundant pin->gsi mappings (but unique PCI devices); | |
1148 | * we only program the IOAPIC on the first. | |
1149 | */ | |
1150 | if (ioapic_pin > MP_MAX_IOAPIC_PIN) { | |
1151 | printk(KERN_ERR "Invalid reference to IOAPIC pin " | |
1152 | "%d-%d\n", mp_ioapic_routing[ioapic].apic_id, | |
1153 | ioapic_pin); | |
1154 | return gsi; | |
1155 | } | |
1156 | if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) { | |
55410791 | 1157 | pr_debug("Pin %d-%d already programmed\n", |
cfc1b9a6 | 1158 | mp_ioapic_routing[ioapic].apic_id, ioapic_pin); |
11113f84 AS |
1159 | #ifdef CONFIG_X86_32 |
1160 | return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]); | |
1161 | #else | |
1162 | return gsi; | |
1163 | #endif | |
1164 | } | |
1165 | ||
1166 | set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed); | |
1167 | #ifdef CONFIG_X86_32 | |
1168 | /* | |
1169 | * For GSI >= 64, use IRQ compression | |
1170 | */ | |
1171 | if ((gsi >= IRQ_COMPRESSION_START) | |
1172 | && (triggering == ACPI_LEVEL_SENSITIVE)) { | |
1173 | /* | |
1174 | * For PCI devices assign IRQs in order, avoiding gaps | |
1175 | * due to unused I/O APIC pins. | |
1176 | */ | |
1177 | int irq = gsi; | |
1178 | if (gsi < MAX_GSI_NUM) { | |
1179 | /* | |
1180 | * Retain the VIA chipset work-around (gsi > 15), but | |
1181 | * avoid a problem where the 8254 timer (IRQ0) is setup | |
1182 | * via an override (so it's not on pin 0 of the ioapic), | |
1183 | * and at the same time, the pin 0 interrupt is a PCI | |
1184 | * type. The gsi > 15 test could cause these two pins | |
1185 | * to be shared as IRQ0, and they are not shareable. | |
1186 | * So test for this condition, and if necessary, avoid | |
1187 | * the pin collision. | |
1188 | */ | |
1189 | gsi = pci_irq++; | |
1190 | /* | |
1191 | * Don't assign IRQ used by ACPI SCI | |
1192 | */ | |
1193 | if (gsi == acpi_gbl_FADT.sci_interrupt) | |
1194 | gsi = pci_irq++; | |
1195 | gsi_to_irq[irq] = gsi; | |
1196 | } else { | |
1197 | printk(KERN_ERR "GSI %u is too high\n", gsi); | |
1198 | return gsi; | |
1199 | } | |
1200 | } | |
1201 | #endif | |
1202 | io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, | |
1203 | triggering == ACPI_EDGE_SENSITIVE ? 0 : 1, | |
1204 | polarity == ACPI_ACTIVE_HIGH ? 0 : 1); | |
1205 | return gsi; | |
1206 | } | |
1207 | ||
2944e16b YL |
1208 | int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, |
1209 | u32 gsi, int triggering, int polarity) | |
1210 | { | |
fcfa146e | 1211 | #ifdef CONFIG_X86_MPPARSE |
c2c21745 | 1212 | struct mpc_intsrc mp_irq; |
2944e16b YL |
1213 | int ioapic; |
1214 | ||
fcfa146e | 1215 | if (!acpi_ioapic) |
d867e531 YL |
1216 | return 0; |
1217 | ||
2944e16b | 1218 | /* print the entry should happen on mptable identically */ |
c2c21745 JSR |
1219 | mp_irq.type = MP_INTSRC; |
1220 | mp_irq.irqtype = mp_INT; | |
1221 | mp_irq.irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | | |
2944e16b | 1222 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); |
c2c21745 JSR |
1223 | mp_irq.srcbus = number; |
1224 | mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); | |
2944e16b | 1225 | ioapic = mp_find_ioapic(gsi); |
c2c21745 | 1226 | mp_irq.dstapic = mp_ioapic_routing[ioapic].apic_id; |
c3e137d1 | 1227 | mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); |
2944e16b | 1228 | |
fcfa146e YL |
1229 | save_mp_irq(&mp_irq); |
1230 | #endif | |
2944e16b YL |
1231 | return 0; |
1232 | } | |
1233 | ||
1da177e4 LT |
1234 | /* |
1235 | * Parse IOAPIC related entries in MADT | |
1236 | * returns 0 on success, < 0 on error | |
1237 | */ | |
4be44fcd | 1238 | static int __init acpi_parse_madt_ioapic_entries(void) |
1da177e4 LT |
1239 | { |
1240 | int count; | |
1241 | ||
1242 | /* | |
1243 | * ACPI interpreter is required to complete interrupt setup, | |
1244 | * so if it is off, don't enumerate the io-apics with ACPI. | |
1245 | * If MPS is present, it will handle them, | |
1246 | * otherwise the system will stay in PIC mode | |
1247 | */ | |
1248 | if (acpi_disabled || acpi_noirq) { | |
1249 | return -ENODEV; | |
4be44fcd | 1250 | } |
1da177e4 | 1251 | |
5f3b1a8b | 1252 | if (!cpu_has_apic) |
d3b6a349 AK |
1253 | return -ENODEV; |
1254 | ||
1da177e4 | 1255 | /* |
4be44fcd | 1256 | * if "noapic" boot option, don't look for IO-APICs |
1da177e4 LT |
1257 | */ |
1258 | if (skip_ioapic_setup) { | |
1259 | printk(KERN_INFO PREFIX "Skipping IOAPIC probe " | |
4be44fcd | 1260 | "due to 'noapic' option.\n"); |
1da177e4 LT |
1261 | return -ENODEV; |
1262 | } | |
1263 | ||
4be44fcd | 1264 | count = |
5f3b1a8b | 1265 | acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic, |
4be44fcd | 1266 | MAX_IO_APICS); |
1da177e4 LT |
1267 | if (!count) { |
1268 | printk(KERN_ERR PREFIX "No IOAPIC entries present\n"); | |
1269 | return -ENODEV; | |
4be44fcd | 1270 | } else if (count < 0) { |
1da177e4 LT |
1271 | printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n"); |
1272 | return count; | |
1273 | } | |
1274 | ||
4be44fcd | 1275 | count = |
5f3b1a8b | 1276 | acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, acpi_parse_int_src_ovr, |
71f521bb | 1277 | nr_irqs); |
1da177e4 | 1278 | if (count < 0) { |
4be44fcd LB |
1279 | printk(KERN_ERR PREFIX |
1280 | "Error parsing interrupt source overrides entry\n"); | |
1da177e4 LT |
1281 | /* TBD: Cleanup to allow fallback to MPS */ |
1282 | return count; | |
1283 | } | |
1284 | ||
1285 | /* | |
1286 | * If BIOS did not supply an INT_SRC_OVR for the SCI | |
1287 | * pretend we got one so we can set the SCI flags. | |
1288 | */ | |
1289 | if (!acpi_sci_override_gsi) | |
cee324b1 | 1290 | acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0); |
1da177e4 LT |
1291 | |
1292 | /* Fill in identity legacy mapings where no override */ | |
1293 | mp_config_acpi_legacy_irqs(); | |
1294 | ||
4be44fcd | 1295 | count = |
5f3b1a8b | 1296 | acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, acpi_parse_nmi_src, |
71f521bb | 1297 | nr_irqs); |
1da177e4 LT |
1298 | if (count < 0) { |
1299 | printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n"); | |
1300 | /* TBD: Cleanup to allow fallback to MPS */ | |
1301 | return count; | |
1302 | } | |
1303 | ||
1304 | return 0; | |
1305 | } | |
1306 | #else | |
1307 | static inline int acpi_parse_madt_ioapic_entries(void) | |
1308 | { | |
1309 | return -1; | |
1310 | } | |
8466361a | 1311 | #endif /* !CONFIG_X86_IO_APIC */ |
1da177e4 | 1312 | |
cbf9bd60 YL |
1313 | static void __init early_acpi_process_madt(void) |
1314 | { | |
1315 | #ifdef CONFIG_X86_LOCAL_APIC | |
1316 | int error; | |
1317 | ||
1318 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { | |
1319 | ||
1320 | /* | |
1321 | * Parse MADT LAPIC entries | |
1322 | */ | |
1323 | error = early_acpi_parse_madt_lapic_addr_ovr(); | |
1324 | if (!error) { | |
1325 | acpi_lapic = 1; | |
1326 | smp_found_config = 1; | |
1327 | } | |
1328 | if (error == -EINVAL) { | |
1329 | /* | |
1330 | * Dell Precision Workstation 410, 610 come here. | |
1331 | */ | |
1332 | printk(KERN_ERR PREFIX | |
1333 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1334 | disable_acpi(); | |
1335 | } | |
1336 | } | |
1337 | #endif | |
1338 | } | |
1339 | ||
4be44fcd | 1340 | static void __init acpi_process_madt(void) |
1da177e4 LT |
1341 | { |
1342 | #ifdef CONFIG_X86_LOCAL_APIC | |
7f8f97c3 | 1343 | int error; |
1da177e4 | 1344 | |
7f8f97c3 | 1345 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { |
1da177e4 LT |
1346 | |
1347 | /* | |
1348 | * Parse MADT LAPIC entries | |
1349 | */ | |
1350 | error = acpi_parse_madt_lapic_entries(); | |
1351 | if (!error) { | |
1352 | acpi_lapic = 1; | |
1353 | ||
26f7ef14 | 1354 | #ifdef CONFIG_X86_BIGSMP |
911a62d4 VP |
1355 | generic_bigsmp_probe(); |
1356 | #endif | |
1da177e4 LT |
1357 | /* |
1358 | * Parse MADT IO-APIC entries | |
1359 | */ | |
1360 | error = acpi_parse_madt_ioapic_entries(); | |
1361 | if (!error) { | |
1362 | acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC; | |
1da177e4 LT |
1363 | acpi_ioapic = 1; |
1364 | ||
1365 | smp_found_config = 1; | |
72ce0165 IM |
1366 | if (apic->setup_apic_routing) |
1367 | apic->setup_apic_routing(); | |
1da177e4 LT |
1368 | } |
1369 | } | |
1370 | if (error == -EINVAL) { | |
1371 | /* | |
1372 | * Dell Precision Workstation 410, 610 come here. | |
1373 | */ | |
4be44fcd LB |
1374 | printk(KERN_ERR PREFIX |
1375 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1da177e4 LT |
1376 | disable_acpi(); |
1377 | } | |
7b37b5fd LB |
1378 | } else { |
1379 | /* | |
1380 | * ACPI found no MADT, and so ACPI wants UP PIC mode. | |
1381 | * In the event an MPS table was found, forget it. | |
1382 | * Boot with "acpi=off" to use MPS on such a system. | |
1383 | */ | |
1384 | if (smp_found_config) { | |
1385 | printk(KERN_WARNING PREFIX | |
1386 | "No APIC-table, disabling MPS\n"); | |
1387 | smp_found_config = 0; | |
1388 | } | |
1da177e4 | 1389 | } |
69b88afa YL |
1390 | |
1391 | /* | |
1392 | * ACPI supports both logical (e.g. Hyper-Threading) and physical | |
1393 | * processors, where MPS only supports physical. | |
1394 | */ | |
1395 | if (acpi_lapic && acpi_ioapic) | |
1396 | printk(KERN_INFO "Using ACPI (MADT) for SMP configuration " | |
1397 | "information\n"); | |
1398 | else if (acpi_lapic) | |
1399 | printk(KERN_INFO "Using ACPI for processor (LAPIC) " | |
1400 | "configuration information\n"); | |
1da177e4 LT |
1401 | #endif |
1402 | return; | |
1403 | } | |
1404 | ||
1855256c | 1405 | static int __init disable_acpi_irq(const struct dmi_system_id *d) |
aea00143 AP |
1406 | { |
1407 | if (!acpi_force) { | |
1408 | printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n", | |
1409 | d->ident); | |
1410 | acpi_noirq_set(); | |
1411 | } | |
1412 | return 0; | |
1413 | } | |
1414 | ||
1855256c | 1415 | static int __init disable_acpi_pci(const struct dmi_system_id *d) |
aea00143 AP |
1416 | { |
1417 | if (!acpi_force) { | |
1418 | printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n", | |
1419 | d->ident); | |
1420 | acpi_disable_pci(); | |
1421 | } | |
1422 | return 0; | |
1423 | } | |
aea00143 | 1424 | |
1855256c | 1425 | static int __init dmi_disable_acpi(const struct dmi_system_id *d) |
aea00143 AP |
1426 | { |
1427 | if (!acpi_force) { | |
4be44fcd | 1428 | printk(KERN_NOTICE "%s detected: acpi off\n", d->ident); |
aea00143 AP |
1429 | disable_acpi(); |
1430 | } else { | |
1431 | printk(KERN_NOTICE | |
1432 | "Warning: DMI blacklist says broken, but acpi forced\n"); | |
1433 | } | |
1434 | return 0; | |
1435 | } | |
1436 | ||
1437 | /* | |
1438 | * Limit ACPI to CPU enumeration for HT | |
1439 | */ | |
1855256c | 1440 | static int __init force_acpi_ht(const struct dmi_system_id *d) |
aea00143 AP |
1441 | { |
1442 | if (!acpi_force) { | |
4be44fcd LB |
1443 | printk(KERN_NOTICE "%s detected: force use of acpi=ht\n", |
1444 | d->ident); | |
aea00143 AP |
1445 | disable_acpi(); |
1446 | acpi_ht = 1; | |
1447 | } else { | |
1448 | printk(KERN_NOTICE | |
1449 | "Warning: acpi=force overrules DMI blacklist: acpi=ht\n"); | |
1450 | } | |
1451 | return 0; | |
1452 | } | |
1453 | ||
e2079c43 RW |
1454 | /* |
1455 | * Force ignoring BIOS IRQ0 pin2 override | |
1456 | */ | |
1457 | static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) | |
1458 | { | |
8d89adf4 IM |
1459 | /* |
1460 | * The ati_ixp4x0_rev() early PCI quirk should have set | |
1461 | * the acpi_skip_timer_override flag already: | |
1462 | */ | |
1463 | if (!acpi_skip_timer_override) { | |
1464 | WARN(1, KERN_ERR "ati_ixp4x0 quirk not complete.\n"); | |
1465 | pr_notice("%s detected: Ignoring BIOS IRQ0 pin2 override\n", | |
1466 | d->ident); | |
1467 | acpi_skip_timer_override = 1; | |
1468 | } | |
e2079c43 RW |
1469 | return 0; |
1470 | } | |
1471 | ||
aea00143 AP |
1472 | /* |
1473 | * If your system is blacklisted here, but you find that acpi=force | |
1474 | * works for you, please contact acpi-devel@sourceforge.net | |
1475 | */ | |
1476 | static struct dmi_system_id __initdata acpi_dmi_table[] = { | |
1477 | /* | |
1478 | * Boxes that need ACPI disabled | |
1479 | */ | |
1480 | { | |
4be44fcd LB |
1481 | .callback = dmi_disable_acpi, |
1482 | .ident = "IBM Thinkpad", | |
1483 | .matches = { | |
1484 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1485 | DMI_MATCH(DMI_BOARD_NAME, "2629H1G"), | |
1486 | }, | |
1487 | }, | |
aea00143 AP |
1488 | |
1489 | /* | |
1490 | * Boxes that need acpi=ht | |
1491 | */ | |
1492 | { | |
4be44fcd LB |
1493 | .callback = force_acpi_ht, |
1494 | .ident = "FSC Primergy T850", | |
1495 | .matches = { | |
1496 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), | |
1497 | DMI_MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"), | |
1498 | }, | |
1499 | }, | |
aea00143 | 1500 | { |
4be44fcd LB |
1501 | .callback = force_acpi_ht, |
1502 | .ident = "HP VISUALIZE NT Workstation", | |
1503 | .matches = { | |
1504 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
1505 | DMI_MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"), | |
1506 | }, | |
1507 | }, | |
aea00143 | 1508 | { |
4be44fcd LB |
1509 | .callback = force_acpi_ht, |
1510 | .ident = "Compaq Workstation W8000", | |
1511 | .matches = { | |
1512 | DMI_MATCH(DMI_SYS_VENDOR, "Compaq"), | |
1513 | DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"), | |
1514 | }, | |
1515 | }, | |
aea00143 | 1516 | { |
4be44fcd LB |
1517 | .callback = force_acpi_ht, |
1518 | .ident = "ASUS P4B266", | |
1519 | .matches = { | |
1520 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1521 | DMI_MATCH(DMI_BOARD_NAME, "P4B266"), | |
1522 | }, | |
1523 | }, | |
aea00143 | 1524 | { |
4be44fcd LB |
1525 | .callback = force_acpi_ht, |
1526 | .ident = "ASUS P2B-DS", | |
1527 | .matches = { | |
1528 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1529 | DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"), | |
1530 | }, | |
1531 | }, | |
aea00143 | 1532 | { |
4be44fcd LB |
1533 | .callback = force_acpi_ht, |
1534 | .ident = "ASUS CUR-DLS", | |
1535 | .matches = { | |
1536 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1537 | DMI_MATCH(DMI_BOARD_NAME, "CUR-DLS"), | |
1538 | }, | |
1539 | }, | |
aea00143 | 1540 | { |
4be44fcd LB |
1541 | .callback = force_acpi_ht, |
1542 | .ident = "ABIT i440BX-W83977", | |
1543 | .matches = { | |
1544 | DMI_MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"), | |
1545 | DMI_MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"), | |
1546 | }, | |
1547 | }, | |
aea00143 | 1548 | { |
4be44fcd LB |
1549 | .callback = force_acpi_ht, |
1550 | .ident = "IBM Bladecenter", | |
1551 | .matches = { | |
1552 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1553 | DMI_MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"), | |
1554 | }, | |
1555 | }, | |
aea00143 | 1556 | { |
4be44fcd LB |
1557 | .callback = force_acpi_ht, |
1558 | .ident = "IBM eServer xSeries 360", | |
1559 | .matches = { | |
1560 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1561 | DMI_MATCH(DMI_BOARD_NAME, "eServer xSeries 360"), | |
1562 | }, | |
1563 | }, | |
aea00143 | 1564 | { |
4be44fcd LB |
1565 | .callback = force_acpi_ht, |
1566 | .ident = "IBM eserver xSeries 330", | |
1567 | .matches = { | |
1568 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1569 | DMI_MATCH(DMI_BOARD_NAME, "eserver xSeries 330"), | |
1570 | }, | |
1571 | }, | |
aea00143 | 1572 | { |
4be44fcd LB |
1573 | .callback = force_acpi_ht, |
1574 | .ident = "IBM eserver xSeries 440", | |
1575 | .matches = { | |
1576 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1577 | DMI_MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"), | |
1578 | }, | |
1579 | }, | |
aea00143 | 1580 | |
aea00143 AP |
1581 | /* |
1582 | * Boxes that need ACPI PCI IRQ routing disabled | |
1583 | */ | |
1584 | { | |
4be44fcd LB |
1585 | .callback = disable_acpi_irq, |
1586 | .ident = "ASUS A7V", | |
1587 | .matches = { | |
1588 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"), | |
1589 | DMI_MATCH(DMI_BOARD_NAME, "<A7V>"), | |
1590 | /* newer BIOS, Revision 1011, does work */ | |
1591 | DMI_MATCH(DMI_BIOS_VERSION, | |
1592 | "ASUS A7V ACPI BIOS Revision 1007"), | |
1593 | }, | |
1594 | }, | |
74586fca LB |
1595 | { |
1596 | /* | |
1597 | * Latest BIOS for IBM 600E (1.16) has bad pcinum | |
1598 | * for LPC bridge, which is needed for the PCI | |
1599 | * interrupt links to work. DSDT fix is in bug 5966. | |
1600 | * 2645, 2646 model numbers are shared with 600/600E/600X | |
1601 | */ | |
1602 | .callback = disable_acpi_irq, | |
1603 | .ident = "IBM Thinkpad 600 Series 2645", | |
1604 | .matches = { | |
1605 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1606 | DMI_MATCH(DMI_BOARD_NAME, "2645"), | |
1607 | }, | |
1608 | }, | |
1609 | { | |
1610 | .callback = disable_acpi_irq, | |
1611 | .ident = "IBM Thinkpad 600 Series 2646", | |
1612 | .matches = { | |
1613 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1614 | DMI_MATCH(DMI_BOARD_NAME, "2646"), | |
1615 | }, | |
1616 | }, | |
aea00143 AP |
1617 | /* |
1618 | * Boxes that need ACPI PCI IRQ routing and PCI scan disabled | |
1619 | */ | |
4be44fcd LB |
1620 | { /* _BBN 0 bug */ |
1621 | .callback = disable_acpi_pci, | |
1622 | .ident = "ASUS PR-DLS", | |
1623 | .matches = { | |
1624 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1625 | DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"), | |
1626 | DMI_MATCH(DMI_BIOS_VERSION, | |
1627 | "ASUS PR-DLS ACPI BIOS Revision 1010"), | |
1628 | DMI_MATCH(DMI_BIOS_DATE, "03/21/2003") | |
1629 | }, | |
1630 | }, | |
aea00143 | 1631 | { |
4be44fcd LB |
1632 | .callback = disable_acpi_pci, |
1633 | .ident = "Acer TravelMate 36x Laptop", | |
1634 | .matches = { | |
1635 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), | |
1636 | DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"), | |
1637 | }, | |
1638 | }, | |
35af2821 AH |
1639 | {} |
1640 | }; | |
1641 | ||
1642 | /* second table for DMI checks that should run after early-quirks */ | |
1643 | static struct dmi_system_id __initdata acpi_dmi_table_late[] = { | |
e2079c43 RW |
1644 | /* |
1645 | * HP laptops which use a DSDT reporting as HP/SB400/10000, | |
1646 | * which includes some code which overrides all temperature | |
1647 | * trip points to 16C if the INTIN2 input of the I/O APIC | |
1648 | * is enabled. This input is incorrectly designated the | |
1649 | * ISA IRQ 0 via an interrupt source override even though | |
1650 | * it is wired to the output of the master 8259A and INTIN0 | |
1651 | * is not connected at all. Force ignoring BIOS IRQ0 pin2 | |
1652 | * override in that cases. | |
1653 | */ | |
e84956f9 RW |
1654 | { |
1655 | .callback = dmi_ignore_irq0_timer_override, | |
1656 | .ident = "HP nx6115 laptop", | |
1657 | .matches = { | |
1658 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1659 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6115"), | |
1660 | }, | |
1661 | }, | |
e2079c43 RW |
1662 | { |
1663 | .callback = dmi_ignore_irq0_timer_override, | |
1664 | .ident = "HP NX6125 laptop", | |
1665 | .matches = { | |
1666 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1667 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"), | |
1668 | }, | |
1669 | }, | |
1670 | { | |
1671 | .callback = dmi_ignore_irq0_timer_override, | |
1672 | .ident = "HP NX6325 laptop", | |
1673 | .matches = { | |
1674 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1675 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), | |
1676 | }, | |
1677 | }, | |
e84956f9 RW |
1678 | { |
1679 | .callback = dmi_ignore_irq0_timer_override, | |
1680 | .ident = "HP 6715b laptop", | |
1681 | .matches = { | |
1682 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1683 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b"), | |
1684 | }, | |
1685 | }, | |
4be44fcd | 1686 | {} |
aea00143 AP |
1687 | }; |
1688 | ||
1da177e4 LT |
1689 | /* |
1690 | * acpi_boot_table_init() and acpi_boot_init() | |
1691 | * called from setup_arch(), always. | |
1692 | * 1. checksums all tables | |
1693 | * 2. enumerates lapics | |
1694 | * 3. enumerates io-apics | |
1695 | * | |
1696 | * acpi_table_init() is separate to allow reading SRAT without | |
1697 | * other side effects. | |
1698 | * | |
1699 | * side effects of acpi_boot_init: | |
1700 | * acpi_lapic = 1 if LAPIC found | |
1701 | * acpi_ioapic = 1 if IOAPIC found | |
1702 | * if (acpi_lapic && acpi_ioapic) smp_found_config = 1; | |
1703 | * if acpi_blacklisted() acpi_disabled = 1; | |
1704 | * acpi_irq_model=... | |
1705 | * ... | |
1706 | * | |
1707 | * return value: (currently ignored) | |
1708 | * 0: success | |
1709 | * !0: failure | |
1710 | */ | |
1711 | ||
4be44fcd | 1712 | int __init acpi_boot_table_init(void) |
1da177e4 LT |
1713 | { |
1714 | int error; | |
1715 | ||
aea00143 | 1716 | dmi_check_system(acpi_dmi_table); |
aea00143 | 1717 | |
1da177e4 LT |
1718 | /* |
1719 | * If acpi_disabled, bail out | |
1720 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1721 | */ | |
1722 | if (acpi_disabled && !acpi_ht) | |
4be44fcd | 1723 | return 1; |
1da177e4 | 1724 | |
5f3b1a8b | 1725 | /* |
1da177e4 LT |
1726 | * Initialize the ACPI boot-time table parser. |
1727 | */ | |
1728 | error = acpi_table_init(); | |
1729 | if (error) { | |
1730 | disable_acpi(); | |
1731 | return error; | |
1732 | } | |
1da177e4 | 1733 | |
5f3b1a8b | 1734 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1735 | |
1736 | /* | |
1737 | * blacklist may disable ACPI entirely | |
1738 | */ | |
1739 | error = acpi_blacklisted(); | |
1740 | if (error) { | |
1da177e4 LT |
1741 | if (acpi_force) { |
1742 | printk(KERN_WARNING PREFIX "acpi=force override\n"); | |
1743 | } else { | |
1744 | printk(KERN_WARNING PREFIX "Disabling ACPI support\n"); | |
1745 | disable_acpi(); | |
1746 | return error; | |
1747 | } | |
1748 | } | |
cbf9bd60 YL |
1749 | |
1750 | return 0; | |
1751 | } | |
1752 | ||
1753 | int __init early_acpi_boot_init(void) | |
1754 | { | |
1755 | /* | |
1756 | * If acpi_disabled, bail out | |
1757 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1758 | */ | |
1759 | if (acpi_disabled && !acpi_ht) | |
1760 | return 1; | |
1761 | ||
1762 | /* | |
1763 | * Process the Multiple APIC Description Table (MADT), if present | |
1764 | */ | |
1765 | early_acpi_process_madt(); | |
1da177e4 LT |
1766 | |
1767 | return 0; | |
1768 | } | |
1769 | ||
1da177e4 LT |
1770 | int __init acpi_boot_init(void) |
1771 | { | |
35af2821 AH |
1772 | /* those are executed after early-quirks are executed */ |
1773 | dmi_check_system(acpi_dmi_table_late); | |
1774 | ||
1da177e4 LT |
1775 | /* |
1776 | * If acpi_disabled, bail out | |
1777 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1778 | */ | |
1779 | if (acpi_disabled && !acpi_ht) | |
4be44fcd | 1780 | return 1; |
1da177e4 | 1781 | |
5f3b1a8b | 1782 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1783 | |
1784 | /* | |
1785 | * set sci_int and PM timer address | |
1786 | */ | |
ceb6c468 | 1787 | acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt); |
1da177e4 LT |
1788 | |
1789 | /* | |
1790 | * Process the Multiple APIC Description Table (MADT), if present | |
1791 | */ | |
1792 | acpi_process_madt(); | |
1793 | ||
5f3b1a8b | 1794 | acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet); |
1da177e4 LT |
1795 | |
1796 | return 0; | |
1797 | } | |
1a3f239d RR |
1798 | |
1799 | static int __init parse_acpi(char *arg) | |
1800 | { | |
1801 | if (!arg) | |
1802 | return -EINVAL; | |
1803 | ||
1804 | /* "acpi=off" disables both ACPI table parsing and interpreter */ | |
1805 | if (strcmp(arg, "off") == 0) { | |
1806 | disable_acpi(); | |
1807 | } | |
1808 | /* acpi=force to over-ride black-list */ | |
1809 | else if (strcmp(arg, "force") == 0) { | |
1810 | acpi_force = 1; | |
1811 | acpi_ht = 1; | |
1812 | acpi_disabled = 0; | |
1813 | } | |
1814 | /* acpi=strict disables out-of-spec workarounds */ | |
1815 | else if (strcmp(arg, "strict") == 0) { | |
1816 | acpi_strict = 1; | |
1817 | } | |
1818 | /* Limit ACPI just to boot-time to enable HT */ | |
1819 | else if (strcmp(arg, "ht") == 0) { | |
1820 | if (!acpi_force) | |
1821 | disable_acpi(); | |
1822 | acpi_ht = 1; | |
1823 | } | |
237889bf ZY |
1824 | /* acpi=rsdt use RSDT instead of XSDT */ |
1825 | else if (strcmp(arg, "rsdt") == 0) { | |
1826 | acpi_rsdt_forced = 1; | |
1827 | } | |
1a3f239d RR |
1828 | /* "acpi=noirq" disables ACPI interrupt routing */ |
1829 | else if (strcmp(arg, "noirq") == 0) { | |
1830 | acpi_noirq_set(); | |
1831 | } else { | |
1832 | /* Core will printk when we return error. */ | |
1833 | return -EINVAL; | |
1834 | } | |
1835 | return 0; | |
1836 | } | |
1837 | early_param("acpi", parse_acpi); | |
1838 | ||
1839 | /* FIXME: Using pci= for an ACPI parameter is a travesty. */ | |
1840 | static int __init parse_pci(char *arg) | |
1841 | { | |
1842 | if (arg && strcmp(arg, "noacpi") == 0) | |
1843 | acpi_disable_pci(); | |
1844 | return 0; | |
1845 | } | |
1846 | early_param("pci", parse_pci); | |
1847 | ||
3c999f14 YL |
1848 | int __init acpi_mps_check(void) |
1849 | { | |
1850 | #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE) | |
1851 | /* mptable code is not built-in*/ | |
1852 | if (acpi_disabled || acpi_noirq) { | |
1853 | printk(KERN_WARNING "MPS support code is not built-in.\n" | |
1854 | "Using acpi=off or acpi=noirq or pci=noacpi " | |
1855 | "may have problem\n"); | |
1856 | return 1; | |
1857 | } | |
1858 | #endif | |
1859 | return 0; | |
1860 | } | |
1861 | ||
1a3f239d RR |
1862 | #ifdef CONFIG_X86_IO_APIC |
1863 | static int __init parse_acpi_skip_timer_override(char *arg) | |
1864 | { | |
1865 | acpi_skip_timer_override = 1; | |
1866 | return 0; | |
1867 | } | |
1868 | early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override); | |
fa18f477 AK |
1869 | |
1870 | static int __init parse_acpi_use_timer_override(char *arg) | |
1871 | { | |
1872 | acpi_use_timer_override = 1; | |
1873 | return 0; | |
1874 | } | |
1875 | early_param("acpi_use_timer_override", parse_acpi_use_timer_override); | |
1a3f239d RR |
1876 | #endif /* CONFIG_X86_IO_APIC */ |
1877 | ||
1878 | static int __init setup_acpi_sci(char *s) | |
1879 | { | |
1880 | if (!s) | |
1881 | return -EINVAL; | |
1882 | if (!strcmp(s, "edge")) | |
5f3b1a8b AS |
1883 | acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE | |
1884 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1885 | else if (!strcmp(s, "level")) |
5f3b1a8b AS |
1886 | acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL | |
1887 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1888 | else if (!strcmp(s, "high")) |
5f3b1a8b AS |
1889 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH | |
1890 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d | 1891 | else if (!strcmp(s, "low")) |
5f3b1a8b AS |
1892 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW | |
1893 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d RR |
1894 | else |
1895 | return -EINVAL; | |
1896 | return 0; | |
1897 | } | |
1898 | early_param("acpi_sci", setup_acpi_sci); | |
d0a9081b AM |
1899 | |
1900 | int __acpi_acquire_global_lock(unsigned int *lock) | |
1901 | { | |
1902 | unsigned int old, new, val; | |
1903 | do { | |
1904 | old = *lock; | |
1905 | new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1)); | |
1906 | val = cmpxchg(lock, old, new); | |
1907 | } while (unlikely (val != old)); | |
1908 | return (new < 3) ? -1 : 0; | |
1909 | } | |
1910 | ||
1911 | int __acpi_release_global_lock(unsigned int *lock) | |
1912 | { | |
1913 | unsigned int old, new, val; | |
1914 | do { | |
1915 | old = *lock; | |
1916 | new = old & ~0x3; | |
1917 | val = cmpxchg(lock, old, new); | |
1918 | } while (unlikely (val != old)); | |
1919 | return old & 0x1; | |
1920 | } |