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1da177e4 LT |
1 | /* |
2 | * boot.c - Architecture-Specific Low-Level ACPI Boot Support | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
5 | * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com> | |
6 | * | |
7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
24 | */ | |
25 | ||
26 | #include <linux/init.h> | |
1da177e4 | 27 | #include <linux/acpi.h> |
d66bea57 | 28 | #include <linux/acpi_pmtmr.h> |
1da177e4 | 29 | #include <linux/efi.h> |
73fea175 | 30 | #include <linux/cpumask.h> |
1da177e4 | 31 | #include <linux/module.h> |
aea00143 | 32 | #include <linux/dmi.h> |
b33fa1f3 | 33 | #include <linux/irq.h> |
f0f4c343 AD |
34 | #include <linux/bootmem.h> |
35 | #include <linux/ioport.h> | |
1da177e4 LT |
36 | |
37 | #include <asm/pgtable.h> | |
38 | #include <asm/io_apic.h> | |
39 | #include <asm/apic.h> | |
183fe065 | 40 | #include <asm/genapic.h> |
1da177e4 | 41 | #include <asm/io.h> |
1da177e4 | 42 | #include <asm/mpspec.h> |
dfac2189 | 43 | #include <asm/smp.h> |
1da177e4 | 44 | |
f6bc4029 GOC |
45 | #ifdef CONFIG_X86_LOCAL_APIC |
46 | # include <mach_apic.h> | |
47 | #endif | |
48 | ||
e8924acb | 49 | static int __initdata acpi_force = 0; |
237889bf | 50 | u32 acpi_rsdt_forced; |
df3bb57d AK |
51 | #ifdef CONFIG_ACPI |
52 | int acpi_disabled = 0; | |
53 | #else | |
54 | int acpi_disabled = 1; | |
55 | #endif | |
56 | EXPORT_SYMBOL(acpi_disabled); | |
57 | ||
1da177e4 LT |
58 | #ifdef CONFIG_X86_64 |
59 | ||
1da177e4 | 60 | #include <asm/proto.h> |
637029c6 | 61 | |
4be44fcd | 62 | #else /* X86 */ |
1da177e4 LT |
63 | |
64 | #ifdef CONFIG_X86_LOCAL_APIC | |
65 | #include <mach_apic.h> | |
66 | #include <mach_mpparse.h> | |
4be44fcd | 67 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 68 | |
4be44fcd | 69 | #endif /* X86 */ |
1da177e4 LT |
70 | |
71 | #define BAD_MADT_ENTRY(entry, end) ( \ | |
72 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ | |
5f3b1a8b | 73 | ((struct acpi_subtable_header *)entry)->length < sizeof(*entry)) |
1da177e4 LT |
74 | |
75 | #define PREFIX "ACPI: " | |
76 | ||
90d53909 | 77 | int acpi_noirq; /* skip ACPI IRQ initialization */ |
6e4be1ff YL |
78 | int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ |
79 | EXPORT_SYMBOL(acpi_pci_disabled); | |
1da177e4 LT |
80 | int acpi_ht __initdata = 1; /* enable HT */ |
81 | ||
82 | int acpi_lapic; | |
83 | int acpi_ioapic; | |
84 | int acpi_strict; | |
1da177e4 | 85 | |
5f3b1a8b | 86 | u8 acpi_sci_flags __initdata; |
1da177e4 LT |
87 | int acpi_sci_override_gsi __initdata; |
88 | int acpi_skip_timer_override __initdata; | |
fa18f477 | 89 | int acpi_use_timer_override __initdata; |
1da177e4 LT |
90 | |
91 | #ifdef CONFIG_X86_LOCAL_APIC | |
92 | static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; | |
93 | #endif | |
94 | ||
95 | #ifndef __HAVE_ARCH_CMPXCHG | |
96 | #warning ACPI uses CMPXCHG, i486 and later hardware | |
97 | #endif | |
98 | ||
1da177e4 LT |
99 | /* -------------------------------------------------------------------------- |
100 | Boot-time Configuration | |
101 | -------------------------------------------------------------------------- */ | |
102 | ||
103 | /* | |
104 | * The default interrupt routing model is PIC (8259). This gets | |
27b46d76 | 105 | * overridden if IOAPICs are enumerated (below). |
1da177e4 | 106 | */ |
4be44fcd | 107 | enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; |
1da177e4 | 108 | |
1da177e4 LT |
109 | |
110 | /* | |
111 | * Temporarily use the virtual area starting from FIX_IO_APIC_BASE_END, | |
112 | * to map the target physical address. The problem is that set_fixmap() | |
113 | * provides a single page, and it is possible that the page is not | |
114 | * sufficient. | |
115 | * By using this area, we can map up to MAX_IO_APICS pages temporarily, | |
116 | * i.e. until the next __va_range() call. | |
117 | * | |
118 | * Important Safety Note: The fixed I/O APIC page numbers are *subtracted* | |
119 | * from the fixed base. That's why we start at FIX_IO_APIC_BASE_END and | |
120 | * count idx down while incrementing the phys address. | |
121 | */ | |
2fdf0741 | 122 | char *__init __acpi_map_table(unsigned long phys, unsigned long size) |
1da177e4 LT |
123 | { |
124 | unsigned long base, offset, mapped_size; | |
125 | int idx; | |
126 | ||
f34fa82b YL |
127 | if (!phys || !size) |
128 | return NULL; | |
129 | ||
f361a450 | 130 | if (phys+size <= (max_low_pfn_mapped << PAGE_SHIFT)) |
4be44fcd | 131 | return __va(phys); |
1da177e4 LT |
132 | |
133 | offset = phys & (PAGE_SIZE - 1); | |
134 | mapped_size = PAGE_SIZE - offset; | |
f34fa82b | 135 | clear_fixmap(FIX_ACPI_END); |
1da177e4 LT |
136 | set_fixmap(FIX_ACPI_END, phys); |
137 | base = fix_to_virt(FIX_ACPI_END); | |
138 | ||
139 | /* | |
140 | * Most cases can be covered by the below. | |
141 | */ | |
142 | idx = FIX_ACPI_END; | |
143 | while (mapped_size < size) { | |
144 | if (--idx < FIX_ACPI_BEGIN) | |
145 | return NULL; /* cannot handle this */ | |
146 | phys += PAGE_SIZE; | |
f34fa82b | 147 | clear_fixmap(idx); |
1da177e4 LT |
148 | set_fixmap(idx, phys); |
149 | mapped_size += PAGE_SIZE; | |
150 | } | |
151 | ||
4be44fcd | 152 | return ((unsigned char *)base + offset); |
1da177e4 | 153 | } |
1da177e4 LT |
154 | |
155 | #ifdef CONFIG_PCI_MMCONFIG | |
1339c367 PV |
156 | |
157 | static int acpi_mcfg_64bit_base_addr __initdata = FALSE; | |
158 | ||
54549391 | 159 | /* The physical address of the MMCONFIG aperture. Set from ACPI tables. */ |
15a58ed1 | 160 | struct acpi_mcfg_allocation *pci_mmcfg_config; |
54549391 GKH |
161 | int pci_mmcfg_config_num; |
162 | ||
a726c600 JK |
163 | static int __init acpi_mcfg_oem_check(struct acpi_table_mcfg *mcfg) |
164 | { | |
165 | if (!strcmp(mcfg->header.oem_id, "SGI")) | |
166 | acpi_mcfg_64bit_base_addr = TRUE; | |
167 | ||
168 | return 0; | |
169 | } | |
170 | ||
ceb6c468 | 171 | int __init acpi_parse_mcfg(struct acpi_table_header *header) |
1da177e4 LT |
172 | { |
173 | struct acpi_table_mcfg *mcfg; | |
54549391 GKH |
174 | unsigned long i; |
175 | int config_size; | |
1da177e4 | 176 | |
ceb6c468 | 177 | if (!header) |
1da177e4 LT |
178 | return -EINVAL; |
179 | ||
ceb6c468 | 180 | mcfg = (struct acpi_table_mcfg *)header; |
1da177e4 | 181 | |
54549391 GKH |
182 | /* how many config structures do we have */ |
183 | pci_mmcfg_config_num = 0; | |
ceb6c468 | 184 | i = header->length - sizeof(struct acpi_table_mcfg); |
15a58ed1 | 185 | while (i >= sizeof(struct acpi_mcfg_allocation)) { |
54549391 | 186 | ++pci_mmcfg_config_num; |
15a58ed1 | 187 | i -= sizeof(struct acpi_mcfg_allocation); |
54549391 GKH |
188 | }; |
189 | if (pci_mmcfg_config_num == 0) { | |
190 | printk(KERN_ERR PREFIX "MMCONFIG has no entries\n"); | |
1da177e4 LT |
191 | return -ENODEV; |
192 | } | |
193 | ||
54549391 GKH |
194 | config_size = pci_mmcfg_config_num * sizeof(*pci_mmcfg_config); |
195 | pci_mmcfg_config = kmalloc(config_size, GFP_KERNEL); | |
196 | if (!pci_mmcfg_config) { | |
197 | printk(KERN_WARNING PREFIX | |
198 | "No memory for MCFG config tables\n"); | |
199 | return -ENOMEM; | |
200 | } | |
201 | ||
ad363f80 | 202 | memcpy(pci_mmcfg_config, &mcfg[1], config_size); |
a726c600 JK |
203 | |
204 | acpi_mcfg_oem_check(mcfg); | |
205 | ||
54549391 | 206 | for (i = 0; i < pci_mmcfg_config_num; ++i) { |
a726c600 JK |
207 | if ((pci_mmcfg_config[i].address > 0xFFFFFFFF) && |
208 | !acpi_mcfg_64bit_base_addr) { | |
54549391 GKH |
209 | printk(KERN_ERR PREFIX |
210 | "MMCONFIG not in low 4GB of memory\n"); | |
acc7c2e0 KR |
211 | kfree(pci_mmcfg_config); |
212 | pci_mmcfg_config_num = 0; | |
54549391 GKH |
213 | return -ENODEV; |
214 | } | |
215 | } | |
1da177e4 LT |
216 | |
217 | return 0; | |
218 | } | |
4be44fcd | 219 | #endif /* CONFIG_PCI_MMCONFIG */ |
1da177e4 LT |
220 | |
221 | #ifdef CONFIG_X86_LOCAL_APIC | |
15a58ed1 | 222 | static int __init acpi_parse_madt(struct acpi_table_header *table) |
1da177e4 | 223 | { |
4be44fcd | 224 | struct acpi_table_madt *madt = NULL; |
1da177e4 | 225 | |
15a58ed1 | 226 | if (!cpu_has_apic) |
1da177e4 LT |
227 | return -EINVAL; |
228 | ||
15a58ed1 | 229 | madt = (struct acpi_table_madt *)table; |
1da177e4 LT |
230 | if (!madt) { |
231 | printk(KERN_WARNING PREFIX "Unable to map MADT\n"); | |
232 | return -ENODEV; | |
233 | } | |
234 | ||
ad363f80 AS |
235 | if (madt->address) { |
236 | acpi_lapic_addr = (u64) madt->address; | |
1da177e4 LT |
237 | |
238 | printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n", | |
ad363f80 | 239 | madt->address); |
1da177e4 LT |
240 | } |
241 | ||
242 | acpi_madt_oem_check(madt->header.oem_id, madt->header.oem_table_id); | |
4be44fcd | 243 | |
1da177e4 LT |
244 | return 0; |
245 | } | |
246 | ||
dfac2189 AS |
247 | static void __cpuinit acpi_register_lapic(int id, u8 enabled) |
248 | { | |
fb3bbd6a YL |
249 | unsigned int ver = 0; |
250 | ||
dfac2189 AS |
251 | if (!enabled) { |
252 | ++disabled_cpus; | |
253 | return; | |
254 | } | |
255 | ||
fb3bbd6a YL |
256 | if (boot_cpu_physical_apicid != -1U) |
257 | ver = apic_version[boot_cpu_physical_apicid]; | |
fb3bbd6a YL |
258 | |
259 | generic_processor_info(id, ver); | |
dfac2189 AS |
260 | } |
261 | ||
1da177e4 | 262 | static int __init |
5f3b1a8b | 263 | acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 264 | { |
5f3b1a8b | 265 | struct acpi_madt_local_apic *processor = NULL; |
1da177e4 | 266 | |
5f3b1a8b | 267 | processor = (struct acpi_madt_local_apic *)header; |
1da177e4 LT |
268 | |
269 | if (BAD_MADT_ENTRY(processor, end)) | |
270 | return -EINVAL; | |
271 | ||
272 | acpi_table_print_madt_entry(header); | |
273 | ||
7f66ae48 AR |
274 | /* |
275 | * We need to register disabled CPU as well to permit | |
276 | * counting disabled CPUs. This allows us to size | |
277 | * cpus_possible_map more accurately, to permit | |
278 | * to not preallocating memory for all NR_CPUS | |
279 | * when we use CPU hotplug. | |
280 | */ | |
dfac2189 AS |
281 | acpi_register_lapic(processor->id, /* APIC ID */ |
282 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
1da177e4 LT |
283 | |
284 | return 0; | |
285 | } | |
286 | ||
ac049c1d JS |
287 | static int __init |
288 | acpi_parse_sapic(struct acpi_subtable_header *header, const unsigned long end) | |
289 | { | |
290 | struct acpi_madt_local_sapic *processor = NULL; | |
291 | ||
292 | processor = (struct acpi_madt_local_sapic *)header; | |
293 | ||
294 | if (BAD_MADT_ENTRY(processor, end)) | |
295 | return -EINVAL; | |
296 | ||
297 | acpi_table_print_madt_entry(header); | |
298 | ||
dfac2189 AS |
299 | acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */ |
300 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
ac049c1d JS |
301 | |
302 | return 0; | |
303 | } | |
304 | ||
1da177e4 | 305 | static int __init |
5f3b1a8b | 306 | acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header, |
4be44fcd | 307 | const unsigned long end) |
1da177e4 | 308 | { |
5f3b1a8b | 309 | struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL; |
1da177e4 | 310 | |
5f3b1a8b | 311 | lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header; |
1da177e4 LT |
312 | |
313 | if (BAD_MADT_ENTRY(lapic_addr_ovr, end)) | |
314 | return -EINVAL; | |
315 | ||
316 | acpi_lapic_addr = lapic_addr_ovr->address; | |
317 | ||
318 | return 0; | |
319 | } | |
320 | ||
321 | static int __init | |
5f3b1a8b | 322 | acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 323 | { |
5f3b1a8b | 324 | struct acpi_madt_local_apic_nmi *lapic_nmi = NULL; |
1da177e4 | 325 | |
5f3b1a8b | 326 | lapic_nmi = (struct acpi_madt_local_apic_nmi *)header; |
1da177e4 LT |
327 | |
328 | if (BAD_MADT_ENTRY(lapic_nmi, end)) | |
329 | return -EINVAL; | |
330 | ||
331 | acpi_table_print_madt_entry(header); | |
332 | ||
333 | if (lapic_nmi->lint != 1) | |
334 | printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n"); | |
335 | ||
336 | return 0; | |
337 | } | |
338 | ||
4be44fcd | 339 | #endif /*CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 340 | |
8466361a | 341 | #ifdef CONFIG_X86_IO_APIC |
1da177e4 LT |
342 | |
343 | static int __init | |
5f3b1a8b | 344 | acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 345 | { |
5f3b1a8b | 346 | struct acpi_madt_io_apic *ioapic = NULL; |
1da177e4 | 347 | |
5f3b1a8b | 348 | ioapic = (struct acpi_madt_io_apic *)header; |
1da177e4 LT |
349 | |
350 | if (BAD_MADT_ENTRY(ioapic, end)) | |
351 | return -EINVAL; | |
4be44fcd | 352 | |
1da177e4 LT |
353 | acpi_table_print_madt_entry(header); |
354 | ||
4be44fcd LB |
355 | mp_register_ioapic(ioapic->id, |
356 | ioapic->address, ioapic->global_irq_base); | |
357 | ||
1da177e4 LT |
358 | return 0; |
359 | } | |
360 | ||
361 | /* | |
362 | * Parse Interrupt Source Override for the ACPI SCI | |
363 | */ | |
e82c354b | 364 | static void __init acpi_sci_ioapic_setup(u32 gsi, u16 polarity, u16 trigger) |
1da177e4 LT |
365 | { |
366 | if (trigger == 0) /* compatible SCI trigger is level */ | |
367 | trigger = 3; | |
368 | ||
369 | if (polarity == 0) /* compatible SCI polarity is low */ | |
370 | polarity = 3; | |
371 | ||
372 | /* Command-line over-ride via acpi_sci= */ | |
5f3b1a8b AS |
373 | if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) |
374 | trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2; | |
1da177e4 | 375 | |
5f3b1a8b AS |
376 | if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK) |
377 | polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK; | |
1da177e4 LT |
378 | |
379 | /* | |
4be44fcd | 380 | * mp_config_acpi_legacy_irqs() already setup IRQs < 16 |
1da177e4 LT |
381 | * If GSI is < 16, this will update its flags, |
382 | * else it will create a new mp_irqs[] entry. | |
383 | */ | |
7bdd21ce | 384 | mp_override_legacy_irq(gsi, polarity, trigger, gsi); |
1da177e4 LT |
385 | |
386 | /* | |
387 | * stash over-ride to indicate we've been here | |
cee324b1 | 388 | * and for later update of acpi_gbl_FADT |
1da177e4 | 389 | */ |
7bdd21ce | 390 | acpi_sci_override_gsi = gsi; |
1da177e4 LT |
391 | return; |
392 | } | |
393 | ||
394 | static int __init | |
5f3b1a8b | 395 | acpi_parse_int_src_ovr(struct acpi_subtable_header * header, |
4be44fcd | 396 | const unsigned long end) |
1da177e4 | 397 | { |
5f3b1a8b | 398 | struct acpi_madt_interrupt_override *intsrc = NULL; |
1da177e4 | 399 | |
5f3b1a8b | 400 | intsrc = (struct acpi_madt_interrupt_override *)header; |
1da177e4 LT |
401 | |
402 | if (BAD_MADT_ENTRY(intsrc, end)) | |
403 | return -EINVAL; | |
404 | ||
405 | acpi_table_print_madt_entry(header); | |
406 | ||
5f3b1a8b | 407 | if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) { |
7bdd21ce | 408 | acpi_sci_ioapic_setup(intsrc->global_irq, |
5f3b1a8b AS |
409 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, |
410 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2); | |
1da177e4 LT |
411 | return 0; |
412 | } | |
413 | ||
414 | if (acpi_skip_timer_override && | |
5f3b1a8b | 415 | intsrc->source_irq == 0 && intsrc->global_irq == 2) { |
4be44fcd LB |
416 | printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n"); |
417 | return 0; | |
1da177e4 LT |
418 | } |
419 | ||
5f3b1a8b AS |
420 | mp_override_legacy_irq(intsrc->source_irq, |
421 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, | |
422 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, | |
423 | intsrc->global_irq); | |
1da177e4 LT |
424 | |
425 | return 0; | |
426 | } | |
427 | ||
1da177e4 | 428 | static int __init |
5f3b1a8b | 429 | acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 430 | { |
5f3b1a8b | 431 | struct acpi_madt_nmi_source *nmi_src = NULL; |
1da177e4 | 432 | |
5f3b1a8b | 433 | nmi_src = (struct acpi_madt_nmi_source *)header; |
1da177e4 LT |
434 | |
435 | if (BAD_MADT_ENTRY(nmi_src, end)) | |
436 | return -EINVAL; | |
437 | ||
438 | acpi_table_print_madt_entry(header); | |
439 | ||
440 | /* TBD: Support nimsrc entries? */ | |
441 | ||
442 | return 0; | |
443 | } | |
444 | ||
4be44fcd | 445 | #endif /* CONFIG_X86_IO_APIC */ |
1da177e4 | 446 | |
1da177e4 LT |
447 | /* |
448 | * acpi_pic_sci_set_trigger() | |
5f3b1a8b | 449 | * |
1da177e4 LT |
450 | * use ELCR to set PIC-mode trigger type for SCI |
451 | * | |
452 | * If a PIC-mode SCI is not recognized or gives spurious IRQ7's | |
453 | * it may require Edge Trigger -- use "acpi_sci=edge" | |
454 | * | |
455 | * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers | |
456 | * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. | |
27b46d76 SA |
457 | * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0) |
458 | * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0) | |
1da177e4 LT |
459 | */ |
460 | ||
4be44fcd | 461 | void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) |
1da177e4 LT |
462 | { |
463 | unsigned int mask = 1 << irq; | |
464 | unsigned int old, new; | |
465 | ||
466 | /* Real old ELCR mask */ | |
467 | old = inb(0x4d0) | (inb(0x4d1) << 8); | |
468 | ||
469 | /* | |
27b46d76 | 470 | * If we use ACPI to set PCI IRQs, then we should clear ELCR |
1da177e4 LT |
471 | * since we will set it correctly as we enable the PCI irq |
472 | * routing. | |
473 | */ | |
474 | new = acpi_noirq ? old : 0; | |
475 | ||
476 | /* | |
477 | * Update SCI information in the ELCR, it isn't in the PCI | |
478 | * routing tables.. | |
479 | */ | |
480 | switch (trigger) { | |
4be44fcd | 481 | case 1: /* Edge - clear */ |
1da177e4 LT |
482 | new &= ~mask; |
483 | break; | |
4be44fcd | 484 | case 3: /* Level - set */ |
1da177e4 LT |
485 | new |= mask; |
486 | break; | |
487 | } | |
488 | ||
489 | if (old == new) | |
490 | return; | |
491 | ||
492 | printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old); | |
493 | outb(new, 0x4d0); | |
494 | outb(new >> 8, 0x4d1); | |
495 | } | |
496 | ||
1da177e4 LT |
497 | int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) |
498 | { | |
f023d764 | 499 | *irq = gsi; |
1da177e4 LT |
500 | return 0; |
501 | } | |
502 | ||
1f3a6a15 KK |
503 | /* |
504 | * success: return IRQ number (>=0) | |
505 | * failure: return < 0 | |
506 | */ | |
cb654695 | 507 | int acpi_register_gsi(u32 gsi, int triggering, int polarity) |
1da177e4 LT |
508 | { |
509 | unsigned int irq; | |
510 | unsigned int plat_gsi = gsi; | |
511 | ||
512 | #ifdef CONFIG_PCI | |
513 | /* | |
514 | * Make sure all (legacy) PCI IRQs are set as level-triggered. | |
515 | */ | |
516 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { | |
cb654695 | 517 | if (triggering == ACPI_LEVEL_SENSITIVE) |
4be44fcd | 518 | eisa_set_level_irq(gsi); |
1da177e4 LT |
519 | } |
520 | #endif | |
521 | ||
522 | #ifdef CONFIG_X86_IO_APIC | |
523 | if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) { | |
cb654695 | 524 | plat_gsi = mp_register_gsi(gsi, triggering, polarity); |
1da177e4 LT |
525 | } |
526 | #endif | |
527 | acpi_gsi_to_irq(plat_gsi, &irq); | |
528 | return irq; | |
529 | } | |
4be44fcd | 530 | |
1da177e4 LT |
531 | /* |
532 | * ACPI based hotplug support for CPU | |
533 | */ | |
534 | #ifdef CONFIG_ACPI_HOTPLUG_CPU | |
009cbadb SR |
535 | |
536 | static int __cpuinit _acpi_map_lsapic(acpi_handle handle, int *pcpu) | |
1da177e4 | 537 | { |
73fea175 AR |
538 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; |
539 | union acpi_object *obj; | |
5f3b1a8b | 540 | struct acpi_madt_local_apic *lapic; |
ee943a82 | 541 | cpumask_var_t tmp_map, new_map; |
73fea175 AR |
542 | u8 physid; |
543 | int cpu; | |
ee943a82 | 544 | int retval = -ENOMEM; |
73fea175 AR |
545 | |
546 | if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer))) | |
547 | return -EINVAL; | |
548 | ||
549 | if (!buffer.length || !buffer.pointer) | |
550 | return -EINVAL; | |
551 | ||
552 | obj = buffer.pointer; | |
553 | if (obj->type != ACPI_TYPE_BUFFER || | |
554 | obj->buffer.length < sizeof(*lapic)) { | |
555 | kfree(buffer.pointer); | |
556 | return -EINVAL; | |
557 | } | |
558 | ||
5f3b1a8b | 559 | lapic = (struct acpi_madt_local_apic *)obj->buffer.pointer; |
73fea175 | 560 | |
5f3b1a8b AS |
561 | if (lapic->header.type != ACPI_MADT_TYPE_LOCAL_APIC || |
562 | !(lapic->lapic_flags & ACPI_MADT_ENABLED)) { | |
73fea175 AR |
563 | kfree(buffer.pointer); |
564 | return -EINVAL; | |
565 | } | |
566 | ||
567 | physid = lapic->id; | |
568 | ||
569 | kfree(buffer.pointer); | |
570 | buffer.length = ACPI_ALLOCATE_BUFFER; | |
571 | buffer.pointer = NULL; | |
572 | ||
ee943a82 RR |
573 | if (!alloc_cpumask_var(&tmp_map, GFP_KERNEL)) |
574 | goto out; | |
575 | ||
576 | if (!alloc_cpumask_var(&new_map, GFP_KERNEL)) | |
577 | goto free_tmp_map; | |
578 | ||
579 | cpumask_copy(tmp_map, cpu_present_mask); | |
dfac2189 | 580 | acpi_register_lapic(physid, lapic->lapic_flags & ACPI_MADT_ENABLED); |
73fea175 AR |
581 | |
582 | /* | |
583 | * If mp_register_lapic successfully generates a new logical cpu | |
584 | * number, then the following will get us exactly what was mapped | |
585 | */ | |
ee943a82 RR |
586 | cpumask_andnot(new_map, cpu_present_mask, tmp_map); |
587 | if (cpumask_empty(new_map)) { | |
73fea175 | 588 | printk ("Unable to map lapic to logical cpu number\n"); |
ee943a82 RR |
589 | retval = -EINVAL; |
590 | goto free_new_map; | |
73fea175 AR |
591 | } |
592 | ||
ee943a82 | 593 | cpu = cpumask_first(new_map); |
73fea175 AR |
594 | |
595 | *pcpu = cpu; | |
ee943a82 RR |
596 | retval = 0; |
597 | ||
598 | free_new_map: | |
599 | free_cpumask_var(new_map); | |
600 | free_tmp_map: | |
601 | free_cpumask_var(tmp_map); | |
602 | out: | |
603 | return retval; | |
1da177e4 | 604 | } |
1da177e4 | 605 | |
009cbadb SR |
606 | /* wrapper to silence section mismatch warning */ |
607 | int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu) | |
608 | { | |
609 | return _acpi_map_lsapic(handle, pcpu); | |
610 | } | |
4be44fcd | 611 | EXPORT_SYMBOL(acpi_map_lsapic); |
1da177e4 | 612 | |
4be44fcd | 613 | int acpi_unmap_lsapic(int cpu) |
1da177e4 | 614 | { |
71fff5e6 | 615 | per_cpu(x86_cpu_to_apicid, cpu) = -1; |
9628937d | 616 | set_cpu_present(cpu, false); |
73fea175 AR |
617 | num_processors--; |
618 | ||
619 | return (0); | |
1da177e4 | 620 | } |
4be44fcd | 621 | |
1da177e4 | 622 | EXPORT_SYMBOL(acpi_unmap_lsapic); |
4be44fcd | 623 | #endif /* CONFIG_ACPI_HOTPLUG_CPU */ |
1da177e4 | 624 | |
4be44fcd | 625 | int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base) |
b1bb248a KK |
626 | { |
627 | /* TBD */ | |
628 | return -EINVAL; | |
629 | } | |
4be44fcd | 630 | |
b1bb248a KK |
631 | EXPORT_SYMBOL(acpi_register_ioapic); |
632 | ||
4be44fcd | 633 | int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base) |
b1bb248a KK |
634 | { |
635 | /* TBD */ | |
636 | return -EINVAL; | |
637 | } | |
4be44fcd | 638 | |
b1bb248a KK |
639 | EXPORT_SYMBOL(acpi_unregister_ioapic); |
640 | ||
5f3b1a8b | 641 | static int __init acpi_parse_sbf(struct acpi_table_header *table) |
1da177e4 | 642 | { |
5f3b1a8b | 643 | struct acpi_table_boot *sb; |
1da177e4 | 644 | |
5f3b1a8b | 645 | sb = (struct acpi_table_boot *)table; |
1da177e4 LT |
646 | if (!sb) { |
647 | printk(KERN_WARNING PREFIX "Unable to map SBF\n"); | |
648 | return -ENODEV; | |
649 | } | |
650 | ||
5f3b1a8b | 651 | sbf_port = sb->cmos_index; /* Save CMOS port */ |
1da177e4 LT |
652 | |
653 | return 0; | |
654 | } | |
655 | ||
1da177e4 | 656 | #ifdef CONFIG_HPET_TIMER |
2d0c87c3 | 657 | #include <asm/hpet.h> |
1da177e4 | 658 | |
a1dfd851 AD |
659 | static struct __initdata resource *hpet_res; |
660 | ||
5f3b1a8b | 661 | static int __init acpi_parse_hpet(struct acpi_table_header *table) |
1da177e4 LT |
662 | { |
663 | struct acpi_table_hpet *hpet_tbl; | |
664 | ||
5f3b1a8b | 665 | hpet_tbl = (struct acpi_table_hpet *)table; |
1da177e4 LT |
666 | if (!hpet_tbl) { |
667 | printk(KERN_WARNING PREFIX "Unable to map HPET\n"); | |
668 | return -ENODEV; | |
669 | } | |
670 | ||
ad363f80 | 671 | if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) { |
1da177e4 LT |
672 | printk(KERN_WARNING PREFIX "HPET timers must be located in " |
673 | "memory.\n"); | |
674 | return -1; | |
675 | } | |
f0f4c343 | 676 | |
2d0c87c3 | 677 | hpet_address = hpet_tbl->address.address; |
f4df73c2 TG |
678 | |
679 | /* | |
680 | * Some broken BIOSes advertise HPET at 0x0. We really do not | |
681 | * want to allocate a resource there. | |
682 | */ | |
683 | if (!hpet_address) { | |
684 | printk(KERN_WARNING PREFIX | |
685 | "HPET id: %#x base: %#lx is invalid\n", | |
686 | hpet_tbl->id, hpet_address); | |
687 | return 0; | |
688 | } | |
689 | #ifdef CONFIG_X86_64 | |
690 | /* | |
691 | * Some even more broken BIOSes advertise HPET at | |
692 | * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add | |
693 | * some noise: | |
694 | */ | |
695 | if (hpet_address == 0xfed0000000000000UL) { | |
696 | if (!hpet_force_user) { | |
697 | printk(KERN_WARNING PREFIX "HPET id: %#x " | |
698 | "base: 0xfed0000000000000 is bogus\n " | |
699 | "try hpet=force on the kernel command line to " | |
700 | "fix it up to 0xfed00000.\n", hpet_tbl->id); | |
701 | hpet_address = 0; | |
702 | return 0; | |
703 | } | |
704 | printk(KERN_WARNING PREFIX | |
705 | "HPET id: %#x base: 0xfed0000000000000 fixed up " | |
706 | "to 0xfed00000.\n", hpet_tbl->id); | |
707 | hpet_address >>= 32; | |
708 | } | |
709 | #endif | |
4be44fcd | 710 | printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n", |
2d0c87c3 | 711 | hpet_tbl->id, hpet_address); |
1da177e4 | 712 | |
a1dfd851 AD |
713 | /* |
714 | * Allocate and initialize the HPET firmware resource for adding into | |
715 | * the resource tree during the lateinit timeframe. | |
716 | */ | |
717 | #define HPET_RESOURCE_NAME_SIZE 9 | |
718 | hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE); | |
719 | ||
a1dfd851 AD |
720 | hpet_res->name = (void *)&hpet_res[1]; |
721 | hpet_res->flags = IORESOURCE_MEM; | |
722 | snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u", | |
723 | hpet_tbl->sequence); | |
724 | ||
725 | hpet_res->start = hpet_address; | |
726 | hpet_res->end = hpet_address + (1 * 1024) - 1; | |
727 | ||
1da177e4 LT |
728 | return 0; |
729 | } | |
a1dfd851 AD |
730 | |
731 | /* | |
732 | * hpet_insert_resource inserts the HPET resources used into the resource | |
733 | * tree. | |
734 | */ | |
735 | static __init int hpet_insert_resource(void) | |
736 | { | |
737 | if (!hpet_res) | |
738 | return 1; | |
739 | ||
740 | return insert_resource(&iomem_resource, hpet_res); | |
741 | } | |
742 | ||
743 | late_initcall(hpet_insert_resource); | |
744 | ||
1da177e4 LT |
745 | #else |
746 | #define acpi_parse_hpet NULL | |
747 | #endif | |
748 | ||
5f3b1a8b | 749 | static int __init acpi_parse_fadt(struct acpi_table_header *table) |
1da177e4 | 750 | { |
90660ec3 | 751 | |
1da177e4 LT |
752 | #ifdef CONFIG_X86_PM_TIMER |
753 | /* detect the location of the ACPI PM Timer */ | |
5f3b1a8b | 754 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) { |
1da177e4 | 755 | /* FADT rev. 2 */ |
5f3b1a8b | 756 | if (acpi_gbl_FADT.xpm_timer_block.space_id != |
4be44fcd | 757 | ACPI_ADR_SPACE_SYSTEM_IO) |
1da177e4 LT |
758 | return 0; |
759 | ||
5f3b1a8b | 760 | pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address; |
e6e87b4b DSL |
761 | /* |
762 | * "X" fields are optional extensions to the original V1.0 | |
763 | * fields, so we must selectively expand V1.0 fields if the | |
764 | * corresponding X field is zero. | |
765 | */ | |
766 | if (!pmtmr_ioport) | |
5f3b1a8b | 767 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
768 | } else { |
769 | /* FADT rev. 1 */ | |
5f3b1a8b | 770 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
771 | } |
772 | if (pmtmr_ioport) | |
4be44fcd LB |
773 | printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n", |
774 | pmtmr_ioport); | |
1da177e4 LT |
775 | #endif |
776 | return 0; | |
777 | } | |
778 | ||
1da177e4 LT |
779 | #ifdef CONFIG_X86_LOCAL_APIC |
780 | /* | |
781 | * Parse LAPIC entries in MADT | |
782 | * returns 0 on success, < 0 on error | |
783 | */ | |
31d2092e AS |
784 | |
785 | static void __init acpi_register_lapic_address(unsigned long address) | |
786 | { | |
787 | mp_lapic_addr = address; | |
788 | ||
789 | set_fixmap_nocache(FIX_APIC_BASE, address); | |
fb3bbd6a | 790 | if (boot_cpu_physical_apicid == -1U) { |
4c9961d5 | 791 | boot_cpu_physical_apicid = read_apic_id(); |
fb3bbd6a YL |
792 | apic_version[boot_cpu_physical_apicid] = |
793 | GET_APIC_VERSION(apic_read(APIC_LVR)); | |
fb3bbd6a | 794 | } |
31d2092e AS |
795 | } |
796 | ||
cbf9bd60 YL |
797 | static int __init early_acpi_parse_madt_lapic_addr_ovr(void) |
798 | { | |
799 | int count; | |
800 | ||
801 | if (!cpu_has_apic) | |
802 | return -ENODEV; | |
803 | ||
804 | /* | |
805 | * Note that the LAPIC address is obtained from the MADT (32-bit value) | |
806 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
807 | */ | |
808 | ||
809 | count = | |
810 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, | |
811 | acpi_parse_lapic_addr_ovr, 0); | |
812 | if (count < 0) { | |
813 | printk(KERN_ERR PREFIX | |
814 | "Error parsing LAPIC address override entry\n"); | |
815 | return count; | |
816 | } | |
817 | ||
818 | acpi_register_lapic_address(acpi_lapic_addr); | |
819 | ||
820 | return count; | |
821 | } | |
822 | ||
4be44fcd | 823 | static int __init acpi_parse_madt_lapic_entries(void) |
1da177e4 LT |
824 | { |
825 | int count; | |
826 | ||
0fcd2709 AK |
827 | if (!cpu_has_apic) |
828 | return -ENODEV; | |
829 | ||
5f3b1a8b | 830 | /* |
1da177e4 LT |
831 | * Note that the LAPIC address is obtained from the MADT (32-bit value) |
832 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
833 | */ | |
834 | ||
4be44fcd | 835 | count = |
5f3b1a8b | 836 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, |
4be44fcd | 837 | acpi_parse_lapic_addr_ovr, 0); |
1da177e4 | 838 | if (count < 0) { |
4be44fcd LB |
839 | printk(KERN_ERR PREFIX |
840 | "Error parsing LAPIC address override entry\n"); | |
1da177e4 LT |
841 | return count; |
842 | } | |
843 | ||
31d2092e | 844 | acpi_register_lapic_address(acpi_lapic_addr); |
1da177e4 | 845 | |
ac049c1d JS |
846 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC, |
847 | acpi_parse_sapic, MAX_APICS); | |
848 | ||
849 | if (!count) | |
850 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC, | |
851 | acpi_parse_lapic, MAX_APICS); | |
4be44fcd | 852 | if (!count) { |
1da177e4 LT |
853 | printk(KERN_ERR PREFIX "No LAPIC entries present\n"); |
854 | /* TBD: Cleanup to allow fallback to MPS */ | |
855 | return -ENODEV; | |
4be44fcd | 856 | } else if (count < 0) { |
1da177e4 LT |
857 | printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n"); |
858 | /* TBD: Cleanup to allow fallback to MPS */ | |
859 | return count; | |
860 | } | |
861 | ||
4be44fcd | 862 | count = |
5f3b1a8b | 863 | acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, acpi_parse_lapic_nmi, 0); |
1da177e4 LT |
864 | if (count < 0) { |
865 | printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n"); | |
866 | /* TBD: Cleanup to allow fallback to MPS */ | |
867 | return count; | |
868 | } | |
869 | return 0; | |
870 | } | |
4be44fcd | 871 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 872 | |
8466361a | 873 | #ifdef CONFIG_X86_IO_APIC |
11113f84 AS |
874 | #define MP_ISA_BUS 0 |
875 | ||
d49c4288 | 876 | #ifdef CONFIG_X86_ES7000 |
11113f84 AS |
877 | extern int es7000_plat; |
878 | #endif | |
879 | ||
5f895148 AS |
880 | static struct { |
881 | int apic_id; | |
882 | int gsi_base; | |
883 | int gsi_end; | |
884 | DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); | |
885 | } mp_ioapic_routing[MAX_IO_APICS]; | |
11113f84 AS |
886 | |
887 | static int mp_find_ioapic(int gsi) | |
888 | { | |
889 | int i = 0; | |
890 | ||
891 | /* Find the IOAPIC that manages this GSI. */ | |
892 | for (i = 0; i < nr_ioapics; i++) { | |
893 | if ((gsi >= mp_ioapic_routing[i].gsi_base) | |
894 | && (gsi <= mp_ioapic_routing[i].gsi_end)) | |
895 | return i; | |
896 | } | |
897 | ||
898 | printk(KERN_ERR "ERROR: Unable to locate IOAPIC for GSI %d\n", gsi); | |
899 | return -1; | |
900 | } | |
901 | ||
902 | static u8 __init uniq_ioapic_id(u8 id) | |
903 | { | |
904 | #ifdef CONFIG_X86_32 | |
905 | if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && | |
906 | !APIC_XAPIC(apic_version[boot_cpu_physical_apicid])) | |
907 | return io_apic_get_unique_id(nr_ioapics, id); | |
908 | else | |
909 | return id; | |
910 | #else | |
911 | int i; | |
912 | DECLARE_BITMAP(used, 256); | |
913 | bitmap_zero(used, 256); | |
914 | for (i = 0; i < nr_ioapics; i++) { | |
ec2cd0a2 AS |
915 | struct mp_config_ioapic *ia = &mp_ioapics[i]; |
916 | __set_bit(ia->mp_apicid, used); | |
11113f84 AS |
917 | } |
918 | if (!test_bit(id, used)) | |
919 | return id; | |
920 | return find_first_zero_bit(used, 256); | |
921 | #endif | |
922 | } | |
923 | ||
924 | static int bad_ioapic(unsigned long address) | |
925 | { | |
926 | if (nr_ioapics >= MAX_IO_APICS) { | |
927 | printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded " | |
928 | "(found %d)\n", MAX_IO_APICS, nr_ioapics); | |
929 | panic("Recompile kernel with bigger MAX_IO_APICS!\n"); | |
930 | } | |
931 | if (!address) { | |
932 | printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address" | |
933 | " found in table, skipping!\n"); | |
934 | return 1; | |
935 | } | |
936 | return 0; | |
937 | } | |
938 | ||
939 | void __init mp_register_ioapic(int id, u32 address, u32 gsi_base) | |
940 | { | |
941 | int idx = 0; | |
942 | ||
943 | if (bad_ioapic(address)) | |
944 | return; | |
945 | ||
946 | idx = nr_ioapics; | |
947 | ||
ec2cd0a2 AS |
948 | mp_ioapics[idx].mp_type = MP_IOAPIC; |
949 | mp_ioapics[idx].mp_flags = MPC_APIC_USABLE; | |
950 | mp_ioapics[idx].mp_apicaddr = address; | |
11113f84 AS |
951 | |
952 | set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address); | |
ec2cd0a2 | 953 | mp_ioapics[idx].mp_apicid = uniq_ioapic_id(id); |
11113f84 | 954 | #ifdef CONFIG_X86_32 |
ec2cd0a2 | 955 | mp_ioapics[idx].mp_apicver = io_apic_get_version(idx); |
11113f84 | 956 | #else |
ec2cd0a2 | 957 | mp_ioapics[idx].mp_apicver = 0; |
11113f84 AS |
958 | #endif |
959 | /* | |
960 | * Build basic GSI lookup table to facilitate gsi->io_apic lookups | |
961 | * and to prevent reprogramming of IOAPIC pins (PCI GSIs). | |
962 | */ | |
ec2cd0a2 | 963 | mp_ioapic_routing[idx].apic_id = mp_ioapics[idx].mp_apicid; |
11113f84 AS |
964 | mp_ioapic_routing[idx].gsi_base = gsi_base; |
965 | mp_ioapic_routing[idx].gsi_end = gsi_base + | |
966 | io_apic_get_redir_entries(idx); | |
967 | ||
ec2cd0a2 AS |
968 | printk(KERN_INFO "IOAPIC[%d]: apic_id %d, version %d, address 0x%lx, " |
969 | "GSI %d-%d\n", idx, mp_ioapics[idx].mp_apicid, | |
970 | mp_ioapics[idx].mp_apicver, mp_ioapics[idx].mp_apicaddr, | |
11113f84 AS |
971 | mp_ioapic_routing[idx].gsi_base, mp_ioapic_routing[idx].gsi_end); |
972 | ||
973 | nr_ioapics++; | |
974 | } | |
975 | ||
3f4a739c YL |
976 | int __init acpi_probe_gsi(void) |
977 | { | |
978 | int idx; | |
979 | int gsi; | |
980 | int max_gsi = 0; | |
981 | ||
982 | if (acpi_disabled) | |
983 | return 0; | |
984 | ||
985 | if (!acpi_ioapic) | |
986 | return 0; | |
987 | ||
988 | max_gsi = 0; | |
989 | for (idx = 0; idx < nr_ioapics; idx++) { | |
990 | gsi = mp_ioapic_routing[idx].gsi_end; | |
991 | ||
992 | if (gsi > max_gsi) | |
993 | max_gsi = gsi; | |
994 | } | |
995 | ||
996 | return max_gsi + 1; | |
997 | } | |
998 | ||
fcfa146e YL |
999 | static void assign_to_mp_irq(struct mp_config_intsrc *m, |
1000 | struct mp_config_intsrc *mp_irq) | |
1001 | { | |
1002 | memcpy(mp_irq, m, sizeof(struct mp_config_intsrc)); | |
1003 | } | |
1004 | ||
1005 | static int mp_irq_cmp(struct mp_config_intsrc *mp_irq, | |
1006 | struct mp_config_intsrc *m) | |
1007 | { | |
1008 | return memcmp(mp_irq, m, sizeof(struct mp_config_intsrc)); | |
1009 | } | |
1010 | ||
1011 | static void save_mp_irq(struct mp_config_intsrc *m) | |
1012 | { | |
1013 | int i; | |
1014 | ||
1015 | for (i = 0; i < mp_irq_entries; i++) { | |
1016 | if (!mp_irq_cmp(&mp_irqs[i], m)) | |
1017 | return; | |
1018 | } | |
1019 | ||
1020 | assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]); | |
1021 | if (++mp_irq_entries == MAX_IRQ_SOURCES) | |
1022 | panic("Max # of irq sources exceeded!!\n"); | |
1023 | } | |
1024 | ||
11113f84 AS |
1025 | void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, u32 gsi) |
1026 | { | |
6df8809b YL |
1027 | int ioapic; |
1028 | int pin; | |
fcfa146e | 1029 | struct mp_config_intsrc mp_irq; |
11113f84 AS |
1030 | |
1031 | /* | |
1032 | * Convert 'gsi' to 'ioapic.pin'. | |
1033 | */ | |
1034 | ioapic = mp_find_ioapic(gsi); | |
1035 | if (ioapic < 0) | |
1036 | return; | |
1037 | pin = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
1038 | ||
1039 | /* | |
1040 | * TBD: This check is for faulty timer entries, where the override | |
1041 | * erroneously sets the trigger to level, resulting in a HUGE | |
1042 | * increase of timer interrupts! | |
1043 | */ | |
1044 | if ((bus_irq == 0) && (trigger == 3)) | |
1045 | trigger = 1; | |
1046 | ||
fcfa146e YL |
1047 | mp_irq.mp_type = MP_INTSRC; |
1048 | mp_irq.mp_irqtype = mp_INT; | |
1049 | mp_irq.mp_irqflag = (trigger << 2) | polarity; | |
1050 | mp_irq.mp_srcbus = MP_ISA_BUS; | |
1051 | mp_irq.mp_srcbusirq = bus_irq; /* IRQ */ | |
1052 | mp_irq.mp_dstapic = mp_ioapics[ioapic].mp_apicid; /* APIC ID */ | |
1053 | mp_irq.mp_dstirq = pin; /* INTIN# */ | |
11113f84 | 1054 | |
fcfa146e | 1055 | save_mp_irq(&mp_irq); |
11113f84 AS |
1056 | } |
1057 | ||
1058 | void __init mp_config_acpi_legacy_irqs(void) | |
1059 | { | |
6df8809b YL |
1060 | int i; |
1061 | int ioapic; | |
1062 | unsigned int dstapic; | |
fcfa146e | 1063 | struct mp_config_intsrc mp_irq; |
11113f84 AS |
1064 | |
1065 | #if defined (CONFIG_MCA) || defined (CONFIG_EISA) | |
1066 | /* | |
1067 | * Fabricate the legacy ISA bus (bus #31). | |
1068 | */ | |
1069 | mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; | |
1070 | #endif | |
1071 | set_bit(MP_ISA_BUS, mp_bus_not_pci); | |
cfc1b9a6 | 1072 | pr_debug("Bus #%d is ISA\n", MP_ISA_BUS); |
11113f84 | 1073 | |
d49c4288 | 1074 | #ifdef CONFIG_X86_ES7000 |
11113f84 AS |
1075 | /* |
1076 | * Older generations of ES7000 have no legacy identity mappings | |
1077 | */ | |
1078 | if (es7000_plat == 1) | |
1079 | return; | |
1080 | #endif | |
1081 | ||
1082 | /* | |
1083 | * Locate the IOAPIC that manages the ISA IRQs (0-15). | |
1084 | */ | |
1085 | ioapic = mp_find_ioapic(0); | |
1086 | if (ioapic < 0) | |
1087 | return; | |
6df8809b | 1088 | dstapic = mp_ioapics[ioapic].mp_apicid; |
11113f84 | 1089 | |
11113f84 AS |
1090 | /* |
1091 | * Use the default configuration for the IRQs 0-15. Unless | |
1092 | * overridden by (MADT) interrupt source override entries. | |
1093 | */ | |
1094 | for (i = 0; i < 16; i++) { | |
1095 | int idx; | |
1096 | ||
1097 | for (idx = 0; idx < mp_irq_entries; idx++) { | |
2fddb6e2 | 1098 | struct mp_config_intsrc *irq = mp_irqs + idx; |
11113f84 AS |
1099 | |
1100 | /* Do we already have a mapping for this ISA IRQ? */ | |
2fddb6e2 AS |
1101 | if (irq->mp_srcbus == MP_ISA_BUS |
1102 | && irq->mp_srcbusirq == i) | |
11113f84 AS |
1103 | break; |
1104 | ||
1105 | /* Do we already have a mapping for this IOAPIC pin */ | |
6df8809b YL |
1106 | if (irq->mp_dstapic == dstapic && |
1107 | irq->mp_dstirq == i) | |
11113f84 AS |
1108 | break; |
1109 | } | |
1110 | ||
1111 | if (idx != mp_irq_entries) { | |
1112 | printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i); | |
1113 | continue; /* IRQ already used */ | |
1114 | } | |
1115 | ||
fcfa146e YL |
1116 | mp_irq.mp_type = MP_INTSRC; |
1117 | mp_irq.mp_irqflag = 0; /* Conforming */ | |
1118 | mp_irq.mp_srcbus = MP_ISA_BUS; | |
1119 | mp_irq.mp_dstapic = dstapic; | |
1120 | mp_irq.mp_irqtype = mp_INT; | |
1121 | mp_irq.mp_srcbusirq = i; /* Identity mapped */ | |
1122 | mp_irq.mp_dstirq = i; | |
11113f84 | 1123 | |
fcfa146e | 1124 | save_mp_irq(&mp_irq); |
11113f84 AS |
1125 | } |
1126 | } | |
1127 | ||
1128 | int mp_register_gsi(u32 gsi, int triggering, int polarity) | |
1129 | { | |
1130 | int ioapic; | |
1131 | int ioapic_pin; | |
1132 | #ifdef CONFIG_X86_32 | |
1133 | #define MAX_GSI_NUM 4096 | |
1134 | #define IRQ_COMPRESSION_START 64 | |
1135 | ||
1136 | static int pci_irq = IRQ_COMPRESSION_START; | |
1137 | /* | |
1138 | * Mapping between Global System Interrupts, which | |
1139 | * represent all possible interrupts, and IRQs | |
1140 | * assigned to actual devices. | |
1141 | */ | |
1142 | static int gsi_to_irq[MAX_GSI_NUM]; | |
1143 | #else | |
1144 | ||
1145 | if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) | |
1146 | return gsi; | |
1147 | #endif | |
1148 | ||
1149 | /* Don't set up the ACPI SCI because it's already set up */ | |
1150 | if (acpi_gbl_FADT.sci_interrupt == gsi) | |
1151 | return gsi; | |
1152 | ||
1153 | ioapic = mp_find_ioapic(gsi); | |
1154 | if (ioapic < 0) { | |
1155 | printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi); | |
1156 | return gsi; | |
1157 | } | |
1158 | ||
1159 | ioapic_pin = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
1160 | ||
1161 | #ifdef CONFIG_X86_32 | |
1162 | if (ioapic_renumber_irq) | |
1163 | gsi = ioapic_renumber_irq(ioapic, gsi); | |
1164 | #endif | |
1165 | ||
1166 | /* | |
1167 | * Avoid pin reprogramming. PRTs typically include entries | |
1168 | * with redundant pin->gsi mappings (but unique PCI devices); | |
1169 | * we only program the IOAPIC on the first. | |
1170 | */ | |
1171 | if (ioapic_pin > MP_MAX_IOAPIC_PIN) { | |
1172 | printk(KERN_ERR "Invalid reference to IOAPIC pin " | |
1173 | "%d-%d\n", mp_ioapic_routing[ioapic].apic_id, | |
1174 | ioapic_pin); | |
1175 | return gsi; | |
1176 | } | |
1177 | if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) { | |
55410791 | 1178 | pr_debug("Pin %d-%d already programmed\n", |
cfc1b9a6 | 1179 | mp_ioapic_routing[ioapic].apic_id, ioapic_pin); |
11113f84 AS |
1180 | #ifdef CONFIG_X86_32 |
1181 | return (gsi < IRQ_COMPRESSION_START ? gsi : gsi_to_irq[gsi]); | |
1182 | #else | |
1183 | return gsi; | |
1184 | #endif | |
1185 | } | |
1186 | ||
1187 | set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed); | |
1188 | #ifdef CONFIG_X86_32 | |
1189 | /* | |
1190 | * For GSI >= 64, use IRQ compression | |
1191 | */ | |
1192 | if ((gsi >= IRQ_COMPRESSION_START) | |
1193 | && (triggering == ACPI_LEVEL_SENSITIVE)) { | |
1194 | /* | |
1195 | * For PCI devices assign IRQs in order, avoiding gaps | |
1196 | * due to unused I/O APIC pins. | |
1197 | */ | |
1198 | int irq = gsi; | |
1199 | if (gsi < MAX_GSI_NUM) { | |
1200 | /* | |
1201 | * Retain the VIA chipset work-around (gsi > 15), but | |
1202 | * avoid a problem where the 8254 timer (IRQ0) is setup | |
1203 | * via an override (so it's not on pin 0 of the ioapic), | |
1204 | * and at the same time, the pin 0 interrupt is a PCI | |
1205 | * type. The gsi > 15 test could cause these two pins | |
1206 | * to be shared as IRQ0, and they are not shareable. | |
1207 | * So test for this condition, and if necessary, avoid | |
1208 | * the pin collision. | |
1209 | */ | |
1210 | gsi = pci_irq++; | |
1211 | /* | |
1212 | * Don't assign IRQ used by ACPI SCI | |
1213 | */ | |
1214 | if (gsi == acpi_gbl_FADT.sci_interrupt) | |
1215 | gsi = pci_irq++; | |
1216 | gsi_to_irq[irq] = gsi; | |
1217 | } else { | |
1218 | printk(KERN_ERR "GSI %u is too high\n", gsi); | |
1219 | return gsi; | |
1220 | } | |
1221 | } | |
1222 | #endif | |
1223 | io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, | |
1224 | triggering == ACPI_EDGE_SENSITIVE ? 0 : 1, | |
1225 | polarity == ACPI_ACTIVE_HIGH ? 0 : 1); | |
1226 | return gsi; | |
1227 | } | |
1228 | ||
2944e16b YL |
1229 | int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin, |
1230 | u32 gsi, int triggering, int polarity) | |
1231 | { | |
fcfa146e YL |
1232 | #ifdef CONFIG_X86_MPPARSE |
1233 | struct mp_config_intsrc mp_irq; | |
2944e16b YL |
1234 | int ioapic; |
1235 | ||
fcfa146e | 1236 | if (!acpi_ioapic) |
d867e531 YL |
1237 | return 0; |
1238 | ||
2944e16b | 1239 | /* print the entry should happen on mptable identically */ |
fcfa146e YL |
1240 | mp_irq.mp_type = MP_INTSRC; |
1241 | mp_irq.mp_irqtype = mp_INT; | |
1242 | mp_irq.mp_irqflag = (triggering == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | | |
2944e16b | 1243 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); |
fcfa146e YL |
1244 | mp_irq.mp_srcbus = number; |
1245 | mp_irq.mp_srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); | |
2944e16b | 1246 | ioapic = mp_find_ioapic(gsi); |
fcfa146e YL |
1247 | mp_irq.mp_dstapic = mp_ioapic_routing[ioapic].apic_id; |
1248 | mp_irq.mp_dstirq = gsi - mp_ioapic_routing[ioapic].gsi_base; | |
2944e16b | 1249 | |
fcfa146e YL |
1250 | save_mp_irq(&mp_irq); |
1251 | #endif | |
2944e16b YL |
1252 | return 0; |
1253 | } | |
1254 | ||
1da177e4 LT |
1255 | /* |
1256 | * Parse IOAPIC related entries in MADT | |
1257 | * returns 0 on success, < 0 on error | |
1258 | */ | |
4be44fcd | 1259 | static int __init acpi_parse_madt_ioapic_entries(void) |
1da177e4 LT |
1260 | { |
1261 | int count; | |
1262 | ||
1263 | /* | |
1264 | * ACPI interpreter is required to complete interrupt setup, | |
1265 | * so if it is off, don't enumerate the io-apics with ACPI. | |
1266 | * If MPS is present, it will handle them, | |
1267 | * otherwise the system will stay in PIC mode | |
1268 | */ | |
1269 | if (acpi_disabled || acpi_noirq) { | |
1270 | return -ENODEV; | |
4be44fcd | 1271 | } |
1da177e4 | 1272 | |
5f3b1a8b | 1273 | if (!cpu_has_apic) |
d3b6a349 AK |
1274 | return -ENODEV; |
1275 | ||
1da177e4 | 1276 | /* |
4be44fcd | 1277 | * if "noapic" boot option, don't look for IO-APICs |
1da177e4 LT |
1278 | */ |
1279 | if (skip_ioapic_setup) { | |
1280 | printk(KERN_INFO PREFIX "Skipping IOAPIC probe " | |
4be44fcd | 1281 | "due to 'noapic' option.\n"); |
1da177e4 LT |
1282 | return -ENODEV; |
1283 | } | |
1284 | ||
4be44fcd | 1285 | count = |
5f3b1a8b | 1286 | acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic, |
4be44fcd | 1287 | MAX_IO_APICS); |
1da177e4 LT |
1288 | if (!count) { |
1289 | printk(KERN_ERR PREFIX "No IOAPIC entries present\n"); | |
1290 | return -ENODEV; | |
4be44fcd | 1291 | } else if (count < 0) { |
1da177e4 LT |
1292 | printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n"); |
1293 | return count; | |
1294 | } | |
1295 | ||
4be44fcd | 1296 | count = |
5f3b1a8b | 1297 | acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, acpi_parse_int_src_ovr, |
71f521bb | 1298 | nr_irqs); |
1da177e4 | 1299 | if (count < 0) { |
4be44fcd LB |
1300 | printk(KERN_ERR PREFIX |
1301 | "Error parsing interrupt source overrides entry\n"); | |
1da177e4 LT |
1302 | /* TBD: Cleanup to allow fallback to MPS */ |
1303 | return count; | |
1304 | } | |
1305 | ||
1306 | /* | |
1307 | * If BIOS did not supply an INT_SRC_OVR for the SCI | |
1308 | * pretend we got one so we can set the SCI flags. | |
1309 | */ | |
1310 | if (!acpi_sci_override_gsi) | |
cee324b1 | 1311 | acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0); |
1da177e4 LT |
1312 | |
1313 | /* Fill in identity legacy mapings where no override */ | |
1314 | mp_config_acpi_legacy_irqs(); | |
1315 | ||
4be44fcd | 1316 | count = |
5f3b1a8b | 1317 | acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, acpi_parse_nmi_src, |
71f521bb | 1318 | nr_irqs); |
1da177e4 LT |
1319 | if (count < 0) { |
1320 | printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n"); | |
1321 | /* TBD: Cleanup to allow fallback to MPS */ | |
1322 | return count; | |
1323 | } | |
1324 | ||
1325 | return 0; | |
1326 | } | |
1327 | #else | |
1328 | static inline int acpi_parse_madt_ioapic_entries(void) | |
1329 | { | |
1330 | return -1; | |
1331 | } | |
8466361a | 1332 | #endif /* !CONFIG_X86_IO_APIC */ |
1da177e4 | 1333 | |
cbf9bd60 YL |
1334 | static void __init early_acpi_process_madt(void) |
1335 | { | |
1336 | #ifdef CONFIG_X86_LOCAL_APIC | |
1337 | int error; | |
1338 | ||
1339 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { | |
1340 | ||
1341 | /* | |
1342 | * Parse MADT LAPIC entries | |
1343 | */ | |
1344 | error = early_acpi_parse_madt_lapic_addr_ovr(); | |
1345 | if (!error) { | |
1346 | acpi_lapic = 1; | |
1347 | smp_found_config = 1; | |
1348 | } | |
1349 | if (error == -EINVAL) { | |
1350 | /* | |
1351 | * Dell Precision Workstation 410, 610 come here. | |
1352 | */ | |
1353 | printk(KERN_ERR PREFIX | |
1354 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1355 | disable_acpi(); | |
1356 | } | |
1357 | } | |
1358 | #endif | |
1359 | } | |
1360 | ||
4be44fcd | 1361 | static void __init acpi_process_madt(void) |
1da177e4 LT |
1362 | { |
1363 | #ifdef CONFIG_X86_LOCAL_APIC | |
7f8f97c3 | 1364 | int error; |
1da177e4 | 1365 | |
7f8f97c3 | 1366 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { |
1da177e4 LT |
1367 | |
1368 | /* | |
1369 | * Parse MADT LAPIC entries | |
1370 | */ | |
1371 | error = acpi_parse_madt_lapic_entries(); | |
1372 | if (!error) { | |
1373 | acpi_lapic = 1; | |
1374 | ||
911a62d4 VP |
1375 | #ifdef CONFIG_X86_GENERICARCH |
1376 | generic_bigsmp_probe(); | |
1377 | #endif | |
1da177e4 LT |
1378 | /* |
1379 | * Parse MADT IO-APIC entries | |
1380 | */ | |
1381 | error = acpi_parse_madt_ioapic_entries(); | |
1382 | if (!error) { | |
1383 | acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC; | |
1da177e4 LT |
1384 | acpi_ioapic = 1; |
1385 | ||
1386 | smp_found_config = 1; | |
6e1cb38a | 1387 | #ifdef CONFIG_X86_32 |
3c43f039 | 1388 | setup_apic_routing(); |
6e1cb38a | 1389 | #endif |
1da177e4 LT |
1390 | } |
1391 | } | |
1392 | if (error == -EINVAL) { | |
1393 | /* | |
1394 | * Dell Precision Workstation 410, 610 come here. | |
1395 | */ | |
4be44fcd LB |
1396 | printk(KERN_ERR PREFIX |
1397 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1da177e4 LT |
1398 | disable_acpi(); |
1399 | } | |
7b37b5fd LB |
1400 | } else { |
1401 | /* | |
1402 | * ACPI found no MADT, and so ACPI wants UP PIC mode. | |
1403 | * In the event an MPS table was found, forget it. | |
1404 | * Boot with "acpi=off" to use MPS on such a system. | |
1405 | */ | |
1406 | if (smp_found_config) { | |
1407 | printk(KERN_WARNING PREFIX | |
1408 | "No APIC-table, disabling MPS\n"); | |
1409 | smp_found_config = 0; | |
1410 | } | |
1da177e4 | 1411 | } |
69b88afa YL |
1412 | |
1413 | /* | |
1414 | * ACPI supports both logical (e.g. Hyper-Threading) and physical | |
1415 | * processors, where MPS only supports physical. | |
1416 | */ | |
1417 | if (acpi_lapic && acpi_ioapic) | |
1418 | printk(KERN_INFO "Using ACPI (MADT) for SMP configuration " | |
1419 | "information\n"); | |
1420 | else if (acpi_lapic) | |
1421 | printk(KERN_INFO "Using ACPI for processor (LAPIC) " | |
1422 | "configuration information\n"); | |
1da177e4 LT |
1423 | #endif |
1424 | return; | |
1425 | } | |
1426 | ||
1855256c | 1427 | static int __init disable_acpi_irq(const struct dmi_system_id *d) |
aea00143 AP |
1428 | { |
1429 | if (!acpi_force) { | |
1430 | printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n", | |
1431 | d->ident); | |
1432 | acpi_noirq_set(); | |
1433 | } | |
1434 | return 0; | |
1435 | } | |
1436 | ||
1855256c | 1437 | static int __init disable_acpi_pci(const struct dmi_system_id *d) |
aea00143 AP |
1438 | { |
1439 | if (!acpi_force) { | |
1440 | printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n", | |
1441 | d->ident); | |
1442 | acpi_disable_pci(); | |
1443 | } | |
1444 | return 0; | |
1445 | } | |
aea00143 | 1446 | |
1855256c | 1447 | static int __init dmi_disable_acpi(const struct dmi_system_id *d) |
aea00143 AP |
1448 | { |
1449 | if (!acpi_force) { | |
4be44fcd | 1450 | printk(KERN_NOTICE "%s detected: acpi off\n", d->ident); |
aea00143 AP |
1451 | disable_acpi(); |
1452 | } else { | |
1453 | printk(KERN_NOTICE | |
1454 | "Warning: DMI blacklist says broken, but acpi forced\n"); | |
1455 | } | |
1456 | return 0; | |
1457 | } | |
1458 | ||
1459 | /* | |
1460 | * Limit ACPI to CPU enumeration for HT | |
1461 | */ | |
1855256c | 1462 | static int __init force_acpi_ht(const struct dmi_system_id *d) |
aea00143 AP |
1463 | { |
1464 | if (!acpi_force) { | |
4be44fcd LB |
1465 | printk(KERN_NOTICE "%s detected: force use of acpi=ht\n", |
1466 | d->ident); | |
aea00143 AP |
1467 | disable_acpi(); |
1468 | acpi_ht = 1; | |
1469 | } else { | |
1470 | printk(KERN_NOTICE | |
1471 | "Warning: acpi=force overrules DMI blacklist: acpi=ht\n"); | |
1472 | } | |
1473 | return 0; | |
1474 | } | |
1475 | ||
e2079c43 RW |
1476 | /* |
1477 | * Force ignoring BIOS IRQ0 pin2 override | |
1478 | */ | |
1479 | static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) | |
1480 | { | |
8d89adf4 IM |
1481 | /* |
1482 | * The ati_ixp4x0_rev() early PCI quirk should have set | |
1483 | * the acpi_skip_timer_override flag already: | |
1484 | */ | |
1485 | if (!acpi_skip_timer_override) { | |
1486 | WARN(1, KERN_ERR "ati_ixp4x0 quirk not complete.\n"); | |
1487 | pr_notice("%s detected: Ignoring BIOS IRQ0 pin2 override\n", | |
1488 | d->ident); | |
1489 | acpi_skip_timer_override = 1; | |
1490 | } | |
e2079c43 RW |
1491 | return 0; |
1492 | } | |
1493 | ||
aea00143 AP |
1494 | /* |
1495 | * If your system is blacklisted here, but you find that acpi=force | |
1496 | * works for you, please contact acpi-devel@sourceforge.net | |
1497 | */ | |
1498 | static struct dmi_system_id __initdata acpi_dmi_table[] = { | |
1499 | /* | |
1500 | * Boxes that need ACPI disabled | |
1501 | */ | |
1502 | { | |
4be44fcd LB |
1503 | .callback = dmi_disable_acpi, |
1504 | .ident = "IBM Thinkpad", | |
1505 | .matches = { | |
1506 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1507 | DMI_MATCH(DMI_BOARD_NAME, "2629H1G"), | |
1508 | }, | |
1509 | }, | |
aea00143 AP |
1510 | |
1511 | /* | |
1512 | * Boxes that need acpi=ht | |
1513 | */ | |
1514 | { | |
4be44fcd LB |
1515 | .callback = force_acpi_ht, |
1516 | .ident = "FSC Primergy T850", | |
1517 | .matches = { | |
1518 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), | |
1519 | DMI_MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"), | |
1520 | }, | |
1521 | }, | |
aea00143 | 1522 | { |
4be44fcd LB |
1523 | .callback = force_acpi_ht, |
1524 | .ident = "HP VISUALIZE NT Workstation", | |
1525 | .matches = { | |
1526 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
1527 | DMI_MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"), | |
1528 | }, | |
1529 | }, | |
aea00143 | 1530 | { |
4be44fcd LB |
1531 | .callback = force_acpi_ht, |
1532 | .ident = "Compaq Workstation W8000", | |
1533 | .matches = { | |
1534 | DMI_MATCH(DMI_SYS_VENDOR, "Compaq"), | |
1535 | DMI_MATCH(DMI_PRODUCT_NAME, "Workstation W8000"), | |
1536 | }, | |
1537 | }, | |
aea00143 | 1538 | { |
4be44fcd LB |
1539 | .callback = force_acpi_ht, |
1540 | .ident = "ASUS P4B266", | |
1541 | .matches = { | |
1542 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1543 | DMI_MATCH(DMI_BOARD_NAME, "P4B266"), | |
1544 | }, | |
1545 | }, | |
aea00143 | 1546 | { |
4be44fcd LB |
1547 | .callback = force_acpi_ht, |
1548 | .ident = "ASUS P2B-DS", | |
1549 | .matches = { | |
1550 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1551 | DMI_MATCH(DMI_BOARD_NAME, "P2B-DS"), | |
1552 | }, | |
1553 | }, | |
aea00143 | 1554 | { |
4be44fcd LB |
1555 | .callback = force_acpi_ht, |
1556 | .ident = "ASUS CUR-DLS", | |
1557 | .matches = { | |
1558 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1559 | DMI_MATCH(DMI_BOARD_NAME, "CUR-DLS"), | |
1560 | }, | |
1561 | }, | |
aea00143 | 1562 | { |
4be44fcd LB |
1563 | .callback = force_acpi_ht, |
1564 | .ident = "ABIT i440BX-W83977", | |
1565 | .matches = { | |
1566 | DMI_MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"), | |
1567 | DMI_MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"), | |
1568 | }, | |
1569 | }, | |
aea00143 | 1570 | { |
4be44fcd LB |
1571 | .callback = force_acpi_ht, |
1572 | .ident = "IBM Bladecenter", | |
1573 | .matches = { | |
1574 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1575 | DMI_MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"), | |
1576 | }, | |
1577 | }, | |
aea00143 | 1578 | { |
4be44fcd LB |
1579 | .callback = force_acpi_ht, |
1580 | .ident = "IBM eServer xSeries 360", | |
1581 | .matches = { | |
1582 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1583 | DMI_MATCH(DMI_BOARD_NAME, "eServer xSeries 360"), | |
1584 | }, | |
1585 | }, | |
aea00143 | 1586 | { |
4be44fcd LB |
1587 | .callback = force_acpi_ht, |
1588 | .ident = "IBM eserver xSeries 330", | |
1589 | .matches = { | |
1590 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1591 | DMI_MATCH(DMI_BOARD_NAME, "eserver xSeries 330"), | |
1592 | }, | |
1593 | }, | |
aea00143 | 1594 | { |
4be44fcd LB |
1595 | .callback = force_acpi_ht, |
1596 | .ident = "IBM eserver xSeries 440", | |
1597 | .matches = { | |
1598 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1599 | DMI_MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"), | |
1600 | }, | |
1601 | }, | |
aea00143 | 1602 | |
aea00143 AP |
1603 | /* |
1604 | * Boxes that need ACPI PCI IRQ routing disabled | |
1605 | */ | |
1606 | { | |
4be44fcd LB |
1607 | .callback = disable_acpi_irq, |
1608 | .ident = "ASUS A7V", | |
1609 | .matches = { | |
1610 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"), | |
1611 | DMI_MATCH(DMI_BOARD_NAME, "<A7V>"), | |
1612 | /* newer BIOS, Revision 1011, does work */ | |
1613 | DMI_MATCH(DMI_BIOS_VERSION, | |
1614 | "ASUS A7V ACPI BIOS Revision 1007"), | |
1615 | }, | |
1616 | }, | |
74586fca LB |
1617 | { |
1618 | /* | |
1619 | * Latest BIOS for IBM 600E (1.16) has bad pcinum | |
1620 | * for LPC bridge, which is needed for the PCI | |
1621 | * interrupt links to work. DSDT fix is in bug 5966. | |
1622 | * 2645, 2646 model numbers are shared with 600/600E/600X | |
1623 | */ | |
1624 | .callback = disable_acpi_irq, | |
1625 | .ident = "IBM Thinkpad 600 Series 2645", | |
1626 | .matches = { | |
1627 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1628 | DMI_MATCH(DMI_BOARD_NAME, "2645"), | |
1629 | }, | |
1630 | }, | |
1631 | { | |
1632 | .callback = disable_acpi_irq, | |
1633 | .ident = "IBM Thinkpad 600 Series 2646", | |
1634 | .matches = { | |
1635 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1636 | DMI_MATCH(DMI_BOARD_NAME, "2646"), | |
1637 | }, | |
1638 | }, | |
aea00143 AP |
1639 | /* |
1640 | * Boxes that need ACPI PCI IRQ routing and PCI scan disabled | |
1641 | */ | |
4be44fcd LB |
1642 | { /* _BBN 0 bug */ |
1643 | .callback = disable_acpi_pci, | |
1644 | .ident = "ASUS PR-DLS", | |
1645 | .matches = { | |
1646 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1647 | DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"), | |
1648 | DMI_MATCH(DMI_BIOS_VERSION, | |
1649 | "ASUS PR-DLS ACPI BIOS Revision 1010"), | |
1650 | DMI_MATCH(DMI_BIOS_DATE, "03/21/2003") | |
1651 | }, | |
1652 | }, | |
aea00143 | 1653 | { |
4be44fcd LB |
1654 | .callback = disable_acpi_pci, |
1655 | .ident = "Acer TravelMate 36x Laptop", | |
1656 | .matches = { | |
1657 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), | |
1658 | DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"), | |
1659 | }, | |
1660 | }, | |
35af2821 AH |
1661 | {} |
1662 | }; | |
1663 | ||
1664 | /* second table for DMI checks that should run after early-quirks */ | |
1665 | static struct dmi_system_id __initdata acpi_dmi_table_late[] = { | |
e2079c43 RW |
1666 | /* |
1667 | * HP laptops which use a DSDT reporting as HP/SB400/10000, | |
1668 | * which includes some code which overrides all temperature | |
1669 | * trip points to 16C if the INTIN2 input of the I/O APIC | |
1670 | * is enabled. This input is incorrectly designated the | |
1671 | * ISA IRQ 0 via an interrupt source override even though | |
1672 | * it is wired to the output of the master 8259A and INTIN0 | |
1673 | * is not connected at all. Force ignoring BIOS IRQ0 pin2 | |
1674 | * override in that cases. | |
1675 | */ | |
e84956f9 RW |
1676 | { |
1677 | .callback = dmi_ignore_irq0_timer_override, | |
1678 | .ident = "HP nx6115 laptop", | |
1679 | .matches = { | |
1680 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1681 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6115"), | |
1682 | }, | |
1683 | }, | |
e2079c43 RW |
1684 | { |
1685 | .callback = dmi_ignore_irq0_timer_override, | |
1686 | .ident = "HP NX6125 laptop", | |
1687 | .matches = { | |
1688 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1689 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"), | |
1690 | }, | |
1691 | }, | |
1692 | { | |
1693 | .callback = dmi_ignore_irq0_timer_override, | |
1694 | .ident = "HP NX6325 laptop", | |
1695 | .matches = { | |
1696 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1697 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), | |
1698 | }, | |
1699 | }, | |
e84956f9 RW |
1700 | { |
1701 | .callback = dmi_ignore_irq0_timer_override, | |
1702 | .ident = "HP 6715b laptop", | |
1703 | .matches = { | |
1704 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1705 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b"), | |
1706 | }, | |
1707 | }, | |
4be44fcd | 1708 | {} |
aea00143 AP |
1709 | }; |
1710 | ||
1da177e4 LT |
1711 | /* |
1712 | * acpi_boot_table_init() and acpi_boot_init() | |
1713 | * called from setup_arch(), always. | |
1714 | * 1. checksums all tables | |
1715 | * 2. enumerates lapics | |
1716 | * 3. enumerates io-apics | |
1717 | * | |
1718 | * acpi_table_init() is separate to allow reading SRAT without | |
1719 | * other side effects. | |
1720 | * | |
1721 | * side effects of acpi_boot_init: | |
1722 | * acpi_lapic = 1 if LAPIC found | |
1723 | * acpi_ioapic = 1 if IOAPIC found | |
1724 | * if (acpi_lapic && acpi_ioapic) smp_found_config = 1; | |
1725 | * if acpi_blacklisted() acpi_disabled = 1; | |
1726 | * acpi_irq_model=... | |
1727 | * ... | |
1728 | * | |
1729 | * return value: (currently ignored) | |
1730 | * 0: success | |
1731 | * !0: failure | |
1732 | */ | |
1733 | ||
4be44fcd | 1734 | int __init acpi_boot_table_init(void) |
1da177e4 LT |
1735 | { |
1736 | int error; | |
1737 | ||
aea00143 | 1738 | dmi_check_system(acpi_dmi_table); |
aea00143 | 1739 | |
1da177e4 LT |
1740 | /* |
1741 | * If acpi_disabled, bail out | |
1742 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1743 | */ | |
1744 | if (acpi_disabled && !acpi_ht) | |
4be44fcd | 1745 | return 1; |
1da177e4 | 1746 | |
5f3b1a8b | 1747 | /* |
1da177e4 LT |
1748 | * Initialize the ACPI boot-time table parser. |
1749 | */ | |
1750 | error = acpi_table_init(); | |
1751 | if (error) { | |
1752 | disable_acpi(); | |
1753 | return error; | |
1754 | } | |
1da177e4 | 1755 | |
5f3b1a8b | 1756 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1757 | |
1758 | /* | |
1759 | * blacklist may disable ACPI entirely | |
1760 | */ | |
1761 | error = acpi_blacklisted(); | |
1762 | if (error) { | |
1da177e4 LT |
1763 | if (acpi_force) { |
1764 | printk(KERN_WARNING PREFIX "acpi=force override\n"); | |
1765 | } else { | |
1766 | printk(KERN_WARNING PREFIX "Disabling ACPI support\n"); | |
1767 | disable_acpi(); | |
1768 | return error; | |
1769 | } | |
1770 | } | |
cbf9bd60 YL |
1771 | |
1772 | return 0; | |
1773 | } | |
1774 | ||
1775 | int __init early_acpi_boot_init(void) | |
1776 | { | |
1777 | /* | |
1778 | * If acpi_disabled, bail out | |
1779 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1780 | */ | |
1781 | if (acpi_disabled && !acpi_ht) | |
1782 | return 1; | |
1783 | ||
1784 | /* | |
1785 | * Process the Multiple APIC Description Table (MADT), if present | |
1786 | */ | |
1787 | early_acpi_process_madt(); | |
1da177e4 LT |
1788 | |
1789 | return 0; | |
1790 | } | |
1791 | ||
1da177e4 LT |
1792 | int __init acpi_boot_init(void) |
1793 | { | |
35af2821 AH |
1794 | /* those are executed after early-quirks are executed */ |
1795 | dmi_check_system(acpi_dmi_table_late); | |
1796 | ||
1da177e4 LT |
1797 | /* |
1798 | * If acpi_disabled, bail out | |
1799 | * One exception: acpi=ht continues far enough to enumerate LAPICs | |
1800 | */ | |
1801 | if (acpi_disabled && !acpi_ht) | |
4be44fcd | 1802 | return 1; |
1da177e4 | 1803 | |
5f3b1a8b | 1804 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1805 | |
1806 | /* | |
1807 | * set sci_int and PM timer address | |
1808 | */ | |
ceb6c468 | 1809 | acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt); |
1da177e4 LT |
1810 | |
1811 | /* | |
1812 | * Process the Multiple APIC Description Table (MADT), if present | |
1813 | */ | |
1814 | acpi_process_madt(); | |
1815 | ||
5f3b1a8b | 1816 | acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet); |
1da177e4 LT |
1817 | |
1818 | return 0; | |
1819 | } | |
1a3f239d RR |
1820 | |
1821 | static int __init parse_acpi(char *arg) | |
1822 | { | |
1823 | if (!arg) | |
1824 | return -EINVAL; | |
1825 | ||
1826 | /* "acpi=off" disables both ACPI table parsing and interpreter */ | |
1827 | if (strcmp(arg, "off") == 0) { | |
1828 | disable_acpi(); | |
1829 | } | |
1830 | /* acpi=force to over-ride black-list */ | |
1831 | else if (strcmp(arg, "force") == 0) { | |
1832 | acpi_force = 1; | |
1833 | acpi_ht = 1; | |
1834 | acpi_disabled = 0; | |
1835 | } | |
1836 | /* acpi=strict disables out-of-spec workarounds */ | |
1837 | else if (strcmp(arg, "strict") == 0) { | |
1838 | acpi_strict = 1; | |
1839 | } | |
1840 | /* Limit ACPI just to boot-time to enable HT */ | |
1841 | else if (strcmp(arg, "ht") == 0) { | |
1842 | if (!acpi_force) | |
1843 | disable_acpi(); | |
1844 | acpi_ht = 1; | |
1845 | } | |
237889bf ZY |
1846 | /* acpi=rsdt use RSDT instead of XSDT */ |
1847 | else if (strcmp(arg, "rsdt") == 0) { | |
1848 | acpi_rsdt_forced = 1; | |
1849 | } | |
1a3f239d RR |
1850 | /* "acpi=noirq" disables ACPI interrupt routing */ |
1851 | else if (strcmp(arg, "noirq") == 0) { | |
1852 | acpi_noirq_set(); | |
1853 | } else { | |
1854 | /* Core will printk when we return error. */ | |
1855 | return -EINVAL; | |
1856 | } | |
1857 | return 0; | |
1858 | } | |
1859 | early_param("acpi", parse_acpi); | |
1860 | ||
1861 | /* FIXME: Using pci= for an ACPI parameter is a travesty. */ | |
1862 | static int __init parse_pci(char *arg) | |
1863 | { | |
1864 | if (arg && strcmp(arg, "noacpi") == 0) | |
1865 | acpi_disable_pci(); | |
1866 | return 0; | |
1867 | } | |
1868 | early_param("pci", parse_pci); | |
1869 | ||
3c999f14 YL |
1870 | int __init acpi_mps_check(void) |
1871 | { | |
1872 | #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE) | |
1873 | /* mptable code is not built-in*/ | |
1874 | if (acpi_disabled || acpi_noirq) { | |
1875 | printk(KERN_WARNING "MPS support code is not built-in.\n" | |
1876 | "Using acpi=off or acpi=noirq or pci=noacpi " | |
1877 | "may have problem\n"); | |
1878 | return 1; | |
1879 | } | |
1880 | #endif | |
1881 | return 0; | |
1882 | } | |
1883 | ||
1a3f239d RR |
1884 | #ifdef CONFIG_X86_IO_APIC |
1885 | static int __init parse_acpi_skip_timer_override(char *arg) | |
1886 | { | |
1887 | acpi_skip_timer_override = 1; | |
1888 | return 0; | |
1889 | } | |
1890 | early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override); | |
fa18f477 AK |
1891 | |
1892 | static int __init parse_acpi_use_timer_override(char *arg) | |
1893 | { | |
1894 | acpi_use_timer_override = 1; | |
1895 | return 0; | |
1896 | } | |
1897 | early_param("acpi_use_timer_override", parse_acpi_use_timer_override); | |
1a3f239d RR |
1898 | #endif /* CONFIG_X86_IO_APIC */ |
1899 | ||
1900 | static int __init setup_acpi_sci(char *s) | |
1901 | { | |
1902 | if (!s) | |
1903 | return -EINVAL; | |
1904 | if (!strcmp(s, "edge")) | |
5f3b1a8b AS |
1905 | acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE | |
1906 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1907 | else if (!strcmp(s, "level")) |
5f3b1a8b AS |
1908 | acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL | |
1909 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1910 | else if (!strcmp(s, "high")) |
5f3b1a8b AS |
1911 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH | |
1912 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d | 1913 | else if (!strcmp(s, "low")) |
5f3b1a8b AS |
1914 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW | |
1915 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d RR |
1916 | else |
1917 | return -EINVAL; | |
1918 | return 0; | |
1919 | } | |
1920 | early_param("acpi_sci", setup_acpi_sci); | |
d0a9081b AM |
1921 | |
1922 | int __acpi_acquire_global_lock(unsigned int *lock) | |
1923 | { | |
1924 | unsigned int old, new, val; | |
1925 | do { | |
1926 | old = *lock; | |
1927 | new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1)); | |
1928 | val = cmpxchg(lock, old, new); | |
1929 | } while (unlikely (val != old)); | |
1930 | return (new < 3) ? -1 : 0; | |
1931 | } | |
1932 | ||
1933 | int __acpi_release_global_lock(unsigned int *lock) | |
1934 | { | |
1935 | unsigned int old, new, val; | |
1936 | do { | |
1937 | old = *lock; | |
1938 | new = old & ~0x3; | |
1939 | val = cmpxchg(lock, old, new); | |
1940 | } while (unlikely (val != old)); | |
1941 | return old & 0x1; | |
1942 | } |