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1da177e4 LT |
1 | /* |
2 | * boot.c - Architecture-Specific Low-Level ACPI Boot Support | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
5 | * Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com> | |
6 | * | |
7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
24 | */ | |
25 | ||
26 | #include <linux/init.h> | |
1da177e4 | 27 | #include <linux/acpi.h> |
d66bea57 | 28 | #include <linux/acpi_pmtmr.h> |
1da177e4 | 29 | #include <linux/efi.h> |
73fea175 | 30 | #include <linux/cpumask.h> |
1da177e4 | 31 | #include <linux/module.h> |
aea00143 | 32 | #include <linux/dmi.h> |
b33fa1f3 | 33 | #include <linux/irq.h> |
ca7e28aa | 34 | #include <linux/irqdomain.h> |
5a0e3ad6 | 35 | #include <linux/slab.h> |
f0f4c343 AD |
36 | #include <linux/bootmem.h> |
37 | #include <linux/ioport.h> | |
a31f8205 | 38 | #include <linux/pci.h> |
1da177e4 | 39 | |
b72d0db9 | 40 | #include <asm/pci_x86.h> |
1da177e4 LT |
41 | #include <asm/pgtable.h> |
42 | #include <asm/io_apic.h> | |
43 | #include <asm/apic.h> | |
44 | #include <asm/io.h> | |
1da177e4 | 45 | #include <asm/mpspec.h> |
dfac2189 | 46 | #include <asm/smp.h> |
95d76acc | 47 | #include <asm/i8259.h> |
1da177e4 | 48 | |
d6a77ead | 49 | #include "sleep.h" /* To include x86_acpi_suspend_lowlevel */ |
e8924acb | 50 | static int __initdata acpi_force = 0; |
c636f753 | 51 | int acpi_disabled; |
df3bb57d AK |
52 | EXPORT_SYMBOL(acpi_disabled); |
53 | ||
1da177e4 | 54 | #ifdef CONFIG_X86_64 |
1dcdd3d1 | 55 | # include <asm/proto.h> |
4be44fcd | 56 | #endif /* X86 */ |
1da177e4 | 57 | |
1da177e4 LT |
58 | #define PREFIX "ACPI: " |
59 | ||
90d53909 | 60 | int acpi_noirq; /* skip ACPI IRQ initialization */ |
6e4be1ff YL |
61 | int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ |
62 | EXPORT_SYMBOL(acpi_pci_disabled); | |
1da177e4 LT |
63 | |
64 | int acpi_lapic; | |
65 | int acpi_ioapic; | |
66 | int acpi_strict; | |
9ad95879 | 67 | int acpi_disable_cmcff; |
1da177e4 | 68 | |
5f3b1a8b | 69 | u8 acpi_sci_flags __initdata; |
1da177e4 LT |
70 | int acpi_sci_override_gsi __initdata; |
71 | int acpi_skip_timer_override __initdata; | |
fa18f477 | 72 | int acpi_use_timer_override __initdata; |
7f74f8f2 | 73 | int acpi_fix_pin2_polarity __initdata; |
1da177e4 LT |
74 | |
75 | #ifdef CONFIG_X86_LOCAL_APIC | |
76 | static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; | |
77 | #endif | |
78 | ||
5da2fd26 JL |
79 | /* |
80 | * Locks related to IOAPIC hotplug | |
81 | * Hotplug side: | |
82 | * ->device_hotplug_lock | |
83 | * ->acpi_ioapic_lock | |
84 | * ->ioapic_lock | |
85 | * Interrupt mapping side: | |
86 | * ->acpi_ioapic_lock | |
87 | * ->ioapic_mutex | |
88 | * ->ioapic_lock | |
89 | */ | |
90 | static DEFINE_MUTEX(acpi_ioapic_lock); | |
91 | ||
1da177e4 LT |
92 | /* -------------------------------------------------------------------------- |
93 | Boot-time Configuration | |
94 | -------------------------------------------------------------------------- */ | |
95 | ||
96 | /* | |
97 | * The default interrupt routing model is PIC (8259). This gets | |
27b46d76 | 98 | * overridden if IOAPICs are enumerated (below). |
1da177e4 | 99 | */ |
4be44fcd | 100 | enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC; |
1da177e4 | 101 | |
1da177e4 | 102 | |
988856ee EB |
103 | /* |
104 | * ISA irqs by default are the first 16 gsis but can be | |
105 | * any gsi as specified by an interrupt source override. | |
106 | */ | |
107 | static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = { | |
108 | 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 | |
109 | }; | |
110 | ||
2c0a6894 | 111 | #define ACPI_INVALID_GSI INT_MIN |
988856ee | 112 | |
1da177e4 | 113 | /* |
45f1330a ZY |
114 | * This is just a simple wrapper around early_ioremap(), |
115 | * with sanity checks for phys == 0 and size == 0. | |
1da177e4 | 116 | */ |
2fdf0741 | 117 | char *__init __acpi_map_table(unsigned long phys, unsigned long size) |
1da177e4 | 118 | { |
1da177e4 | 119 | |
f34fa82b YL |
120 | if (!phys || !size) |
121 | return NULL; | |
122 | ||
7d97277b YL |
123 | return early_ioremap(phys, size); |
124 | } | |
45f1330a | 125 | |
7d97277b YL |
126 | void __init __acpi_unmap_table(char *map, unsigned long size) |
127 | { | |
128 | if (!map || !size) | |
129 | return; | |
1da177e4 | 130 | |
7d97277b | 131 | early_iounmap(map, size); |
1da177e4 | 132 | } |
1da177e4 | 133 | |
1da177e4 | 134 | #ifdef CONFIG_X86_LOCAL_APIC |
15a58ed1 | 135 | static int __init acpi_parse_madt(struct acpi_table_header *table) |
1da177e4 | 136 | { |
4be44fcd | 137 | struct acpi_table_madt *madt = NULL; |
1da177e4 | 138 | |
15a58ed1 | 139 | if (!cpu_has_apic) |
1da177e4 LT |
140 | return -EINVAL; |
141 | ||
15a58ed1 | 142 | madt = (struct acpi_table_madt *)table; |
1da177e4 LT |
143 | if (!madt) { |
144 | printk(KERN_WARNING PREFIX "Unable to map MADT\n"); | |
145 | return -ENODEV; | |
146 | } | |
147 | ||
ad363f80 AS |
148 | if (madt->address) { |
149 | acpi_lapic_addr = (u64) madt->address; | |
1da177e4 LT |
150 | |
151 | printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n", | |
ad363f80 | 152 | madt->address); |
1da177e4 LT |
153 | } |
154 | ||
306db03b IM |
155 | default_acpi_madt_oem_check(madt->header.oem_id, |
156 | madt->header.oem_table_id); | |
4be44fcd | 157 | |
1da177e4 LT |
158 | return 0; |
159 | } | |
160 | ||
7e1f85f9 JL |
161 | /** |
162 | * acpi_register_lapic - register a local apic and generates a logic cpu number | |
163 | * @id: local apic id to register | |
164 | * @enabled: this cpu is enabled or not | |
165 | * | |
166 | * Returns the logic cpu number which maps to the local apic | |
167 | */ | |
168 | static int acpi_register_lapic(int id, u8 enabled) | |
dfac2189 | 169 | { |
fb3bbd6a YL |
170 | unsigned int ver = 0; |
171 | ||
82982d72 | 172 | if (id >= MAX_LOCAL_APIC) { |
d3bd0588 | 173 | printk(KERN_INFO PREFIX "skipped apicid that is too big\n"); |
7e1f85f9 | 174 | return -EINVAL; |
d3bd0588 YL |
175 | } |
176 | ||
dfac2189 AS |
177 | if (!enabled) { |
178 | ++disabled_cpus; | |
7e1f85f9 | 179 | return -EINVAL; |
dfac2189 AS |
180 | } |
181 | ||
fb3bbd6a YL |
182 | if (boot_cpu_physical_apicid != -1U) |
183 | ver = apic_version[boot_cpu_physical_apicid]; | |
fb3bbd6a | 184 | |
7e1f85f9 | 185 | return generic_processor_info(id, ver); |
dfac2189 AS |
186 | } |
187 | ||
7237d3de SS |
188 | static int __init |
189 | acpi_parse_x2apic(struct acpi_subtable_header *header, const unsigned long end) | |
190 | { | |
191 | struct acpi_madt_local_x2apic *processor = NULL; | |
a35fd282 YL |
192 | int apic_id; |
193 | u8 enabled; | |
7237d3de SS |
194 | |
195 | processor = (struct acpi_madt_local_x2apic *)header; | |
196 | ||
197 | if (BAD_MADT_ENTRY(processor, end)) | |
198 | return -EINVAL; | |
199 | ||
200 | acpi_table_print_madt_entry(header); | |
201 | ||
a35fd282 YL |
202 | apic_id = processor->local_apic_id; |
203 | enabled = processor->lapic_flags & ACPI_MADT_ENABLED; | |
7237d3de SS |
204 | #ifdef CONFIG_X86_X2APIC |
205 | /* | |
206 | * We need to register disabled CPU as well to permit | |
207 | * counting disabled CPUs. This allows us to size | |
208 | * cpus_possible_map more accurately, to permit | |
209 | * to not preallocating memory for all NR_CPUS | |
210 | * when we use CPU hotplug. | |
211 | */ | |
b7157acf | 212 | if (!apic->apic_id_valid(apic_id) && enabled) |
a35fd282 YL |
213 | printk(KERN_WARNING PREFIX "x2apic entry ignored\n"); |
214 | else | |
215 | acpi_register_lapic(apic_id, enabled); | |
7237d3de SS |
216 | #else |
217 | printk(KERN_WARNING PREFIX "x2apic entry ignored\n"); | |
218 | #endif | |
219 | ||
220 | return 0; | |
221 | } | |
222 | ||
1da177e4 | 223 | static int __init |
5f3b1a8b | 224 | acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 225 | { |
5f3b1a8b | 226 | struct acpi_madt_local_apic *processor = NULL; |
1da177e4 | 227 | |
5f3b1a8b | 228 | processor = (struct acpi_madt_local_apic *)header; |
1da177e4 LT |
229 | |
230 | if (BAD_MADT_ENTRY(processor, end)) | |
231 | return -EINVAL; | |
232 | ||
233 | acpi_table_print_madt_entry(header); | |
234 | ||
7f66ae48 AR |
235 | /* |
236 | * We need to register disabled CPU as well to permit | |
237 | * counting disabled CPUs. This allows us to size | |
238 | * cpus_possible_map more accurately, to permit | |
239 | * to not preallocating memory for all NR_CPUS | |
240 | * when we use CPU hotplug. | |
241 | */ | |
dfac2189 AS |
242 | acpi_register_lapic(processor->id, /* APIC ID */ |
243 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
1da177e4 LT |
244 | |
245 | return 0; | |
246 | } | |
247 | ||
ac049c1d JS |
248 | static int __init |
249 | acpi_parse_sapic(struct acpi_subtable_header *header, const unsigned long end) | |
250 | { | |
251 | struct acpi_madt_local_sapic *processor = NULL; | |
252 | ||
253 | processor = (struct acpi_madt_local_sapic *)header; | |
254 | ||
255 | if (BAD_MADT_ENTRY(processor, end)) | |
256 | return -EINVAL; | |
257 | ||
258 | acpi_table_print_madt_entry(header); | |
259 | ||
dfac2189 AS |
260 | acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */ |
261 | processor->lapic_flags & ACPI_MADT_ENABLED); | |
ac049c1d JS |
262 | |
263 | return 0; | |
264 | } | |
265 | ||
1da177e4 | 266 | static int __init |
5f3b1a8b | 267 | acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header, |
4be44fcd | 268 | const unsigned long end) |
1da177e4 | 269 | { |
5f3b1a8b | 270 | struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL; |
1da177e4 | 271 | |
5f3b1a8b | 272 | lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header; |
1da177e4 LT |
273 | |
274 | if (BAD_MADT_ENTRY(lapic_addr_ovr, end)) | |
275 | return -EINVAL; | |
276 | ||
277 | acpi_lapic_addr = lapic_addr_ovr->address; | |
278 | ||
279 | return 0; | |
280 | } | |
281 | ||
7237d3de SS |
282 | static int __init |
283 | acpi_parse_x2apic_nmi(struct acpi_subtable_header *header, | |
284 | const unsigned long end) | |
285 | { | |
286 | struct acpi_madt_local_x2apic_nmi *x2apic_nmi = NULL; | |
287 | ||
288 | x2apic_nmi = (struct acpi_madt_local_x2apic_nmi *)header; | |
289 | ||
290 | if (BAD_MADT_ENTRY(x2apic_nmi, end)) | |
291 | return -EINVAL; | |
292 | ||
293 | acpi_table_print_madt_entry(header); | |
294 | ||
295 | if (x2apic_nmi->lint != 1) | |
296 | printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n"); | |
297 | ||
298 | return 0; | |
299 | } | |
300 | ||
1da177e4 | 301 | static int __init |
5f3b1a8b | 302 | acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 303 | { |
5f3b1a8b | 304 | struct acpi_madt_local_apic_nmi *lapic_nmi = NULL; |
1da177e4 | 305 | |
5f3b1a8b | 306 | lapic_nmi = (struct acpi_madt_local_apic_nmi *)header; |
1da177e4 LT |
307 | |
308 | if (BAD_MADT_ENTRY(lapic_nmi, end)) | |
309 | return -EINVAL; | |
310 | ||
311 | acpi_table_print_madt_entry(header); | |
312 | ||
313 | if (lapic_nmi->lint != 1) | |
314 | printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n"); | |
315 | ||
316 | return 0; | |
317 | } | |
318 | ||
4be44fcd | 319 | #endif /*CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 320 | |
8466361a | 321 | #ifdef CONFIG_X86_IO_APIC |
8d7cdcb9 JL |
322 | #define MP_ISA_BUS 0 |
323 | ||
324 | static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, | |
325 | u32 gsi) | |
326 | { | |
327 | int ioapic; | |
328 | int pin; | |
329 | struct mpc_intsrc mp_irq; | |
330 | ||
331 | /* | |
332 | * Convert 'gsi' to 'ioapic.pin'. | |
333 | */ | |
334 | ioapic = mp_find_ioapic(gsi); | |
335 | if (ioapic < 0) | |
336 | return; | |
337 | pin = mp_find_ioapic_pin(ioapic, gsi); | |
338 | ||
339 | /* | |
340 | * TBD: This check is for faulty timer entries, where the override | |
341 | * erroneously sets the trigger to level, resulting in a HUGE | |
342 | * increase of timer interrupts! | |
343 | */ | |
344 | if ((bus_irq == 0) && (trigger == 3)) | |
345 | trigger = 1; | |
346 | ||
347 | mp_irq.type = MP_INTSRC; | |
348 | mp_irq.irqtype = mp_INT; | |
349 | mp_irq.irqflag = (trigger << 2) | polarity; | |
350 | mp_irq.srcbus = MP_ISA_BUS; | |
351 | mp_irq.srcbusirq = bus_irq; /* IRQ */ | |
352 | mp_irq.dstapic = mpc_ioapic_id(ioapic); /* APIC ID */ | |
353 | mp_irq.dstirq = pin; /* INTIN# */ | |
354 | ||
355 | mp_save_irq(&mp_irq); | |
356 | ||
2e0ad0e2 JL |
357 | /* |
358 | * Reset default identity mapping if gsi is also an legacy IRQ, | |
359 | * otherwise there will be more than one entry with the same GSI | |
360 | * and acpi_isa_irq_to_gsi() may give wrong result. | |
361 | */ | |
95d76acc | 362 | if (gsi < nr_legacy_irqs() && isa_irq_to_gsi[gsi] == gsi) |
2e0ad0e2 | 363 | isa_irq_to_gsi[gsi] = ACPI_INVALID_GSI; |
8d7cdcb9 JL |
364 | isa_irq_to_gsi[bus_irq] = gsi; |
365 | } | |
366 | ||
367 | static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger, | |
368 | int polarity) | |
369 | { | |
370 | #ifdef CONFIG_X86_MPPARSE | |
371 | struct mpc_intsrc mp_irq; | |
372 | struct pci_dev *pdev; | |
373 | unsigned char number; | |
374 | unsigned int devfn; | |
375 | int ioapic; | |
376 | u8 pin; | |
377 | ||
378 | if (!acpi_ioapic) | |
379 | return 0; | |
380 | if (!dev || !dev_is_pci(dev)) | |
381 | return 0; | |
382 | ||
383 | pdev = to_pci_dev(dev); | |
384 | number = pdev->bus->number; | |
385 | devfn = pdev->devfn; | |
386 | pin = pdev->pin; | |
387 | /* print the entry should happen on mptable identically */ | |
388 | mp_irq.type = MP_INTSRC; | |
389 | mp_irq.irqtype = mp_INT; | |
390 | mp_irq.irqflag = (trigger == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | | |
391 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); | |
392 | mp_irq.srcbus = number; | |
393 | mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); | |
394 | ioapic = mp_find_ioapic(gsi); | |
395 | mp_irq.dstapic = mpc_ioapic_id(ioapic); | |
396 | mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); | |
397 | ||
398 | mp_save_irq(&mp_irq); | |
399 | #endif | |
400 | return 0; | |
401 | } | |
402 | ||
a491cc90 | 403 | static int mp_register_gsi(struct device *dev, u32 gsi, int trigger, |
8d7cdcb9 JL |
404 | int polarity) |
405 | { | |
d7b83001 | 406 | int irq, node; |
8d7cdcb9 JL |
407 | |
408 | if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) | |
409 | return gsi; | |
410 | ||
d7b83001 JL |
411 | trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1; |
412 | polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1; | |
413 | node = dev ? dev_to_node(dev) : NUMA_NO_NODE; | |
414 | if (mp_set_gsi_attr(gsi, trigger, polarity, node)) { | |
415 | pr_warn("Failed to set pin attr for GSI%d\n", gsi); | |
416 | return -1; | |
417 | } | |
418 | ||
16ee7b3d | 419 | irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC); |
6b9fb708 | 420 | if (irq < 0) |
84245af7 | 421 | return irq; |
6b9fb708 | 422 | |
cd68f6bd JL |
423 | /* Don't set up the ACPI SCI because it's already set up */ |
424 | if (enable_update_mptable && acpi_gbl_FADT.sci_interrupt != gsi) | |
8d7cdcb9 JL |
425 | mp_config_acpi_gsi(dev, gsi, trigger, polarity); |
426 | ||
84245af7 | 427 | return irq; |
8d7cdcb9 JL |
428 | } |
429 | ||
6a38fa0e JL |
430 | static void mp_unregister_gsi(u32 gsi) |
431 | { | |
432 | int irq; | |
433 | ||
434 | if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) | |
435 | return; | |
436 | ||
6a38fa0e JL |
437 | irq = mp_map_gsi_to_irq(gsi, 0); |
438 | if (irq > 0) | |
439 | mp_unmap_irq(irq); | |
440 | } | |
441 | ||
d7b83001 JL |
442 | static struct irq_domain_ops acpi_irqdomain_ops = { |
443 | .map = mp_irqdomain_map, | |
6a38fa0e | 444 | .unmap = mp_irqdomain_unmap, |
d7b83001 | 445 | }; |
1da177e4 LT |
446 | |
447 | static int __init | |
5f3b1a8b | 448 | acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 449 | { |
5f3b1a8b | 450 | struct acpi_madt_io_apic *ioapic = NULL; |
ca7e28aa JL |
451 | struct ioapic_domain_cfg cfg = { |
452 | .type = IOAPIC_DOMAIN_DYNAMIC, | |
453 | .ops = &acpi_irqdomain_ops, | |
454 | }; | |
1da177e4 | 455 | |
5f3b1a8b | 456 | ioapic = (struct acpi_madt_io_apic *)header; |
1da177e4 LT |
457 | |
458 | if (BAD_MADT_ENTRY(ioapic, end)) | |
459 | return -EINVAL; | |
4be44fcd | 460 | |
1da177e4 LT |
461 | acpi_table_print_madt_entry(header); |
462 | ||
ca7e28aa JL |
463 | /* Statically assign IRQ numbers for IOAPICs hosting legacy IRQs */ |
464 | if (ioapic->global_irq_base < nr_legacy_irqs()) | |
465 | cfg.type = IOAPIC_DOMAIN_LEGACY; | |
466 | ||
467 | mp_register_ioapic(ioapic->id, ioapic->address, ioapic->global_irq_base, | |
468 | &cfg); | |
4be44fcd | 469 | |
1da177e4 LT |
470 | return 0; |
471 | } | |
472 | ||
473 | /* | |
474 | * Parse Interrupt Source Override for the ACPI SCI | |
475 | */ | |
9d2062b8 | 476 | static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger, u32 gsi) |
1da177e4 LT |
477 | { |
478 | if (trigger == 0) /* compatible SCI trigger is level */ | |
479 | trigger = 3; | |
480 | ||
481 | if (polarity == 0) /* compatible SCI polarity is low */ | |
482 | polarity = 3; | |
483 | ||
484 | /* Command-line over-ride via acpi_sci= */ | |
5f3b1a8b AS |
485 | if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) |
486 | trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2; | |
1da177e4 | 487 | |
5f3b1a8b AS |
488 | if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK) |
489 | polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK; | |
1da177e4 | 490 | |
9d2062b8 | 491 | mp_override_legacy_irq(bus_irq, polarity, trigger, gsi); |
1da177e4 LT |
492 | |
493 | /* | |
494 | * stash over-ride to indicate we've been here | |
cee324b1 | 495 | * and for later update of acpi_gbl_FADT |
1da177e4 | 496 | */ |
7bdd21ce | 497 | acpi_sci_override_gsi = gsi; |
1da177e4 LT |
498 | return; |
499 | } | |
500 | ||
501 | static int __init | |
5f3b1a8b | 502 | acpi_parse_int_src_ovr(struct acpi_subtable_header * header, |
4be44fcd | 503 | const unsigned long end) |
1da177e4 | 504 | { |
5f3b1a8b | 505 | struct acpi_madt_interrupt_override *intsrc = NULL; |
1da177e4 | 506 | |
5f3b1a8b | 507 | intsrc = (struct acpi_madt_interrupt_override *)header; |
1da177e4 LT |
508 | |
509 | if (BAD_MADT_ENTRY(intsrc, end)) | |
510 | return -EINVAL; | |
511 | ||
512 | acpi_table_print_madt_entry(header); | |
513 | ||
5f3b1a8b | 514 | if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) { |
9d2062b8 | 515 | acpi_sci_ioapic_setup(intsrc->source_irq, |
5f3b1a8b | 516 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, |
9d2062b8 EB |
517 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, |
518 | intsrc->global_irq); | |
1da177e4 LT |
519 | return 0; |
520 | } | |
521 | ||
ae10ccdc | 522 | if (intsrc->source_irq == 0) { |
7f74f8f2 | 523 | if (acpi_skip_timer_override) { |
ae10ccdc | 524 | printk(PREFIX "BIOS IRQ0 override ignored.\n"); |
7f74f8f2 AH |
525 | return 0; |
526 | } | |
ae10ccdc FT |
527 | |
528 | if ((intsrc->global_irq == 2) && acpi_fix_pin2_polarity | |
529 | && (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) { | |
7f74f8f2 AH |
530 | intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK; |
531 | printk(PREFIX "BIOS IRQ0 pin2 override: forcing polarity to high active.\n"); | |
532 | } | |
1da177e4 LT |
533 | } |
534 | ||
5f3b1a8b AS |
535 | mp_override_legacy_irq(intsrc->source_irq, |
536 | intsrc->inti_flags & ACPI_MADT_POLARITY_MASK, | |
537 | (intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2, | |
538 | intsrc->global_irq); | |
1da177e4 LT |
539 | |
540 | return 0; | |
541 | } | |
542 | ||
1da177e4 | 543 | static int __init |
5f3b1a8b | 544 | acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end) |
1da177e4 | 545 | { |
5f3b1a8b | 546 | struct acpi_madt_nmi_source *nmi_src = NULL; |
1da177e4 | 547 | |
5f3b1a8b | 548 | nmi_src = (struct acpi_madt_nmi_source *)header; |
1da177e4 LT |
549 | |
550 | if (BAD_MADT_ENTRY(nmi_src, end)) | |
551 | return -EINVAL; | |
552 | ||
553 | acpi_table_print_madt_entry(header); | |
554 | ||
555 | /* TBD: Support nimsrc entries? */ | |
556 | ||
557 | return 0; | |
558 | } | |
559 | ||
4be44fcd | 560 | #endif /* CONFIG_X86_IO_APIC */ |
1da177e4 | 561 | |
1da177e4 LT |
562 | /* |
563 | * acpi_pic_sci_set_trigger() | |
5f3b1a8b | 564 | * |
1da177e4 LT |
565 | * use ELCR to set PIC-mode trigger type for SCI |
566 | * | |
567 | * If a PIC-mode SCI is not recognized or gives spurious IRQ7's | |
568 | * it may require Edge Trigger -- use "acpi_sci=edge" | |
569 | * | |
570 | * Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers | |
571 | * for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge. | |
27b46d76 SA |
572 | * ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0) |
573 | * ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0) | |
1da177e4 LT |
574 | */ |
575 | ||
4be44fcd | 576 | void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger) |
1da177e4 LT |
577 | { |
578 | unsigned int mask = 1 << irq; | |
579 | unsigned int old, new; | |
580 | ||
581 | /* Real old ELCR mask */ | |
582 | old = inb(0x4d0) | (inb(0x4d1) << 8); | |
583 | ||
584 | /* | |
27b46d76 | 585 | * If we use ACPI to set PCI IRQs, then we should clear ELCR |
1da177e4 LT |
586 | * since we will set it correctly as we enable the PCI irq |
587 | * routing. | |
588 | */ | |
589 | new = acpi_noirq ? old : 0; | |
590 | ||
591 | /* | |
592 | * Update SCI information in the ELCR, it isn't in the PCI | |
593 | * routing tables.. | |
594 | */ | |
595 | switch (trigger) { | |
4be44fcd | 596 | case 1: /* Edge - clear */ |
1da177e4 LT |
597 | new &= ~mask; |
598 | break; | |
4be44fcd | 599 | case 3: /* Level - set */ |
1da177e4 LT |
600 | new |= mask; |
601 | break; | |
602 | } | |
603 | ||
604 | if (old == new) | |
605 | return; | |
606 | ||
607 | printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old); | |
608 | outb(new, 0x4d0); | |
609 | outb(new >> 8, 0x4d1); | |
610 | } | |
611 | ||
6b9fb708 | 612 | int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp) |
1da177e4 | 613 | { |
961b6a70 | 614 | int irq; |
18dce6ba | 615 | |
961b6a70 JL |
616 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) { |
617 | *irqp = gsi; | |
618 | } else { | |
5da2fd26 | 619 | mutex_lock(&acpi_ioapic_lock); |
961b6a70 JL |
620 | irq = mp_map_gsi_to_irq(gsi, |
621 | IOAPIC_MAP_ALLOC | IOAPIC_MAP_CHECK); | |
5da2fd26 | 622 | mutex_unlock(&acpi_ioapic_lock); |
961b6a70 JL |
623 | if (irq < 0) |
624 | return -1; | |
6b9fb708 | 625 | *irqp = irq; |
6b9fb708 | 626 | } |
961b6a70 | 627 | return 0; |
1da177e4 | 628 | } |
81e88fdc | 629 | EXPORT_SYMBOL_GPL(acpi_gsi_to_irq); |
1da177e4 | 630 | |
2c2df841 EB |
631 | int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi) |
632 | { | |
95d76acc | 633 | if (isa_irq < nr_legacy_irqs() && |
2e0ad0e2 | 634 | isa_irq_to_gsi[isa_irq] != ACPI_INVALID_GSI) { |
032329ee JL |
635 | *gsi = isa_irq_to_gsi[isa_irq]; |
636 | return 0; | |
637 | } | |
638 | ||
639 | return -1; | |
2c2df841 EB |
640 | } |
641 | ||
2f065aef JF |
642 | static int acpi_register_gsi_pic(struct device *dev, u32 gsi, |
643 | int trigger, int polarity) | |
1da177e4 | 644 | { |
1da177e4 LT |
645 | #ifdef CONFIG_PCI |
646 | /* | |
647 | * Make sure all (legacy) PCI IRQs are set as level-triggered. | |
648 | */ | |
2f065aef JF |
649 | if (trigger == ACPI_LEVEL_SENSITIVE) |
650 | eisa_set_level_irq(gsi); | |
1da177e4 LT |
651 | #endif |
652 | ||
2f065aef JF |
653 | return gsi; |
654 | } | |
655 | ||
656 | static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, | |
657 | int trigger, int polarity) | |
658 | { | |
84245af7 JL |
659 | int irq = gsi; |
660 | ||
1da177e4 | 661 | #ifdef CONFIG_X86_IO_APIC |
5da2fd26 | 662 | mutex_lock(&acpi_ioapic_lock); |
84245af7 | 663 | irq = mp_register_gsi(dev, gsi, trigger, polarity); |
5da2fd26 | 664 | mutex_unlock(&acpi_ioapic_lock); |
1da177e4 | 665 | #endif |
2f065aef | 666 | |
84245af7 | 667 | return irq; |
2f065aef JF |
668 | } |
669 | ||
6a38fa0e JL |
670 | static void acpi_unregister_gsi_ioapic(u32 gsi) |
671 | { | |
672 | #ifdef CONFIG_X86_IO_APIC | |
5da2fd26 | 673 | mutex_lock(&acpi_ioapic_lock); |
6a38fa0e | 674 | mp_unregister_gsi(gsi); |
5da2fd26 | 675 | mutex_unlock(&acpi_ioapic_lock); |
6a38fa0e | 676 | #endif |
2f065aef JF |
677 | } |
678 | ||
90f6881e JF |
679 | int (*__acpi_register_gsi)(struct device *dev, u32 gsi, |
680 | int trigger, int polarity) = acpi_register_gsi_pic; | |
6a38fa0e | 681 | void (*__acpi_unregister_gsi)(u32 gsi) = NULL; |
2f065aef | 682 | |
d6a77ead KRW |
683 | #ifdef CONFIG_ACPI_SLEEP |
684 | int (*acpi_suspend_lowlevel)(void) = x86_acpi_suspend_lowlevel; | |
685 | #else | |
686 | int (*acpi_suspend_lowlevel)(void); | |
687 | #endif | |
688 | ||
2f065aef JF |
689 | /* |
690 | * success: return IRQ number (>=0) | |
691 | * failure: return < 0 | |
692 | */ | |
693 | int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) | |
694 | { | |
84245af7 | 695 | return __acpi_register_gsi(dev, gsi, trigger, polarity); |
1da177e4 | 696 | } |
35e92b78 AS |
697 | EXPORT_SYMBOL_GPL(acpi_register_gsi); |
698 | ||
699 | void acpi_unregister_gsi(u32 gsi) | |
700 | { | |
6a38fa0e JL |
701 | if (__acpi_unregister_gsi) |
702 | __acpi_unregister_gsi(gsi); | |
35e92b78 AS |
703 | } |
704 | EXPORT_SYMBOL_GPL(acpi_unregister_gsi); | |
4be44fcd | 705 | |
9f50c6ea | 706 | #ifdef CONFIG_X86_LOCAL_APIC |
e819813f | 707 | static void __init acpi_set_irq_model_ioapic(void) |
2f065aef JF |
708 | { |
709 | acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC; | |
710 | __acpi_register_gsi = acpi_register_gsi_ioapic; | |
6a38fa0e | 711 | __acpi_unregister_gsi = acpi_unregister_gsi_ioapic; |
2f065aef JF |
712 | acpi_ioapic = 1; |
713 | } | |
9f50c6ea | 714 | #endif |
2f065aef | 715 | |
1da177e4 LT |
716 | /* |
717 | * ACPI based hotplug support for CPU | |
718 | */ | |
719 | #ifdef CONFIG_ACPI_HOTPLUG_CPU | |
d8191fa4 | 720 | #include <acpi/processor.h> |
009cbadb | 721 | |
148f9bb8 | 722 | static void acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) |
0271f910 HL |
723 | { |
724 | #ifdef CONFIG_ACPI_NUMA | |
725 | int nid; | |
726 | ||
727 | nid = acpi_get_node(handle); | |
896dc506 JL |
728 | if (nid != -1) { |
729 | set_apicid_to_node(physid, nid); | |
730 | numa_set_node(cpu, nid); | |
731 | } | |
0271f910 HL |
732 | #endif |
733 | } | |
009cbadb | 734 | |
d536bf3d | 735 | static int _acpi_map_lsapic(acpi_handle handle, int physid, int *pcpu) |
1da177e4 | 736 | { |
73fea175 | 737 | int cpu; |
ee943a82 | 738 | |
7e1f85f9 JL |
739 | cpu = acpi_register_lapic(physid, ACPI_MADT_ENABLED); |
740 | if (cpu < 0) { | |
741 | pr_info(PREFIX "Unable to map lapic to logical cpu number\n"); | |
742 | return cpu; | |
73fea175 AR |
743 | } |
744 | ||
d8191fa4 | 745 | acpi_processor_set_pdc(handle); |
0271f910 | 746 | acpi_map_cpu2node(handle, cpu, physid); |
73fea175 AR |
747 | |
748 | *pcpu = cpu; | |
7e1f85f9 | 749 | return 0; |
1da177e4 | 750 | } |
1da177e4 | 751 | |
009cbadb | 752 | /* wrapper to silence section mismatch warning */ |
d02dc27d | 753 | int __ref acpi_map_cpu(acpi_handle handle, int physid, int *pcpu) |
009cbadb | 754 | { |
d536bf3d | 755 | return _acpi_map_lsapic(handle, physid, pcpu); |
009cbadb | 756 | } |
d02dc27d | 757 | EXPORT_SYMBOL(acpi_map_cpu); |
1da177e4 | 758 | |
d02dc27d | 759 | int acpi_unmap_cpu(int cpu) |
1da177e4 | 760 | { |
c4c60524 WC |
761 | #ifdef CONFIG_ACPI_NUMA |
762 | set_apicid_to_node(per_cpu(x86_cpu_to_apicid, cpu), NUMA_NO_NODE); | |
763 | #endif | |
764 | ||
71fff5e6 | 765 | per_cpu(x86_cpu_to_apicid, cpu) = -1; |
9628937d | 766 | set_cpu_present(cpu, false); |
73fea175 AR |
767 | num_processors--; |
768 | ||
769 | return (0); | |
1da177e4 | 770 | } |
d02dc27d | 771 | EXPORT_SYMBOL(acpi_unmap_cpu); |
4be44fcd | 772 | #endif /* CONFIG_ACPI_HOTPLUG_CPU */ |
1da177e4 | 773 | |
4be44fcd | 774 | int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base) |
b1bb248a | 775 | { |
7db298cb JL |
776 | int ret = -ENOSYS; |
777 | #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC | |
778 | int ioapic_id; | |
779 | u64 addr; | |
780 | struct ioapic_domain_cfg cfg = { | |
781 | .type = IOAPIC_DOMAIN_DYNAMIC, | |
782 | .ops = &acpi_irqdomain_ops, | |
783 | }; | |
784 | ||
785 | ioapic_id = acpi_get_ioapic_id(handle, gsi_base, &addr); | |
786 | if (ioapic_id < 0) { | |
787 | unsigned long long uid; | |
788 | acpi_status status; | |
789 | ||
790 | status = acpi_evaluate_integer(handle, METHOD_NAME__UID, | |
791 | NULL, &uid); | |
792 | if (ACPI_FAILURE(status)) { | |
793 | acpi_handle_warn(handle, "failed to get IOAPIC ID.\n"); | |
794 | return -EINVAL; | |
795 | } | |
796 | ioapic_id = (int)uid; | |
797 | } | |
798 | ||
799 | mutex_lock(&acpi_ioapic_lock); | |
800 | ret = mp_register_ioapic(ioapic_id, phys_addr, gsi_base, &cfg); | |
801 | mutex_unlock(&acpi_ioapic_lock); | |
802 | #endif | |
803 | ||
804 | return ret; | |
b1bb248a KK |
805 | } |
806 | EXPORT_SYMBOL(acpi_register_ioapic); | |
807 | ||
4be44fcd | 808 | int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base) |
b1bb248a | 809 | { |
15516a3b JL |
810 | int ret = -ENOSYS; |
811 | ||
812 | #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC | |
813 | mutex_lock(&acpi_ioapic_lock); | |
814 | ret = mp_unregister_ioapic(gsi_base); | |
815 | mutex_unlock(&acpi_ioapic_lock); | |
816 | #endif | |
4be44fcd | 817 | |
15516a3b JL |
818 | return ret; |
819 | } | |
b1bb248a KK |
820 | EXPORT_SYMBOL(acpi_unregister_ioapic); |
821 | ||
e89900c9 JL |
822 | /** |
823 | * acpi_ioapic_registered - Check whether IOAPIC assoicatied with @gsi_base | |
824 | * has been registered | |
825 | * @handle: ACPI handle of the IOAPIC deivce | |
826 | * @gsi_base: GSI base associated with the IOAPIC | |
827 | * | |
828 | * Assume caller holds some type of lock to serialize acpi_ioapic_registered() | |
829 | * with acpi_register_ioapic()/acpi_unregister_ioapic(). | |
830 | */ | |
831 | int acpi_ioapic_registered(acpi_handle handle, u32 gsi_base) | |
832 | { | |
833 | int ret = 0; | |
834 | ||
835 | #ifdef CONFIG_ACPI_HOTPLUG_IOAPIC | |
836 | mutex_lock(&acpi_ioapic_lock); | |
837 | ret = mp_ioapic_registered(gsi_base); | |
838 | mutex_unlock(&acpi_ioapic_lock); | |
839 | #endif | |
840 | ||
841 | return ret; | |
842 | } | |
843 | ||
5f3b1a8b | 844 | static int __init acpi_parse_sbf(struct acpi_table_header *table) |
1da177e4 | 845 | { |
5f3b1a8b | 846 | struct acpi_table_boot *sb; |
1da177e4 | 847 | |
5f3b1a8b | 848 | sb = (struct acpi_table_boot *)table; |
1da177e4 LT |
849 | if (!sb) { |
850 | printk(KERN_WARNING PREFIX "Unable to map SBF\n"); | |
851 | return -ENODEV; | |
852 | } | |
853 | ||
5f3b1a8b | 854 | sbf_port = sb->cmos_index; /* Save CMOS port */ |
1da177e4 LT |
855 | |
856 | return 0; | |
857 | } | |
858 | ||
1da177e4 | 859 | #ifdef CONFIG_HPET_TIMER |
2d0c87c3 | 860 | #include <asm/hpet.h> |
1da177e4 | 861 | |
dd96dc32 | 862 | static struct resource *hpet_res __initdata; |
a1dfd851 | 863 | |
5f3b1a8b | 864 | static int __init acpi_parse_hpet(struct acpi_table_header *table) |
1da177e4 LT |
865 | { |
866 | struct acpi_table_hpet *hpet_tbl; | |
867 | ||
5f3b1a8b | 868 | hpet_tbl = (struct acpi_table_hpet *)table; |
1da177e4 LT |
869 | if (!hpet_tbl) { |
870 | printk(KERN_WARNING PREFIX "Unable to map HPET\n"); | |
871 | return -ENODEV; | |
872 | } | |
873 | ||
ad363f80 | 874 | if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) { |
1da177e4 LT |
875 | printk(KERN_WARNING PREFIX "HPET timers must be located in " |
876 | "memory.\n"); | |
877 | return -1; | |
878 | } | |
f0f4c343 | 879 | |
2d0c87c3 | 880 | hpet_address = hpet_tbl->address.address; |
c8bc6f3c | 881 | hpet_blockid = hpet_tbl->sequence; |
f4df73c2 TG |
882 | |
883 | /* | |
884 | * Some broken BIOSes advertise HPET at 0x0. We really do not | |
885 | * want to allocate a resource there. | |
886 | */ | |
887 | if (!hpet_address) { | |
888 | printk(KERN_WARNING PREFIX | |
889 | "HPET id: %#x base: %#lx is invalid\n", | |
890 | hpet_tbl->id, hpet_address); | |
891 | return 0; | |
892 | } | |
893 | #ifdef CONFIG_X86_64 | |
894 | /* | |
895 | * Some even more broken BIOSes advertise HPET at | |
896 | * 0xfed0000000000000 instead of 0xfed00000. Fix it up and add | |
897 | * some noise: | |
898 | */ | |
899 | if (hpet_address == 0xfed0000000000000UL) { | |
900 | if (!hpet_force_user) { | |
901 | printk(KERN_WARNING PREFIX "HPET id: %#x " | |
902 | "base: 0xfed0000000000000 is bogus\n " | |
903 | "try hpet=force on the kernel command line to " | |
904 | "fix it up to 0xfed00000.\n", hpet_tbl->id); | |
905 | hpet_address = 0; | |
906 | return 0; | |
907 | } | |
908 | printk(KERN_WARNING PREFIX | |
909 | "HPET id: %#x base: 0xfed0000000000000 fixed up " | |
910 | "to 0xfed00000.\n", hpet_tbl->id); | |
911 | hpet_address >>= 32; | |
912 | } | |
913 | #endif | |
4be44fcd | 914 | printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n", |
2d0c87c3 | 915 | hpet_tbl->id, hpet_address); |
1da177e4 | 916 | |
a1dfd851 AD |
917 | /* |
918 | * Allocate and initialize the HPET firmware resource for adding into | |
919 | * the resource tree during the lateinit timeframe. | |
920 | */ | |
921 | #define HPET_RESOURCE_NAME_SIZE 9 | |
922 | hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE); | |
923 | ||
a1dfd851 AD |
924 | hpet_res->name = (void *)&hpet_res[1]; |
925 | hpet_res->flags = IORESOURCE_MEM; | |
926 | snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u", | |
927 | hpet_tbl->sequence); | |
928 | ||
929 | hpet_res->start = hpet_address; | |
930 | hpet_res->end = hpet_address + (1 * 1024) - 1; | |
931 | ||
1da177e4 LT |
932 | return 0; |
933 | } | |
a1dfd851 AD |
934 | |
935 | /* | |
936 | * hpet_insert_resource inserts the HPET resources used into the resource | |
937 | * tree. | |
938 | */ | |
939 | static __init int hpet_insert_resource(void) | |
940 | { | |
941 | if (!hpet_res) | |
942 | return 1; | |
943 | ||
944 | return insert_resource(&iomem_resource, hpet_res); | |
945 | } | |
946 | ||
947 | late_initcall(hpet_insert_resource); | |
948 | ||
1da177e4 LT |
949 | #else |
950 | #define acpi_parse_hpet NULL | |
951 | #endif | |
952 | ||
5f3b1a8b | 953 | static int __init acpi_parse_fadt(struct acpi_table_header *table) |
1da177e4 | 954 | { |
90660ec3 | 955 | |
1da177e4 LT |
956 | #ifdef CONFIG_X86_PM_TIMER |
957 | /* detect the location of the ACPI PM Timer */ | |
5f3b1a8b | 958 | if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) { |
1da177e4 | 959 | /* FADT rev. 2 */ |
5f3b1a8b | 960 | if (acpi_gbl_FADT.xpm_timer_block.space_id != |
4be44fcd | 961 | ACPI_ADR_SPACE_SYSTEM_IO) |
1da177e4 LT |
962 | return 0; |
963 | ||
5f3b1a8b | 964 | pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address; |
e6e87b4b DSL |
965 | /* |
966 | * "X" fields are optional extensions to the original V1.0 | |
967 | * fields, so we must selectively expand V1.0 fields if the | |
968 | * corresponding X field is zero. | |
969 | */ | |
970 | if (!pmtmr_ioport) | |
5f3b1a8b | 971 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
972 | } else { |
973 | /* FADT rev. 1 */ | |
5f3b1a8b | 974 | pmtmr_ioport = acpi_gbl_FADT.pm_timer_block; |
1da177e4 LT |
975 | } |
976 | if (pmtmr_ioport) | |
4be44fcd LB |
977 | printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n", |
978 | pmtmr_ioport); | |
1da177e4 LT |
979 | #endif |
980 | return 0; | |
981 | } | |
982 | ||
1da177e4 LT |
983 | #ifdef CONFIG_X86_LOCAL_APIC |
984 | /* | |
985 | * Parse LAPIC entries in MADT | |
986 | * returns 0 on success, < 0 on error | |
987 | */ | |
31d2092e | 988 | |
cbf9bd60 YL |
989 | static int __init early_acpi_parse_madt_lapic_addr_ovr(void) |
990 | { | |
991 | int count; | |
992 | ||
993 | if (!cpu_has_apic) | |
994 | return -ENODEV; | |
995 | ||
996 | /* | |
997 | * Note that the LAPIC address is obtained from the MADT (32-bit value) | |
998 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
999 | */ | |
1000 | ||
e819813f JL |
1001 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, |
1002 | acpi_parse_lapic_addr_ovr, 0); | |
cbf9bd60 YL |
1003 | if (count < 0) { |
1004 | printk(KERN_ERR PREFIX | |
1005 | "Error parsing LAPIC address override entry\n"); | |
1006 | return count; | |
1007 | } | |
1008 | ||
c0104d38 | 1009 | register_lapic_address(acpi_lapic_addr); |
cbf9bd60 YL |
1010 | |
1011 | return count; | |
1012 | } | |
1013 | ||
4be44fcd | 1014 | static int __init acpi_parse_madt_lapic_entries(void) |
1da177e4 LT |
1015 | { |
1016 | int count; | |
7237d3de | 1017 | int x2count = 0; |
1da177e4 | 1018 | |
0fcd2709 AK |
1019 | if (!cpu_has_apic) |
1020 | return -ENODEV; | |
1021 | ||
5f3b1a8b | 1022 | /* |
1da177e4 LT |
1023 | * Note that the LAPIC address is obtained from the MADT (32-bit value) |
1024 | * and (optionally) overriden by a LAPIC_ADDR_OVR entry (64-bit value). | |
1025 | */ | |
1026 | ||
e819813f JL |
1027 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE, |
1028 | acpi_parse_lapic_addr_ovr, 0); | |
1da177e4 | 1029 | if (count < 0) { |
4be44fcd LB |
1030 | printk(KERN_ERR PREFIX |
1031 | "Error parsing LAPIC address override entry\n"); | |
1da177e4 LT |
1032 | return count; |
1033 | } | |
1034 | ||
c0104d38 | 1035 | register_lapic_address(acpi_lapic_addr); |
1da177e4 | 1036 | |
ac049c1d | 1037 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC, |
cb2ded37 | 1038 | acpi_parse_sapic, MAX_LOCAL_APIC); |
ac049c1d | 1039 | |
7237d3de SS |
1040 | if (!count) { |
1041 | x2count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_X2APIC, | |
cb2ded37 | 1042 | acpi_parse_x2apic, MAX_LOCAL_APIC); |
ac049c1d | 1043 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC, |
cb2ded37 | 1044 | acpi_parse_lapic, MAX_LOCAL_APIC); |
7237d3de SS |
1045 | } |
1046 | if (!count && !x2count) { | |
1da177e4 LT |
1047 | printk(KERN_ERR PREFIX "No LAPIC entries present\n"); |
1048 | /* TBD: Cleanup to allow fallback to MPS */ | |
1049 | return -ENODEV; | |
7237d3de | 1050 | } else if (count < 0 || x2count < 0) { |
1da177e4 LT |
1051 | printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n"); |
1052 | /* TBD: Cleanup to allow fallback to MPS */ | |
1053 | return count; | |
1054 | } | |
1055 | ||
e819813f JL |
1056 | x2count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_X2APIC_NMI, |
1057 | acpi_parse_x2apic_nmi, 0); | |
1058 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI, | |
1059 | acpi_parse_lapic_nmi, 0); | |
7237d3de | 1060 | if (count < 0 || x2count < 0) { |
1da177e4 LT |
1061 | printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n"); |
1062 | /* TBD: Cleanup to allow fallback to MPS */ | |
1063 | return count; | |
1064 | } | |
1065 | return 0; | |
1066 | } | |
4be44fcd | 1067 | #endif /* CONFIG_X86_LOCAL_APIC */ |
1da177e4 | 1068 | |
8466361a | 1069 | #ifdef CONFIG_X86_IO_APIC |
a491cc90 | 1070 | static void __init mp_config_acpi_legacy_irqs(void) |
11113f84 | 1071 | { |
6df8809b | 1072 | int i; |
c2c21745 | 1073 | struct mpc_intsrc mp_irq; |
11113f84 | 1074 | |
bb8187d3 | 1075 | #ifdef CONFIG_EISA |
11113f84 AS |
1076 | /* |
1077 | * Fabricate the legacy ISA bus (bus #31). | |
1078 | */ | |
1079 | mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA; | |
1080 | #endif | |
1081 | set_bit(MP_ISA_BUS, mp_bus_not_pci); | |
cfc1b9a6 | 1082 | pr_debug("Bus #%d is ISA\n", MP_ISA_BUS); |
11113f84 | 1083 | |
11113f84 AS |
1084 | /* |
1085 | * Use the default configuration for the IRQs 0-15. Unless | |
1086 | * overridden by (MADT) interrupt source override entries. | |
1087 | */ | |
95d76acc | 1088 | for (i = 0; i < nr_legacy_irqs(); i++) { |
0fd52670 EB |
1089 | int ioapic, pin; |
1090 | unsigned int dstapic; | |
11113f84 | 1091 | int idx; |
0fd52670 EB |
1092 | u32 gsi; |
1093 | ||
1094 | /* Locate the gsi that irq i maps to. */ | |
1095 | if (acpi_isa_irq_to_gsi(i, &gsi)) | |
1096 | continue; | |
1097 | ||
1098 | /* | |
1099 | * Locate the IOAPIC that manages the ISA IRQ. | |
1100 | */ | |
1101 | ioapic = mp_find_ioapic(gsi); | |
1102 | if (ioapic < 0) | |
1103 | continue; | |
1104 | pin = mp_find_ioapic_pin(ioapic, gsi); | |
d5371430 | 1105 | dstapic = mpc_ioapic_id(ioapic); |
11113f84 AS |
1106 | |
1107 | for (idx = 0; idx < mp_irq_entries; idx++) { | |
c2c21745 | 1108 | struct mpc_intsrc *irq = mp_irqs + idx; |
11113f84 AS |
1109 | |
1110 | /* Do we already have a mapping for this ISA IRQ? */ | |
c2c21745 | 1111 | if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i) |
11113f84 AS |
1112 | break; |
1113 | ||
1114 | /* Do we already have a mapping for this IOAPIC pin */ | |
0fd52670 | 1115 | if (irq->dstapic == dstapic && irq->dstirq == pin) |
11113f84 AS |
1116 | break; |
1117 | } | |
1118 | ||
1119 | if (idx != mp_irq_entries) { | |
1120 | printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i); | |
1121 | continue; /* IRQ already used */ | |
1122 | } | |
1123 | ||
c2c21745 JSR |
1124 | mp_irq.type = MP_INTSRC; |
1125 | mp_irq.irqflag = 0; /* Conforming */ | |
1126 | mp_irq.srcbus = MP_ISA_BUS; | |
1127 | mp_irq.dstapic = dstapic; | |
1128 | mp_irq.irqtype = mp_INT; | |
1129 | mp_irq.srcbusirq = i; /* Identity mapped */ | |
0fd52670 | 1130 | mp_irq.dstirq = pin; |
11113f84 | 1131 | |
2d8009ba | 1132 | mp_save_irq(&mp_irq); |
11113f84 AS |
1133 | } |
1134 | } | |
1135 | ||
1da177e4 LT |
1136 | /* |
1137 | * Parse IOAPIC related entries in MADT | |
1138 | * returns 0 on success, < 0 on error | |
1139 | */ | |
4be44fcd | 1140 | static int __init acpi_parse_madt_ioapic_entries(void) |
1da177e4 LT |
1141 | { |
1142 | int count; | |
1143 | ||
1144 | /* | |
1145 | * ACPI interpreter is required to complete interrupt setup, | |
1146 | * so if it is off, don't enumerate the io-apics with ACPI. | |
1147 | * If MPS is present, it will handle them, | |
1148 | * otherwise the system will stay in PIC mode | |
1149 | */ | |
6b2b171a | 1150 | if (acpi_disabled || acpi_noirq) |
1da177e4 | 1151 | return -ENODEV; |
1da177e4 | 1152 | |
5f3b1a8b | 1153 | if (!cpu_has_apic) |
d3b6a349 AK |
1154 | return -ENODEV; |
1155 | ||
1da177e4 | 1156 | /* |
4be44fcd | 1157 | * if "noapic" boot option, don't look for IO-APICs |
1da177e4 LT |
1158 | */ |
1159 | if (skip_ioapic_setup) { | |
1160 | printk(KERN_INFO PREFIX "Skipping IOAPIC probe " | |
4be44fcd | 1161 | "due to 'noapic' option.\n"); |
1da177e4 LT |
1162 | return -ENODEV; |
1163 | } | |
1164 | ||
e819813f JL |
1165 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic, |
1166 | MAX_IO_APICS); | |
1da177e4 LT |
1167 | if (!count) { |
1168 | printk(KERN_ERR PREFIX "No IOAPIC entries present\n"); | |
1169 | return -ENODEV; | |
4be44fcd | 1170 | } else if (count < 0) { |
1da177e4 LT |
1171 | printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n"); |
1172 | return count; | |
1173 | } | |
1174 | ||
e819813f JL |
1175 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE, |
1176 | acpi_parse_int_src_ovr, nr_irqs); | |
1da177e4 | 1177 | if (count < 0) { |
4be44fcd LB |
1178 | printk(KERN_ERR PREFIX |
1179 | "Error parsing interrupt source overrides entry\n"); | |
1da177e4 LT |
1180 | /* TBD: Cleanup to allow fallback to MPS */ |
1181 | return count; | |
1182 | } | |
1183 | ||
1184 | /* | |
1185 | * If BIOS did not supply an INT_SRC_OVR for the SCI | |
1186 | * pretend we got one so we can set the SCI flags. | |
1187 | */ | |
1188 | if (!acpi_sci_override_gsi) | |
9d2062b8 EB |
1189 | acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0, |
1190 | acpi_gbl_FADT.sci_interrupt); | |
1da177e4 | 1191 | |
af901ca1 | 1192 | /* Fill in identity legacy mappings where no override */ |
1da177e4 LT |
1193 | mp_config_acpi_legacy_irqs(); |
1194 | ||
e819813f JL |
1195 | count = acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE, |
1196 | acpi_parse_nmi_src, nr_irqs); | |
1da177e4 LT |
1197 | if (count < 0) { |
1198 | printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n"); | |
1199 | /* TBD: Cleanup to allow fallback to MPS */ | |
1200 | return count; | |
1201 | } | |
1202 | ||
1203 | return 0; | |
1204 | } | |
1205 | #else | |
1206 | static inline int acpi_parse_madt_ioapic_entries(void) | |
1207 | { | |
1208 | return -1; | |
1209 | } | |
8466361a | 1210 | #endif /* !CONFIG_X86_IO_APIC */ |
1da177e4 | 1211 | |
cbf9bd60 YL |
1212 | static void __init early_acpi_process_madt(void) |
1213 | { | |
1214 | #ifdef CONFIG_X86_LOCAL_APIC | |
1215 | int error; | |
1216 | ||
1217 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { | |
1218 | ||
1219 | /* | |
1220 | * Parse MADT LAPIC entries | |
1221 | */ | |
1222 | error = early_acpi_parse_madt_lapic_addr_ovr(); | |
1223 | if (!error) { | |
1224 | acpi_lapic = 1; | |
1225 | smp_found_config = 1; | |
1226 | } | |
1227 | if (error == -EINVAL) { | |
1228 | /* | |
1229 | * Dell Precision Workstation 410, 610 come here. | |
1230 | */ | |
1231 | printk(KERN_ERR PREFIX | |
1232 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1233 | disable_acpi(); | |
1234 | } | |
1235 | } | |
1236 | #endif | |
1237 | } | |
1238 | ||
4be44fcd | 1239 | static void __init acpi_process_madt(void) |
1da177e4 LT |
1240 | { |
1241 | #ifdef CONFIG_X86_LOCAL_APIC | |
7f8f97c3 | 1242 | int error; |
1da177e4 | 1243 | |
7f8f97c3 | 1244 | if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { |
1da177e4 LT |
1245 | |
1246 | /* | |
1247 | * Parse MADT LAPIC entries | |
1248 | */ | |
1249 | error = acpi_parse_madt_lapic_entries(); | |
1250 | if (!error) { | |
1251 | acpi_lapic = 1; | |
1252 | ||
1253 | /* | |
1254 | * Parse MADT IO-APIC entries | |
1255 | */ | |
5da2fd26 | 1256 | mutex_lock(&acpi_ioapic_lock); |
1da177e4 | 1257 | error = acpi_parse_madt_ioapic_entries(); |
5da2fd26 | 1258 | mutex_unlock(&acpi_ioapic_lock); |
1da177e4 | 1259 | if (!error) { |
2f065aef | 1260 | acpi_set_irq_model_ioapic(); |
1da177e4 LT |
1261 | |
1262 | smp_found_config = 1; | |
1da177e4 LT |
1263 | } |
1264 | } | |
1265 | if (error == -EINVAL) { | |
1266 | /* | |
1267 | * Dell Precision Workstation 410, 610 come here. | |
1268 | */ | |
4be44fcd LB |
1269 | printk(KERN_ERR PREFIX |
1270 | "Invalid BIOS MADT, disabling ACPI\n"); | |
1da177e4 LT |
1271 | disable_acpi(); |
1272 | } | |
7b37b5fd LB |
1273 | } else { |
1274 | /* | |
1275 | * ACPI found no MADT, and so ACPI wants UP PIC mode. | |
1276 | * In the event an MPS table was found, forget it. | |
1277 | * Boot with "acpi=off" to use MPS on such a system. | |
1278 | */ | |
1279 | if (smp_found_config) { | |
1280 | printk(KERN_WARNING PREFIX | |
1281 | "No APIC-table, disabling MPS\n"); | |
1282 | smp_found_config = 0; | |
1283 | } | |
1da177e4 | 1284 | } |
69b88afa YL |
1285 | |
1286 | /* | |
1287 | * ACPI supports both logical (e.g. Hyper-Threading) and physical | |
1288 | * processors, where MPS only supports physical. | |
1289 | */ | |
1290 | if (acpi_lapic && acpi_ioapic) | |
1291 | printk(KERN_INFO "Using ACPI (MADT) for SMP configuration " | |
1292 | "information\n"); | |
1293 | else if (acpi_lapic) | |
1294 | printk(KERN_INFO "Using ACPI for processor (LAPIC) " | |
1295 | "configuration information\n"); | |
1da177e4 LT |
1296 | #endif |
1297 | return; | |
1298 | } | |
1299 | ||
1855256c | 1300 | static int __init disable_acpi_irq(const struct dmi_system_id *d) |
aea00143 AP |
1301 | { |
1302 | if (!acpi_force) { | |
1303 | printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n", | |
1304 | d->ident); | |
1305 | acpi_noirq_set(); | |
1306 | } | |
1307 | return 0; | |
1308 | } | |
1309 | ||
1855256c | 1310 | static int __init disable_acpi_pci(const struct dmi_system_id *d) |
aea00143 AP |
1311 | { |
1312 | if (!acpi_force) { | |
1313 | printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n", | |
1314 | d->ident); | |
1315 | acpi_disable_pci(); | |
1316 | } | |
1317 | return 0; | |
1318 | } | |
aea00143 | 1319 | |
1855256c | 1320 | static int __init dmi_disable_acpi(const struct dmi_system_id *d) |
aea00143 AP |
1321 | { |
1322 | if (!acpi_force) { | |
4be44fcd | 1323 | printk(KERN_NOTICE "%s detected: acpi off\n", d->ident); |
aea00143 AP |
1324 | disable_acpi(); |
1325 | } else { | |
1326 | printk(KERN_NOTICE | |
1327 | "Warning: DMI blacklist says broken, but acpi forced\n"); | |
1328 | } | |
1329 | return 0; | |
1330 | } | |
1331 | ||
e2079c43 | 1332 | /* |
ae10ccdc | 1333 | * Force ignoring BIOS IRQ0 override |
e2079c43 RW |
1334 | */ |
1335 | static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) | |
1336 | { | |
8d89adf4 | 1337 | if (!acpi_skip_timer_override) { |
ae10ccdc | 1338 | pr_notice("%s detected: Ignoring BIOS IRQ0 override\n", |
8d89adf4 IM |
1339 | d->ident); |
1340 | acpi_skip_timer_override = 1; | |
1341 | } | |
e2079c43 RW |
1342 | return 0; |
1343 | } | |
1344 | ||
aea00143 AP |
1345 | /* |
1346 | * If your system is blacklisted here, but you find that acpi=force | |
5b4c0b6f | 1347 | * works for you, please contact linux-acpi@vger.kernel.org |
aea00143 AP |
1348 | */ |
1349 | static struct dmi_system_id __initdata acpi_dmi_table[] = { | |
1350 | /* | |
1351 | * Boxes that need ACPI disabled | |
1352 | */ | |
1353 | { | |
4be44fcd LB |
1354 | .callback = dmi_disable_acpi, |
1355 | .ident = "IBM Thinkpad", | |
1356 | .matches = { | |
1357 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1358 | DMI_MATCH(DMI_BOARD_NAME, "2629H1G"), | |
1359 | }, | |
1360 | }, | |
aea00143 | 1361 | |
aea00143 AP |
1362 | /* |
1363 | * Boxes that need ACPI PCI IRQ routing disabled | |
1364 | */ | |
1365 | { | |
4be44fcd LB |
1366 | .callback = disable_acpi_irq, |
1367 | .ident = "ASUS A7V", | |
1368 | .matches = { | |
1369 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"), | |
1370 | DMI_MATCH(DMI_BOARD_NAME, "<A7V>"), | |
1371 | /* newer BIOS, Revision 1011, does work */ | |
1372 | DMI_MATCH(DMI_BIOS_VERSION, | |
1373 | "ASUS A7V ACPI BIOS Revision 1007"), | |
1374 | }, | |
1375 | }, | |
74586fca LB |
1376 | { |
1377 | /* | |
1378 | * Latest BIOS for IBM 600E (1.16) has bad pcinum | |
1379 | * for LPC bridge, which is needed for the PCI | |
1380 | * interrupt links to work. DSDT fix is in bug 5966. | |
1381 | * 2645, 2646 model numbers are shared with 600/600E/600X | |
1382 | */ | |
1383 | .callback = disable_acpi_irq, | |
1384 | .ident = "IBM Thinkpad 600 Series 2645", | |
1385 | .matches = { | |
1386 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1387 | DMI_MATCH(DMI_BOARD_NAME, "2645"), | |
1388 | }, | |
1389 | }, | |
1390 | { | |
1391 | .callback = disable_acpi_irq, | |
1392 | .ident = "IBM Thinkpad 600 Series 2646", | |
1393 | .matches = { | |
1394 | DMI_MATCH(DMI_BOARD_VENDOR, "IBM"), | |
1395 | DMI_MATCH(DMI_BOARD_NAME, "2646"), | |
1396 | }, | |
1397 | }, | |
aea00143 AP |
1398 | /* |
1399 | * Boxes that need ACPI PCI IRQ routing and PCI scan disabled | |
1400 | */ | |
4be44fcd LB |
1401 | { /* _BBN 0 bug */ |
1402 | .callback = disable_acpi_pci, | |
1403 | .ident = "ASUS PR-DLS", | |
1404 | .matches = { | |
1405 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
1406 | DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"), | |
1407 | DMI_MATCH(DMI_BIOS_VERSION, | |
1408 | "ASUS PR-DLS ACPI BIOS Revision 1010"), | |
1409 | DMI_MATCH(DMI_BIOS_DATE, "03/21/2003") | |
1410 | }, | |
1411 | }, | |
aea00143 | 1412 | { |
4be44fcd LB |
1413 | .callback = disable_acpi_pci, |
1414 | .ident = "Acer TravelMate 36x Laptop", | |
1415 | .matches = { | |
1416 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), | |
1417 | DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"), | |
1418 | }, | |
1419 | }, | |
35af2821 AH |
1420 | {} |
1421 | }; | |
1422 | ||
1423 | /* second table for DMI checks that should run after early-quirks */ | |
1424 | static struct dmi_system_id __initdata acpi_dmi_table_late[] = { | |
e2079c43 RW |
1425 | /* |
1426 | * HP laptops which use a DSDT reporting as HP/SB400/10000, | |
1427 | * which includes some code which overrides all temperature | |
1428 | * trip points to 16C if the INTIN2 input of the I/O APIC | |
1429 | * is enabled. This input is incorrectly designated the | |
1430 | * ISA IRQ 0 via an interrupt source override even though | |
1431 | * it is wired to the output of the master 8259A and INTIN0 | |
ae10ccdc | 1432 | * is not connected at all. Force ignoring BIOS IRQ0 |
e2079c43 RW |
1433 | * override in that cases. |
1434 | */ | |
e84956f9 RW |
1435 | { |
1436 | .callback = dmi_ignore_irq0_timer_override, | |
1437 | .ident = "HP nx6115 laptop", | |
1438 | .matches = { | |
1439 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1440 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6115"), | |
1441 | }, | |
1442 | }, | |
e2079c43 RW |
1443 | { |
1444 | .callback = dmi_ignore_irq0_timer_override, | |
1445 | .ident = "HP NX6125 laptop", | |
1446 | .matches = { | |
1447 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1448 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"), | |
1449 | }, | |
1450 | }, | |
1451 | { | |
1452 | .callback = dmi_ignore_irq0_timer_override, | |
1453 | .ident = "HP NX6325 laptop", | |
1454 | .matches = { | |
1455 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1456 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"), | |
1457 | }, | |
1458 | }, | |
e84956f9 RW |
1459 | { |
1460 | .callback = dmi_ignore_irq0_timer_override, | |
1461 | .ident = "HP 6715b laptop", | |
1462 | .matches = { | |
1463 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
1464 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b"), | |
1465 | }, | |
1466 | }, | |
f6b54f08 FT |
1467 | { |
1468 | .callback = dmi_ignore_irq0_timer_override, | |
1469 | .ident = "FUJITSU SIEMENS", | |
1470 | .matches = { | |
1471 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), | |
1472 | DMI_MATCH(DMI_PRODUCT_NAME, "AMILO PRO V2030"), | |
1473 | }, | |
1474 | }, | |
4be44fcd | 1475 | {} |
aea00143 AP |
1476 | }; |
1477 | ||
1da177e4 LT |
1478 | /* |
1479 | * acpi_boot_table_init() and acpi_boot_init() | |
1480 | * called from setup_arch(), always. | |
1481 | * 1. checksums all tables | |
1482 | * 2. enumerates lapics | |
1483 | * 3. enumerates io-apics | |
1484 | * | |
1485 | * acpi_table_init() is separate to allow reading SRAT without | |
1486 | * other side effects. | |
1487 | * | |
1488 | * side effects of acpi_boot_init: | |
1489 | * acpi_lapic = 1 if LAPIC found | |
1490 | * acpi_ioapic = 1 if IOAPIC found | |
1491 | * if (acpi_lapic && acpi_ioapic) smp_found_config = 1; | |
1492 | * if acpi_blacklisted() acpi_disabled = 1; | |
1493 | * acpi_irq_model=... | |
1494 | * ... | |
1da177e4 LT |
1495 | */ |
1496 | ||
8558e394 | 1497 | void __init acpi_boot_table_init(void) |
1da177e4 | 1498 | { |
aea00143 | 1499 | dmi_check_system(acpi_dmi_table); |
aea00143 | 1500 | |
1da177e4 LT |
1501 | /* |
1502 | * If acpi_disabled, bail out | |
1da177e4 | 1503 | */ |
68ca4069 | 1504 | if (acpi_disabled) |
8558e394 | 1505 | return; |
1da177e4 | 1506 | |
5f3b1a8b | 1507 | /* |
1da177e4 LT |
1508 | * Initialize the ACPI boot-time table parser. |
1509 | */ | |
8558e394 | 1510 | if (acpi_table_init()) { |
1da177e4 | 1511 | disable_acpi(); |
8558e394 | 1512 | return; |
1da177e4 | 1513 | } |
1da177e4 | 1514 | |
5f3b1a8b | 1515 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1516 | |
1517 | /* | |
1518 | * blacklist may disable ACPI entirely | |
1519 | */ | |
8558e394 | 1520 | if (acpi_blacklisted()) { |
1da177e4 LT |
1521 | if (acpi_force) { |
1522 | printk(KERN_WARNING PREFIX "acpi=force override\n"); | |
1523 | } else { | |
1524 | printk(KERN_WARNING PREFIX "Disabling ACPI support\n"); | |
1525 | disable_acpi(); | |
8558e394 | 1526 | return; |
1da177e4 LT |
1527 | } |
1528 | } | |
cbf9bd60 YL |
1529 | } |
1530 | ||
1531 | int __init early_acpi_boot_init(void) | |
1532 | { | |
1533 | /* | |
1534 | * If acpi_disabled, bail out | |
cbf9bd60 | 1535 | */ |
68ca4069 | 1536 | if (acpi_disabled) |
cbf9bd60 YL |
1537 | return 1; |
1538 | ||
1539 | /* | |
1540 | * Process the Multiple APIC Description Table (MADT), if present | |
1541 | */ | |
1542 | early_acpi_process_madt(); | |
1da177e4 LT |
1543 | |
1544 | return 0; | |
1545 | } | |
1546 | ||
1da177e4 LT |
1547 | int __init acpi_boot_init(void) |
1548 | { | |
35af2821 AH |
1549 | /* those are executed after early-quirks are executed */ |
1550 | dmi_check_system(acpi_dmi_table_late); | |
1551 | ||
1da177e4 LT |
1552 | /* |
1553 | * If acpi_disabled, bail out | |
1da177e4 | 1554 | */ |
68ca4069 | 1555 | if (acpi_disabled) |
4be44fcd | 1556 | return 1; |
1da177e4 | 1557 | |
5f3b1a8b | 1558 | acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); |
1da177e4 LT |
1559 | |
1560 | /* | |
1561 | * set sci_int and PM timer address | |
1562 | */ | |
ceb6c468 | 1563 | acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt); |
1da177e4 LT |
1564 | |
1565 | /* | |
1566 | * Process the Multiple APIC Description Table (MADT), if present | |
1567 | */ | |
1568 | acpi_process_madt(); | |
1569 | ||
5f3b1a8b | 1570 | acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet); |
1da177e4 | 1571 | |
b72d0db9 TG |
1572 | if (!acpi_noirq) |
1573 | x86_init.pci.init = pci_acpi_init; | |
1574 | ||
1da177e4 LT |
1575 | return 0; |
1576 | } | |
1a3f239d RR |
1577 | |
1578 | static int __init parse_acpi(char *arg) | |
1579 | { | |
1580 | if (!arg) | |
1581 | return -EINVAL; | |
1582 | ||
1583 | /* "acpi=off" disables both ACPI table parsing and interpreter */ | |
1584 | if (strcmp(arg, "off") == 0) { | |
1585 | disable_acpi(); | |
1586 | } | |
1587 | /* acpi=force to over-ride black-list */ | |
1588 | else if (strcmp(arg, "force") == 0) { | |
1589 | acpi_force = 1; | |
1a3f239d RR |
1590 | acpi_disabled = 0; |
1591 | } | |
1592 | /* acpi=strict disables out-of-spec workarounds */ | |
1593 | else if (strcmp(arg, "strict") == 0) { | |
1594 | acpi_strict = 1; | |
1595 | } | |
237889bf ZY |
1596 | /* acpi=rsdt use RSDT instead of XSDT */ |
1597 | else if (strcmp(arg, "rsdt") == 0) { | |
fab46105 | 1598 | acpi_gbl_do_not_use_xsdt = TRUE; |
237889bf | 1599 | } |
1a3f239d RR |
1600 | /* "acpi=noirq" disables ACPI interrupt routing */ |
1601 | else if (strcmp(arg, "noirq") == 0) { | |
1602 | acpi_noirq_set(); | |
aa2110cb LM |
1603 | } |
1604 | /* "acpi=copy_dsdt" copys DSDT */ | |
1605 | else if (strcmp(arg, "copy_dsdt") == 0) { | |
1606 | acpi_gbl_copy_dsdt_locally = 1; | |
9ad95879 NR |
1607 | } |
1608 | /* "acpi=nocmcff" disables FF mode for corrected errors */ | |
1609 | else if (strcmp(arg, "nocmcff") == 0) { | |
1610 | acpi_disable_cmcff = 1; | |
1a3f239d RR |
1611 | } else { |
1612 | /* Core will printk when we return error. */ | |
1613 | return -EINVAL; | |
1614 | } | |
1615 | return 0; | |
1616 | } | |
1617 | early_param("acpi", parse_acpi); | |
1618 | ||
1619 | /* FIXME: Using pci= for an ACPI parameter is a travesty. */ | |
1620 | static int __init parse_pci(char *arg) | |
1621 | { | |
1622 | if (arg && strcmp(arg, "noacpi") == 0) | |
1623 | acpi_disable_pci(); | |
1624 | return 0; | |
1625 | } | |
1626 | early_param("pci", parse_pci); | |
1627 | ||
3c999f14 YL |
1628 | int __init acpi_mps_check(void) |
1629 | { | |
1630 | #if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE) | |
1631 | /* mptable code is not built-in*/ | |
1632 | if (acpi_disabled || acpi_noirq) { | |
1633 | printk(KERN_WARNING "MPS support code is not built-in.\n" | |
1634 | "Using acpi=off or acpi=noirq or pci=noacpi " | |
1635 | "may have problem\n"); | |
1636 | return 1; | |
1637 | } | |
1638 | #endif | |
1639 | return 0; | |
1640 | } | |
1641 | ||
1a3f239d RR |
1642 | #ifdef CONFIG_X86_IO_APIC |
1643 | static int __init parse_acpi_skip_timer_override(char *arg) | |
1644 | { | |
1645 | acpi_skip_timer_override = 1; | |
1646 | return 0; | |
1647 | } | |
1648 | early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override); | |
fa18f477 AK |
1649 | |
1650 | static int __init parse_acpi_use_timer_override(char *arg) | |
1651 | { | |
1652 | acpi_use_timer_override = 1; | |
1653 | return 0; | |
1654 | } | |
1655 | early_param("acpi_use_timer_override", parse_acpi_use_timer_override); | |
1a3f239d RR |
1656 | #endif /* CONFIG_X86_IO_APIC */ |
1657 | ||
1658 | static int __init setup_acpi_sci(char *s) | |
1659 | { | |
1660 | if (!s) | |
1661 | return -EINVAL; | |
1662 | if (!strcmp(s, "edge")) | |
5f3b1a8b AS |
1663 | acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE | |
1664 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1665 | else if (!strcmp(s, "level")) |
5f3b1a8b AS |
1666 | acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL | |
1667 | (acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK); | |
1a3f239d | 1668 | else if (!strcmp(s, "high")) |
5f3b1a8b AS |
1669 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH | |
1670 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d | 1671 | else if (!strcmp(s, "low")) |
5f3b1a8b AS |
1672 | acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW | |
1673 | (acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK); | |
1a3f239d RR |
1674 | else |
1675 | return -EINVAL; | |
1676 | return 0; | |
1677 | } | |
1678 | early_param("acpi_sci", setup_acpi_sci); | |
d0a9081b AM |
1679 | |
1680 | int __acpi_acquire_global_lock(unsigned int *lock) | |
1681 | { | |
1682 | unsigned int old, new, val; | |
1683 | do { | |
1684 | old = *lock; | |
1685 | new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1)); | |
1686 | val = cmpxchg(lock, old, new); | |
1687 | } while (unlikely (val != old)); | |
1688 | return (new < 3) ? -1 : 0; | |
1689 | } | |
1690 | ||
1691 | int __acpi_release_global_lock(unsigned int *lock) | |
1692 | { | |
1693 | unsigned int old, new, val; | |
1694 | do { | |
1695 | old = *lock; | |
1696 | new = old & ~0x3; | |
1697 | val = cmpxchg(lock, old, new); | |
1698 | } while (unlikely (val != old)); | |
1699 | return old & 0x1; | |
1700 | } | |
8e30524d TR |
1701 | |
1702 | void __init arch_reserve_mem_area(acpi_physical_address addr, size_t size) | |
1703 | { | |
1704 | e820_add_region(addr, size, E820_ACPI); | |
1705 | update_e820(); | |
1706 | } |