[mirror_ubuntu-jammy-kernel.git] / arch / x86 / kernel / acpi / wakeup_64.S

.text
#include <linux/linkage.h>
#include <asm/segment.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/msr.h>
#include <asm/asm-offsets.h>

# Copyright 2003 Pavel Machek <pavel@suse.cz>, distribute under GPLv2
#
# wakeup_code runs in real mode, and at unknown address (determined at run-time).
# Therefore it must only use relative jumps/calls. 
#
# Do we need to deal with A20? It is okay: ACPI specs says A20 must be enabled
#
# If physical address of wakeup_code is 0x12345, BIOS should call us with
# cs = 0x1234, eip = 0x05
#

#define BEEP \
	inb	$97, %al; 	\
	outb	%al, $0x80; 	\
	movb	$3, %al; 	\
	outb	%al, $97; 	\
	outb	%al, $0x80; 	\
	movb	$-74, %al; 	\
	outb	%al, $67; 	\
	outb	%al, $0x80; 	\
	movb	$-119, %al; 	\
	outb	%al, $66; 	\
	outb	%al, $0x80; 	\
	movb	$15, %al; 	\
	outb	%al, $66;


ALIGN
	.align	16
ENTRY(wakeup_start)
wakeup_code:
	wakeup_code_start = .
	.code16

# Running in *copy* of this code, somewhere in low 1MB.

	cli
	cld
	# setup data segment
	movw	%cs, %ax
	movw	%ax, %ds		# Make ds:0 point to wakeup_start
	movw	%ax, %ss

	# Data segment must be set up before we can see whether to beep.
	testl   $4, realmode_flags - wakeup_code
	jz      1f
	BEEP
1:

					# Private stack is needed for ASUS board
	mov	$(wakeup_stack - wakeup_code), %sp

	pushl	$0			# Kill any dangerous flags
	popfl

	movl	real_magic - wakeup_code, %eax
	cmpl	$0x12345678, %eax
	jne	bogus_real_magic

	testl	$1, realmode_flags - wakeup_code
	jz	1f
	lcall   $0xc000,$3
	movw	%cs, %ax
	movw	%ax, %ds		# Bios might have played with that
	movw	%ax, %ss
1:

	testl	$2, realmode_flags - wakeup_code
	jz	1f
	mov	video_mode - wakeup_code, %ax
	call	mode_set
1:

	mov	%ds, %ax			# Find 32bit wakeup_code addr
	movzx   %ax, %esi			# (Convert %ds:gdt to a liner ptr)
	shll    $4, %esi
						# Fix up the vectors
	addl    %esi, wakeup_32_vector - wakeup_code
	addl    %esi, wakeup_long64_vector - wakeup_code
	addl    %esi, gdt_48a + 2 - wakeup_code # Fixup the gdt pointer

	lidtl	%ds:idt_48a - wakeup_code
	lgdtl	%ds:gdt_48a - wakeup_code	# load gdt with whatever is
						# appropriate

	movl	$1, %eax			# protected mode (PE) bit
	lmsw	%ax				# This is it!
	jmp	1f
1:

	ljmpl   *(wakeup_32_vector - wakeup_code)

	.balign 4
wakeup_32_vector:
	.long   wakeup_32 - wakeup_code
	.word   __KERNEL32_CS, 0

	.code32
wakeup_32:
# Running in this code, but at low address; paging is not yet turned on.

	movl	$__KERNEL_DS, %eax
	movl	%eax, %ds

	/*
	 * Prepare for entering 64bits mode
	 */

	/* Enable PAE */
	xorl	%eax, %eax
	btsl	$5, %eax
	movl	%eax, %cr4

	/* Setup early boot stage 4 level pagetables */
	leal    (wakeup_level4_pgt - wakeup_code)(%esi), %eax
	movl	%eax, %cr3

        /* Check if nx is implemented */
        movl    $0x80000001, %eax
        cpuid
        movl    %edx,%edi

	/* Enable Long Mode */
	xorl    %eax, %eax
	btsl	$_EFER_LME, %eax

	/* No Execute supported? */
	btl	$20,%edi
	jnc     1f
	btsl	$_EFER_NX, %eax
				
	/* Make changes effective */
1:	movl    $MSR_EFER, %ecx
	xorl    %edx, %edx
	wrmsr

	xorl	%eax, %eax
	btsl	$31, %eax			/* Enable paging and in turn activate Long Mode */
	btsl	$0, %eax			/* Enable protected mode */

	/* Make changes effective */
	movl	%eax, %cr0

	/* At this point:
		CR4.PAE must be 1
		CS.L must be 0
		CR3 must point to PML4
		Next instruction must be a branch
		This must be on identity-mapped page
	*/
	/*
	 * At this point we're in long mode but in 32bit compatibility mode
	 * with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
	 * EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we load
	 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
	 */

	/* Finally jump in 64bit mode */
        ljmp    *(wakeup_long64_vector - wakeup_code)(%esi)

	.balign 4
wakeup_long64_vector:
	.long   wakeup_long64 - wakeup_code
	.word   __KERNEL_CS, 0

.code64

	/* Hooray, we are in Long 64-bit mode (but still running in
	 * low memory)
	 */
wakeup_long64:
	/*
	 * We must switch to a new descriptor in kernel space for the GDT
	 * because soon the kernel won't have access anymore to the userspace
	 * addresses where we're currently running on. We have to do that here
	 * because in 32bit we couldn't load a 64bit linear address.
	 */
	lgdt	cpu_gdt_descr

	movq    saved_magic, %rax
	movq    $0x123456789abcdef0, %rdx
	cmpq    %rdx, %rax
	jne     bogus_64_magic

	nop
	nop
	movw	$__KERNEL_DS, %ax
	movw	%ax, %ss	
	movw	%ax, %ds
	movw	%ax, %es
	movw	%ax, %fs
	movw	%ax, %gs
	movq	saved_rsp, %rsp

	movq	saved_rbx, %rbx
	movq	saved_rdi, %rdi
	movq	saved_rsi, %rsi
	movq	saved_rbp, %rbp

	movq	saved_rip, %rax
	jmp	*%rax

.code32

	.align	64	
gdta:
	/* Its good to keep gdt in sync with one in trampoline.S */
	.word	0, 0, 0, 0			# dummy
	/* ??? Why I need the accessed bit set in order for this to work? */
	.quad   0x00cf9b000000ffff              # __KERNEL32_CS
	.quad   0x00af9b000000ffff              # __KERNEL_CS
	.quad   0x00cf93000000ffff              # __KERNEL_DS

idt_48a:
	.word	0				# idt limit = 0
	.word	0, 0				# idt base = 0L

gdt_48a:
	.word	0x800				# gdt limit=2048,
						#  256 GDT entries
	.long   gdta - wakeup_code              # gdt base (relocated in later)
	
real_magic:	.quad 0
video_mode:	.quad 0
realmode_flags:	.quad 0

.code16
bogus_real_magic:
	jmp bogus_real_magic

.code64
bogus_64_magic:
	jmp bogus_64_magic

/* This code uses an extended set of video mode numbers. These include:
 * Aliases for standard modes
 *	NORMAL_VGA (-1)
 *	EXTENDED_VGA (-2)
 *	ASK_VGA (-3)
 * Video modes numbered by menu position -- NOT RECOMMENDED because of lack
 * of compatibility when extending the table. These are between 0x00 and 0xff.
 */
#define VIDEO_FIRST_MENU 0x0000

/* Standard BIOS video modes (BIOS number + 0x0100) */
#define VIDEO_FIRST_BIOS 0x0100

/* VESA BIOS video modes (VESA number + 0x0200) */
#define VIDEO_FIRST_VESA 0x0200

/* Video7 special modes (BIOS number + 0x0900) */
#define VIDEO_FIRST_V7 0x0900

# Setting of user mode (AX=mode ID) => CF=success

# For now, we only handle VESA modes (0x0200..0x03ff).  To handle other
# modes, we should probably compile in the video code from the boot
# directory.
.code16
mode_set:
	movw	%ax, %bx
	subb	$VIDEO_FIRST_VESA>>8, %bh
	cmpb	$2, %bh
	jb	check_vesa

setbad:
	clc
	ret

check_vesa:
	orw	$0x4000, %bx			# Use linear frame buffer
	movw	$0x4f02, %ax			# VESA BIOS mode set call
	int	$0x10
	cmpw	$0x004f, %ax			# AL=4f if implemented
	jnz	setbad				# AH=0 if OK

	stc
	ret

wakeup_stack_begin:	# Stack grows down

.org	0xff0
wakeup_stack:		# Just below end of page

.org   0x1000
ENTRY(wakeup_level4_pgt)
	.quad   level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
	.fill   510,8,0
	/* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
	.quad   level3_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE

ENTRY(wakeup_end)
	
##
# acpi_copy_wakeup_routine
#
# Copy the above routine to low memory.
#
# Parameters:
# %rdi:	place to copy wakeup routine to
#
# Returned address is location of code in low memory (past data and stack)
#
	.code64
ENTRY(acpi_copy_wakeup_routine)
	pushq	%rax
	pushq	%rdx

	movl	saved_video_mode, %edx
	movl	%edx, video_mode - wakeup_start (,%rdi)
	movl	acpi_realmode_flags, %edx
	movl	%edx, realmode_flags - wakeup_start (,%rdi)
	movq	$0x12345678, real_magic - wakeup_start (,%rdi)
	movq	$0x123456789abcdef0, %rdx
	movq	%rdx, saved_magic

	movq    saved_magic, %rax
	movq    $0x123456789abcdef0, %rdx
	cmpq    %rdx, %rax
	jne     bogus_64_magic

	# restore the regs we used
	popq	%rdx
	popq	%rax
ENTRY(do_suspend_lowlevel_s4bios)
	ret

	.align 2
	.p2align 4,,15
.globl do_suspend_lowlevel
	.type	do_suspend_lowlevel,@function
do_suspend_lowlevel:
.LFB5:
	subq	$8, %rsp
	xorl	%eax, %eax
	call	save_processor_state

	movq	$saved_context, %rax
	movq	%rsp, pt_regs_rsp(%rax)
	movq	%rbp, pt_regs_rbp(%rax)
	movq	%rsi, pt_regs_rsi(%rax)
	movq	%rdi, pt_regs_rdi(%rax)
	movq	%rbx, pt_regs_rbx(%rax)
	movq	%rcx, pt_regs_rcx(%rax)
	movq	%rdx, pt_regs_rdx(%rax)
	movq	%r8, pt_regs_r8(%rax)
	movq	%r9, pt_regs_r9(%rax)
	movq	%r10, pt_regs_r10(%rax)
	movq	%r11, pt_regs_r11(%rax)
	movq	%r12, pt_regs_r12(%rax)
	movq	%r13, pt_regs_r13(%rax)
	movq	%r14, pt_regs_r14(%rax)
	movq	%r15, pt_regs_r15(%rax)
	pushfq
	popq	pt_regs_eflags(%rax)

	movq	$.L97, saved_rip(%rip)

	movq	%rsp, saved_rsp
	movq	%rbp, saved_rbp
	movq	%rbx, saved_rbx
	movq	%rdi, saved_rdi
	movq	%rsi, saved_rsi

	addq	$8, %rsp
	movl	$3, %edi
	xorl	%eax, %eax
	jmp	acpi_enter_sleep_state
.L97:
	.p2align 4,,7
.L99:
	.align 4
	movl	$24, %eax
	movw	%ax, %ds

	/* We don't restore %rax, it must be 0 anyway */
	movq	$saved_context, %rax
	movq	saved_context_cr4(%rax), %rbx
	movq	%rbx, %cr4
	movq	saved_context_cr3(%rax), %rbx
	movq	%rbx, %cr3
	movq	saved_context_cr2(%rax), %rbx
	movq	%rbx, %cr2
	movq	saved_context_cr0(%rax), %rbx
	movq	%rbx, %cr0
	pushq	pt_regs_eflags(%rax)
	popfq
	movq	pt_regs_rsp(%rax), %rsp
	movq	pt_regs_rbp(%rax), %rbp
	movq	pt_regs_rsi(%rax), %rsi
	movq	pt_regs_rdi(%rax), %rdi
	movq	pt_regs_rbx(%rax), %rbx
	movq	pt_regs_rcx(%rax), %rcx
	movq	pt_regs_rdx(%rax), %rdx
	movq	pt_regs_r8(%rax), %r8
	movq	pt_regs_r9(%rax), %r9
	movq	pt_regs_r10(%rax), %r10
	movq	pt_regs_r11(%rax), %r11
	movq	pt_regs_r12(%rax), %r12
	movq	pt_regs_r13(%rax), %r13
	movq	pt_regs_r14(%rax), %r14
	movq	pt_regs_r15(%rax), %r15

	xorl	%eax, %eax
	addq	$8, %rsp
	jmp	restore_processor_state
.LFE5:
.Lfe5:
	.size	do_suspend_lowlevel,.Lfe5-do_suspend_lowlevel
	
.data
ALIGN
ENTRY(saved_rbp)	.quad	0
ENTRY(saved_rsi)	.quad	0
ENTRY(saved_rdi)	.quad	0
ENTRY(saved_rbx)	.quad	0

ENTRY(saved_rip)	.quad	0
ENTRY(saved_rsp)	.quad	0

ENTRY(saved_magic)	.quad	0
Commit	Line	Data
1da177e4 LT	1	.text
	2	#include <linux/linkage.h>
	3	#include <asm/segment.h>
d8e1baf1	4	#include <asm/pgtable.h>
1da177e4 LT	5	#include <asm/page.h>
1da177e4 LT	6	#include <asm/msr.h>
0de80bcc	7	#include <asm/asm-offsets.h>
1da177e4 LT	8
	9	# Copyright 2003 Pavel Machek <pavel@suse.cz>, distribute under GPLv2
	10	#
	11	# wakeup_code runs in real mode, and at unknown address (determined at run-time).
	12	# Therefore it must only use relative jumps/calls.
	13	#
	14	# Do we need to deal with A20? It is okay: ACPI specs says A20 must be enabled
	15	#
	16	# If physical address of wakeup_code is 0x12345, BIOS should call us with
	17	# cs = 0x1234, eip = 0x05
	18	#
	19
5a60d623 NC	20	#define BEEP \
	21	inb $97, %al; \
	22	outb %al, $0x80; \
	23	movb $3, %al; \
	24	outb %al, $97; \
	25	outb %al, $0x80; \
	26	movb $-74, %al; \
	27	outb %al, $67; \
	28	outb %al, $0x80; \
	29	movb $-119, %al; \
	30	outb %al, $66; \
	31	outb %al, $0x80; \
	32	movb $15, %al; \
	33	outb %al, $66;
	34
1da177e4 LT	35
	36	ALIGN
	37	.align 16
	38	ENTRY(wakeup_start)
	39	wakeup_code:
	40	wakeup_code_start = .
	41	.code16
	42
	43	# Running in copy of this code, somewhere in low 1MB.
	44
1da177e4 LT	45	cli
	46	cld
	47	# setup data segment
	48	movw %cs, %ax
275f5517	49	movw %ax, %ds # Make ds:0 point to wakeup_start
1da177e4	50	movw %ax, %ss
5a60d623 NC	51
5a60d623 NC	52	# Data segment must be set up before we can see whether to beep.
77afcf78	53	testl $4, realmode_flags - wakeup_code
5a60d623 NC	54	jz 1f
	55	BEEP
	56	1:
	57
275f5517 VG	58	# Private stack is needed for ASUS board
275f5517 VG	59	mov $(wakeup_stack - wakeup_code), %sp
1da177e4	60
275f5517	61	pushl $0 # Kill any dangerous flags
1da177e4 LT	62	popfl
	63
	64	movl real_magic - wakeup_code, %eax
	65	cmpl $0x12345678, %eax
	66	jne bogus_real_magic
	67
77afcf78	68	testl $1, realmode_flags - wakeup_code
1da177e4 LT	69	jz 1f
	70	lcall $0xc000,$3
	71	movw %cs, %ax
275f5517	72	movw %ax, %ds # Bios might have played with that
1da177e4 LT	73	movw %ax, %ss
	74	1:
	75
77afcf78	76	testl $2, realmode_flags - wakeup_code
1da177e4 LT	77	jz 1f
1da177e4 LT	78	mov video_mode - wakeup_code, %ax
91c4b8cb	79	call mode_set
1da177e4 LT	80	1:
1da177e4 LT	81
d8e1baf1 VG	82	mov %ds, %ax # Find 32bit wakeup_code addr
	83	movzx %ax, %esi # (Convert %ds:gdt to a liner ptr)
	84	shll $4, %esi
	85	# Fix up the vectors
	86	addl %esi, wakeup_32_vector - wakeup_code
	87	addl %esi, wakeup_long64_vector - wakeup_code
	88	addl %esi, gdt_48a + 2 - wakeup_code # Fixup the gdt pointer
	89
	90	lidtl %ds:idt_48a - wakeup_code
343c3f64	91	lgdtl %ds:gdt_48a - wakeup_code # load gdt with whatever is
1da177e4 LT	92	# appropriate
	93
	94	movl $1, %eax # protected mode (PE) bit
	95	lmsw %ax # This is it!
	96	jmp 1f
	97	1:
	98
275f5517 VG	99	ljmpl *(wakeup_32_vector - wakeup_code)
	100
	101	.balign 4
	102	wakeup_32_vector:
d8e1baf1	103	.long wakeup_32 - wakeup_code
275f5517	104	.word __KERNEL32_CS, 0
1da177e4 LT	105
	106	.code32
	107	wakeup_32:
	108	# Running in this code, but at low address; paging is not yet turned on.
1da177e4	109
275f5517 VG	110	movl $__KERNEL_DS, %eax
275f5517 VG	111	movl %eax, %ds
1da177e4	112
1da177e4 LT	113	/*
	114	* Prepare for entering 64bits mode
	115	*/
	116
275f5517	117	/* Enable PAE */
1da177e4 LT	118	xorl %eax, %eax
1da177e4 LT	119	btsl $5, %eax
1da177e4 LT	120	movl %eax, %cr4
	121
	122	/* Setup early boot stage 4 level pagetables */
d8e1baf1	123	leal (wakeup_level4_pgt - wakeup_code)(%esi), %eax
1da177e4 LT	124	movl %eax, %cr3
1da177e4 LT	125
a4831e08 VG	126	/* Check if nx is implemented */
	127	movl $0x80000001, %eax
	128	cpuid
	129	movl %edx,%edi
	130
1da177e4	131	/* Enable Long Mode */
275f5517	132	xorl %eax, %eax
1da177e4	133	btsl $_EFER_LME, %eax
1da177e4	134
275f5517	135	/* No Execute supported? */
1da177e4 LT	136	btl $20,%edi
	137	jnc 1f
	138	btsl $_EFER_NX, %eax
1da177e4 LT	139
1da177e4 LT	140	/* Make changes effective */
275f5517 VG	141	1: movl $MSR_EFER, %ecx
275f5517 VG	142	xorl %edx, %edx
1da177e4	143	wrmsr
1da177e4 LT	144
	145	xorl %eax, %eax
	146	btsl $31, %eax /* Enable paging and in turn activate Long Mode */
	147	btsl $0, %eax /* Enable protected mode */
1da177e4 LT	148
	149	/* Make changes effective */
	150	movl %eax, %cr0
275f5517	151
1da177e4 LT	152	/* At this point:
	153	CR4.PAE must be 1
	154	CS.L must be 0
	155	CR3 must point to PML4
	156	Next instruction must be a branch
	157	This must be on identity-mapped page
	158	*/
1da177e4 LT	159	/*
	160	* At this point we're in long mode but in 32bit compatibility mode
	161	* with EFER.LME = 1, CS.L = 0, CS.D = 1 (and in turn
	162	* EFER.LMA = 1). Now we want to jump in 64bit mode, to do that we load
	163	* the new gdt/idt that has __KERNEL_CS with CS.L = 1.
	164	*/
	165
1da177e4	166	/* Finally jump in 64bit mode */
d8e1baf1	167	ljmp *(wakeup_long64_vector - wakeup_code)(%esi)
1da177e4	168
275f5517 VG	169	.balign 4
275f5517 VG	170	wakeup_long64_vector:
d8e1baf1	171	.long wakeup_long64 - wakeup_code
275f5517	172	.word __KERNEL_CS, 0
1da177e4 LT	173
	174	.code64
	175
275f5517 VG	176	/* Hooray, we are in Long 64-bit mode (but still running in
	177	* low memory)
	178	*/
1da177e4 LT	179	wakeup_long64:
	180	/*
	181	* We must switch to a new descriptor in kernel space for the GDT
	182	* because soon the kernel won't have access anymore to the userspace
	183	* addresses where we're currently running on. We have to do that here
	184	* because in 32bit we couldn't load a 64bit linear address.
	185	*/
d8e1baf1	186	lgdt cpu_gdt_descr
1da177e4	187
d8e1baf1 VG	188	movq saved_magic, %rax
	189	movq $0x123456789abcdef0, %rdx
	190	cmpq %rdx, %rax
	191	jne bogus_64_magic
	192
1da177e4 LT	193	nop
	194	nop
	195	movw $__KERNEL_DS, %ax
	196	movw %ax, %ss
	197	movw %ax, %ds
	198	movw %ax, %es
	199	movw %ax, %fs
	200	movw %ax, %gs
7db681d7	201	movq saved_rsp, %rsp
1da177e4	202
7db681d7 VG	203	movq saved_rbx, %rbx
	204	movq saved_rdi, %rdi
	205	movq saved_rsi, %rsi
	206	movq saved_rbp, %rbp
1da177e4	207
7db681d7	208	movq saved_rip, %rax
1da177e4 LT	209	jmp *%rax
	210
	211	.code32
	212
	213	.align 64
	214	gdta:
275f5517	215	/* Its good to keep gdt in sync with one in trampoline.S */
1da177e4	216	.word 0, 0, 0, 0 # dummy
275f5517 VG	217	/* ??? Why I need the accessed bit set in order for this to work? */
	218	.quad 0x00cf9b000000ffff # __KERNEL32_CS
	219	.quad 0x00af9b000000ffff # __KERNEL_CS
	220	.quad 0x00cf93000000ffff # __KERNEL_DS
1da177e4 LT	221
	222	idt_48a:
	223	.word 0 # idt limit = 0
	224	.word 0, 0 # idt base = 0L
	225
	226	gdt_48a:
275f5517	227	.word 0x800 # gdt limit=2048,
1da177e4	228	# 256 GDT entries
d8e1baf1	229	.long gdta - wakeup_code # gdt base (relocated in later)
1da177e4	230
1da177e4 LT	231	real_magic: .quad 0
1da177e4 LT	232	video_mode: .quad 0
77afcf78	233	realmode_flags: .quad 0
1da177e4	234
d8e1baf1	235	.code16
1da177e4	236	bogus_real_magic:
1da177e4 LT	237	jmp bogus_real_magic
1da177e4 LT	238
d8e1baf1 VG	239	.code64
d8e1baf1 VG	240	bogus_64_magic:
d8e1baf1	241	jmp bogus_64_magic
1da177e4	242
1da177e4 LT	243	/* This code uses an extended set of video mode numbers. These include:
	244	* Aliases for standard modes
	245	* NORMAL_VGA (-1)
	246	* EXTENDED_VGA (-2)
	247	* ASK_VGA (-3)
	248	* Video modes numbered by menu position -- NOT RECOMMENDED because of lack
	249	* of compatibility when extending the table. These are between 0x00 and 0xff.
	250	*/
	251	#define VIDEO_FIRST_MENU 0x0000
	252
	253	/* Standard BIOS video modes (BIOS number + 0x0100) */
	254	#define VIDEO_FIRST_BIOS 0x0100
	255
	256	/* VESA BIOS video modes (VESA number + 0x0200) */
	257	#define VIDEO_FIRST_VESA 0x0200
	258
	259	/* Video7 special modes (BIOS number + 0x0900) */
	260	#define VIDEO_FIRST_V7 0x0900
	261
	262	# Setting of user mode (AX=mode ID) => CF=success
91c4b8cb PA	263
	264	# For now, we only handle VESA modes (0x0200..0x03ff). To handle other
	265	# modes, we should probably compile in the video code from the boot
	266	# directory.
d8e1baf1	267	.code16
91c4b8cb	268	mode_set:
1da177e4	269	movw %ax, %bx
91c4b8cb PA	270	subb $VIDEO_FIRST_VESA>>8, %bh
	271	cmpb $2, %bh
	272	jb check_vesa
1da177e4	273
91c4b8cb PA	274	setbad:
91c4b8cb PA	275	clc
1da177e4 LT	276	ret
1da177e4 LT	277
91c4b8cb	278	check_vesa:
1da177e4 LT	279	orw $0x4000, %bx # Use linear frame buffer
	280	movw $0x4f02, %ax # VESA BIOS mode set call
	281	int $0x10
	282	cmpw $0x004f, %ax # AL=4f if implemented
91c4b8cb	283	jnz setbad # AH=0 if OK
1da177e4 LT	284
	285	stc
	286	ret
	287
1da177e4 LT	288	wakeup_stack_begin: # Stack grows down
	289
	290	.org 0xff0
	291	wakeup_stack: # Just below end of page
	292
d8e1baf1 VG	293	.org 0x1000
	294	ENTRY(wakeup_level4_pgt)
	295	.quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
	296	.fill 510,8,0
	297	/* (2^48-(2102410241024))/(2^39) = 511 /
	298	.quad level3_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE
	299
1da177e4 LT	300	ENTRY(wakeup_end)
	301
	302	##
	303	# acpi_copy_wakeup_routine
	304	#
	305	# Copy the above routine to low memory.
	306	#
	307	# Parameters:
	308	# %rdi: place to copy wakeup routine to
	309	#
	310	# Returned address is location of code in low memory (past data and stack)
	311	#
7c17e706	312	.code64
1da177e4 LT	313	ENTRY(acpi_copy_wakeup_routine)
1da177e4 LT	314	pushq %rax
1da177e4 LT	315	pushq %rdx
1da177e4 LT	316
1da177e4 LT	317	movl saved_video_mode, %edx
1da177e4 LT	318	movl %edx, video_mode - wakeup_start (,%rdi)
77afcf78 PM	319	movl acpi_realmode_flags, %edx
77afcf78 PM	320	movl %edx, realmode_flags - wakeup_start (,%rdi)
1da177e4 LT	321	movq $0x12345678, real_magic - wakeup_start (,%rdi)
	322	movq $0x123456789abcdef0, %rdx
	323	movq %rdx, saved_magic
	324
d8e1baf1 VG	325	movq saved_magic, %rax
	326	movq $0x123456789abcdef0, %rdx
	327	cmpq %rdx, %rax
	328	jne bogus_64_magic
1da177e4	329
1da177e4 LT	330	# restore the regs we used
1da177e4 LT	331	popq %rdx
1da177e4 LT	332	popq %rax
	333	ENTRY(do_suspend_lowlevel_s4bios)
	334	ret
	335
	336	.align 2
	337	.p2align 4,,15
	338	.globl do_suspend_lowlevel
	339	.type do_suspend_lowlevel,@function
	340	do_suspend_lowlevel:
	341	.LFB5:
	342	subq $8, %rsp
	343	xorl %eax, %eax
	344	call save_processor_state
	345
0de80bcc RW	346	movq $saved_context, %rax
	347	movq %rsp, pt_regs_rsp(%rax)
	348	movq %rbp, pt_regs_rbp(%rax)
	349	movq %rsi, pt_regs_rsi(%rax)
	350	movq %rdi, pt_regs_rdi(%rax)
	351	movq %rbx, pt_regs_rbx(%rax)
	352	movq %rcx, pt_regs_rcx(%rax)
	353	movq %rdx, pt_regs_rdx(%rax)
	354	movq %r8, pt_regs_r8(%rax)
	355	movq %r9, pt_regs_r9(%rax)
	356	movq %r10, pt_regs_r10(%rax)
	357	movq %r11, pt_regs_r11(%rax)
	358	movq %r12, pt_regs_r12(%rax)
	359	movq %r13, pt_regs_r13(%rax)
	360	movq %r14, pt_regs_r14(%rax)
	361	movq %r15, pt_regs_r15(%rax)
	362	pushfq
	363	popq pt_regs_eflags(%rax)
1da177e4	364
7db681d7	365	movq $.L97, saved_rip(%rip)
1da177e4	366
0de80bcc RW	367	movq %rsp, saved_rsp
	368	movq %rbp, saved_rbp
	369	movq %rbx, saved_rbx
	370	movq %rdi, saved_rdi
	371	movq %rsi, saved_rsi
1da177e4 LT	372
	373	addq $8, %rsp
	374	movl $3, %edi
	375	xorl %eax, %eax
	376	jmp acpi_enter_sleep_state
	377	.L97:
	378	.p2align 4,,7
	379	.L99:
	380	.align 4
	381	movl $24, %eax
0de80bcc RW	382	movw %ax, %ds
	383
	384	/* We don't restore %rax, it must be 0 anyway */
	385	movq $saved_context, %rax
	386	movq saved_context_cr4(%rax), %rbx
	387	movq %rbx, %cr4
	388	movq saved_context_cr3(%rax), %rbx
	389	movq %rbx, %cr3
	390	movq saved_context_cr2(%rax), %rbx
	391	movq %rbx, %cr2
	392	movq saved_context_cr0(%rax), %rbx
	393	movq %rbx, %cr0
	394	pushq pt_regs_eflags(%rax)
	395	popfq
	396	movq pt_regs_rsp(%rax), %rsp
	397	movq pt_regs_rbp(%rax), %rbp
	398	movq pt_regs_rsi(%rax), %rsi
	399	movq pt_regs_rdi(%rax), %rdi
	400	movq pt_regs_rbx(%rax), %rbx
	401	movq pt_regs_rcx(%rax), %rcx
	402	movq pt_regs_rdx(%rax), %rdx
	403	movq pt_regs_r8(%rax), %r8
	404	movq pt_regs_r9(%rax), %r9
	405	movq pt_regs_r10(%rax), %r10
	406	movq pt_regs_r11(%rax), %r11
	407	movq pt_regs_r12(%rax), %r12
	408	movq pt_regs_r13(%rax), %r13
	409	movq pt_regs_r14(%rax), %r14
	410	movq pt_regs_r15(%rax), %r15
1da177e4 LT	411
	412	xorl %eax, %eax
	413	addq $8, %rsp
	414	jmp restore_processor_state
	415	.LFE5:
	416	.Lfe5:
	417	.size do_suspend_lowlevel,.Lfe5-do_suspend_lowlevel
	418
	419	.data
	420	ALIGN
7db681d7 VG	421	ENTRY(saved_rbp) .quad 0
	422	ENTRY(saved_rsi) .quad 0
	423	ENTRY(saved_rdi) .quad 0
	424	ENTRY(saved_rbx) .quad 0
1da177e4	425
7db681d7 VG	426	ENTRY(saved_rip) .quad 0
7db681d7 VG	427	ENTRY(saved_rsp) .quad 0
1da177e4 LT	428
1da177e4 LT	429	ENTRY(saved_magic) .quad 0