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44b111b5 SP |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Numascale NumaConnect-Specific APIC Code | |
7 | * | |
8 | * Copyright (C) 2011 Numascale AS. All rights reserved. | |
9 | * | |
10 | * Send feedback to <support@numascale.com> | |
11 | * | |
12 | */ | |
521b82fe | 13 | #include <linux/types.h> |
44b111b5 | 14 | #include <linux/init.h> |
65fddcfc | 15 | #include <linux/pgtable.h> |
44b111b5 | 16 | |
f9726bfd | 17 | #include <asm/numachip/numachip.h> |
44b111b5 | 18 | #include <asm/numachip/numachip_csr.h> |
521b82fe | 19 | |
8b542da3 | 20 | |
c94f0718 | 21 | #include "local.h" |
44b111b5 | 22 | |
db1003a7 DB |
23 | u8 numachip_system __read_mostly; |
24 | static const struct apic apic_numachip1; | |
d9d4dee6 | 25 | static const struct apic apic_numachip2; |
db1003a7 | 26 | static void (*numachip_apic_icr_write)(int apicid, unsigned int val) __read_mostly; |
44b111b5 | 27 | |
db1003a7 | 28 | static unsigned int numachip1_get_apic_id(unsigned long x) |
44b111b5 SP |
29 | { |
30 | unsigned long value; | |
c8a470ca | 31 | unsigned int id = (x >> 24) & 0xff; |
44b111b5 | 32 | |
bc696ca0 | 33 | if (static_cpu_has(X86_FEATURE_NODEID_MSR)) { |
c8a470ca DB |
34 | rdmsrl(MSR_FAM10H_NODE_ID, value); |
35 | id |= (value << 2) & 0xff00; | |
36 | } | |
44b111b5 SP |
37 | |
38 | return id; | |
39 | } | |
40 | ||
727657e6 | 41 | static u32 numachip1_set_apic_id(unsigned int id) |
44b111b5 | 42 | { |
f148b41e | 43 | return (id & 0xff) << 24; |
44b111b5 SP |
44 | } |
45 | ||
d9d4dee6 DB |
46 | static unsigned int numachip2_get_apic_id(unsigned long x) |
47 | { | |
48 | u64 mcfg; | |
49 | ||
50 | rdmsrl(MSR_FAM10H_MMIO_CONF_BASE, mcfg); | |
51 | return ((mcfg >> (28 - 8)) & 0xfff00) | (x >> 24); | |
52 | } | |
53 | ||
727657e6 | 54 | static u32 numachip2_set_apic_id(unsigned int id) |
d9d4dee6 DB |
55 | { |
56 | return id << 24; | |
57 | } | |
58 | ||
a774635d | 59 | static int numachip_apic_id_valid(u32 apicid) |
fa63030e DB |
60 | { |
61 | /* Trust what bootloader passes in MADT */ | |
62 | return 1; | |
63 | } | |
64 | ||
44b111b5 SP |
65 | static int numachip_apic_id_registered(void) |
66 | { | |
db1003a7 | 67 | return 1; |
44b111b5 SP |
68 | } |
69 | ||
70 | static int numachip_phys_pkg_id(int initial_apic_id, int index_msb) | |
71 | { | |
72 | return initial_apic_id >> index_msb; | |
73 | } | |
74 | ||
db1003a7 | 75 | static void numachip1_apic_icr_write(int apicid, unsigned int val) |
44b111b5 | 76 | { |
db1003a7 DB |
77 | write_lcsr(CSR_G3_EXT_IRQ_GEN, (apicid << 16) | val); |
78 | } | |
44b111b5 | 79 | |
d9d4dee6 DB |
80 | static void numachip2_apic_icr_write(int apicid, unsigned int val) |
81 | { | |
82 | numachip2_write32_lcsr(NUMACHIP2_APIC_ICR, (apicid << 12) | val); | |
83 | } | |
84 | ||
db1003a7 DB |
85 | static int numachip_wakeup_secondary(int phys_apicid, unsigned long start_rip) |
86 | { | |
87 | numachip_apic_icr_write(phys_apicid, APIC_DM_INIT); | |
88 | numachip_apic_icr_write(phys_apicid, APIC_DM_STARTUP | | |
89 | (start_rip >> 12)); | |
44b111b5 | 90 | |
44b111b5 SP |
91 | return 0; |
92 | } | |
93 | ||
94 | static void numachip_send_IPI_one(int cpu, int vector) | |
95 | { | |
ad03a9c2 | 96 | int local_apicid, apicid = per_cpu(x86_cpu_to_apicid, cpu); |
db1003a7 | 97 | unsigned int dmode; |
44b111b5 | 98 | |
ad03a9c2 DB |
99 | preempt_disable(); |
100 | local_apicid = __this_cpu_read(x86_cpu_to_apicid); | |
101 | ||
102 | /* Send via local APIC where non-local part matches */ | |
103 | if (!((apicid ^ local_apicid) >> NUMACHIP_LAPIC_BITS)) { | |
104 | unsigned long flags; | |
105 | ||
106 | local_irq_save(flags); | |
107 | __default_send_IPI_dest_field(apicid, vector, | |
108 | APIC_DEST_PHYSICAL); | |
109 | local_irq_restore(flags); | |
110 | preempt_enable(); | |
111 | return; | |
112 | } | |
113 | preempt_enable(); | |
114 | ||
db1003a7 DB |
115 | dmode = (vector == NMI_VECTOR) ? APIC_DM_NMI : APIC_DM_FIXED; |
116 | numachip_apic_icr_write(apicid, dmode | vector); | |
44b111b5 SP |
117 | } |
118 | ||
119 | static void numachip_send_IPI_mask(const struct cpumask *mask, int vector) | |
120 | { | |
121 | unsigned int cpu; | |
122 | ||
123 | for_each_cpu(cpu, mask) | |
124 | numachip_send_IPI_one(cpu, vector); | |
125 | } | |
126 | ||
127 | static void numachip_send_IPI_mask_allbutself(const struct cpumask *mask, | |
128 | int vector) | |
129 | { | |
130 | unsigned int this_cpu = smp_processor_id(); | |
131 | unsigned int cpu; | |
132 | ||
133 | for_each_cpu(cpu, mask) { | |
134 | if (cpu != this_cpu) | |
135 | numachip_send_IPI_one(cpu, vector); | |
136 | } | |
137 | } | |
138 | ||
139 | static void numachip_send_IPI_allbutself(int vector) | |
140 | { | |
141 | unsigned int this_cpu = smp_processor_id(); | |
142 | unsigned int cpu; | |
143 | ||
144 | for_each_online_cpu(cpu) { | |
145 | if (cpu != this_cpu) | |
146 | numachip_send_IPI_one(cpu, vector); | |
147 | } | |
148 | } | |
149 | ||
150 | static void numachip_send_IPI_all(int vector) | |
151 | { | |
152 | numachip_send_IPI_mask(cpu_online_mask, vector); | |
153 | } | |
154 | ||
155 | static void numachip_send_IPI_self(int vector) | |
156 | { | |
25e5a76b | 157 | apic_write(APIC_SELF_IPI, vector); |
44b111b5 SP |
158 | } |
159 | ||
db1003a7 | 160 | static int __init numachip1_probe(void) |
44b111b5 | 161 | { |
db1003a7 | 162 | return apic == &apic_numachip1; |
44b111b5 SP |
163 | } |
164 | ||
d9d4dee6 DB |
165 | static int __init numachip2_probe(void) |
166 | { | |
167 | return apic == &apic_numachip2; | |
168 | } | |
169 | ||
44b111b5 SP |
170 | static void fixup_cpu_id(struct cpuinfo_x86 *c, int node) |
171 | { | |
c8a470ca DB |
172 | u64 val; |
173 | u32 nodes = 1; | |
174 | ||
175 | this_cpu_write(cpu_llc_id, node); | |
176 | ||
177 | /* Account for nodes per socket in multi-core-module processors */ | |
67e87d43 | 178 | if (boot_cpu_has(X86_FEATURE_NODEID_MSR)) { |
c8a470ca DB |
179 | rdmsrl(MSR_FAM10H_NODE_ID, val); |
180 | nodes = ((val >> 3) & 7) + 1; | |
68894632 | 181 | } |
c8a470ca DB |
182 | |
183 | c->phys_proc_id = node / nodes; | |
44b111b5 SP |
184 | } |
185 | ||
186 | static int __init numachip_system_init(void) | |
187 | { | |
db1003a7 DB |
188 | /* Map the LCSR area and set up the apic_icr_write function */ |
189 | switch (numachip_system) { | |
190 | case 1: | |
191 | init_extra_mapping_uc(NUMACHIP_LCSR_BASE, NUMACHIP_LCSR_SIZE); | |
192 | numachip_apic_icr_write = numachip1_apic_icr_write; | |
db1003a7 | 193 | break; |
d9d4dee6 DB |
194 | case 2: |
195 | init_extra_mapping_uc(NUMACHIP2_LCSR_BASE, NUMACHIP2_LCSR_SIZE); | |
196 | numachip_apic_icr_write = numachip2_apic_icr_write; | |
d9d4dee6 | 197 | break; |
db1003a7 | 198 | default: |
44b111b5 | 199 | return 0; |
db1003a7 | 200 | } |
b980dcf2 | 201 | |
44b111b5 | 202 | x86_cpuinit.fixup_cpu_id = fixup_cpu_id; |
dd7a5ab4 | 203 | x86_init.pci.arch_init = pci_numachip_init; |
44b111b5 | 204 | |
44b111b5 SP |
205 | return 0; |
206 | } | |
207 | early_initcall(numachip_system_init); | |
208 | ||
db1003a7 | 209 | static int numachip1_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
44b111b5 | 210 | { |
db1003a7 DB |
211 | if ((strncmp(oem_id, "NUMASC", 6) != 0) || |
212 | (strncmp(oem_table_id, "NCONNECT", 8) != 0)) | |
213 | return 0; | |
44b111b5 | 214 | |
db1003a7 | 215 | numachip_system = 1; |
44b111b5 | 216 | |
db1003a7 DB |
217 | return 1; |
218 | } | |
44b111b5 | 219 | |
d9d4dee6 DB |
220 | static int numachip2_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
221 | { | |
222 | if ((strncmp(oem_id, "NUMASC", 6) != 0) || | |
223 | (strncmp(oem_table_id, "NCONECT2", 8) != 0)) | |
224 | return 0; | |
225 | ||
226 | numachip_system = 2; | |
227 | ||
228 | return 1; | |
229 | } | |
230 | ||
ad03a9c2 DB |
231 | /* APIC IPIs are queued */ |
232 | static void numachip_apic_wait_icr_idle(void) | |
233 | { | |
234 | } | |
235 | ||
236 | /* APIC NMI IPIs are queued */ | |
237 | static u32 numachip_safe_apic_wait_icr_idle(void) | |
238 | { | |
239 | return 0; | |
240 | } | |
241 | ||
db1003a7 | 242 | static const struct apic apic_numachip1 __refconst = { |
44b111b5 | 243 | .name = "NumaConnect system", |
db1003a7 DB |
244 | .probe = numachip1_probe, |
245 | .acpi_madt_oem_check = numachip1_acpi_madt_oem_check, | |
fa63030e | 246 | .apic_id_valid = numachip_apic_id_valid, |
44b111b5 SP |
247 | .apic_id_registered = numachip_apic_id_registered, |
248 | ||
249 | .irq_delivery_mode = dest_Fixed, | |
250 | .irq_dest_mode = 0, /* physical */ | |
251 | ||
44b111b5 SP |
252 | .disable_esr = 0, |
253 | .dest_logical = 0, | |
254 | .check_apicid_used = NULL, | |
44b111b5 | 255 | |
44b111b5 SP |
256 | .init_apic_ldr = flat_init_apic_ldr, |
257 | ||
258 | .ioapic_phys_id_map = NULL, | |
259 | .setup_apic_routing = NULL, | |
44b111b5 SP |
260 | .cpu_present_to_apicid = default_cpu_present_to_apicid, |
261 | .apicid_to_cpu_present = NULL, | |
44b111b5 | 262 | .check_phys_apicid_present = default_check_phys_apicid_present, |
44b111b5 | 263 | .phys_pkg_id = numachip_phys_pkg_id, |
44b111b5 | 264 | |
db1003a7 DB |
265 | .get_apic_id = numachip1_get_apic_id, |
266 | .set_apic_id = numachip1_set_apic_id, | |
44b111b5 | 267 | |
9f9e3bb1 | 268 | .calc_dest_apicid = apic_default_calc_apicid, |
44b111b5 | 269 | |
c61a0d31 | 270 | .send_IPI = numachip_send_IPI_one, |
44b111b5 SP |
271 | .send_IPI_mask = numachip_send_IPI_mask, |
272 | .send_IPI_mask_allbutself = numachip_send_IPI_mask_allbutself, | |
273 | .send_IPI_allbutself = numachip_send_IPI_allbutself, | |
274 | .send_IPI_all = numachip_send_IPI_all, | |
275 | .send_IPI_self = numachip_send_IPI_self, | |
276 | ||
277 | .wakeup_secondary_cpu = numachip_wakeup_secondary, | |
44b111b5 SP |
278 | .inquire_remote_apic = NULL, /* REMRD not supported */ |
279 | ||
280 | .read = native_apic_mem_read, | |
281 | .write = native_apic_mem_write, | |
2a43195d | 282 | .eoi_write = native_apic_mem_write, |
44b111b5 SP |
283 | .icr_read = native_apic_icr_read, |
284 | .icr_write = native_apic_icr_write, | |
ad03a9c2 DB |
285 | .wait_icr_idle = numachip_apic_wait_icr_idle, |
286 | .safe_wait_icr_idle = numachip_safe_apic_wait_icr_idle, | |
44b111b5 | 287 | }; |
44b111b5 | 288 | |
db1003a7 | 289 | apic_driver(apic_numachip1); |
d9d4dee6 DB |
290 | |
291 | static const struct apic apic_numachip2 __refconst = { | |
292 | .name = "NumaConnect2 system", | |
293 | .probe = numachip2_probe, | |
294 | .acpi_madt_oem_check = numachip2_acpi_madt_oem_check, | |
295 | .apic_id_valid = numachip_apic_id_valid, | |
296 | .apic_id_registered = numachip_apic_id_registered, | |
297 | ||
298 | .irq_delivery_mode = dest_Fixed, | |
299 | .irq_dest_mode = 0, /* physical */ | |
300 | ||
d9d4dee6 DB |
301 | .disable_esr = 0, |
302 | .dest_logical = 0, | |
303 | .check_apicid_used = NULL, | |
304 | ||
d9d4dee6 DB |
305 | .init_apic_ldr = flat_init_apic_ldr, |
306 | ||
307 | .ioapic_phys_id_map = NULL, | |
308 | .setup_apic_routing = NULL, | |
309 | .cpu_present_to_apicid = default_cpu_present_to_apicid, | |
310 | .apicid_to_cpu_present = NULL, | |
311 | .check_phys_apicid_present = default_check_phys_apicid_present, | |
312 | .phys_pkg_id = numachip_phys_pkg_id, | |
313 | ||
314 | .get_apic_id = numachip2_get_apic_id, | |
315 | .set_apic_id = numachip2_set_apic_id, | |
d9d4dee6 | 316 | |
9f9e3bb1 | 317 | .calc_dest_apicid = apic_default_calc_apicid, |
d9d4dee6 | 318 | |
c61a0d31 | 319 | .send_IPI = numachip_send_IPI_one, |
d9d4dee6 DB |
320 | .send_IPI_mask = numachip_send_IPI_mask, |
321 | .send_IPI_mask_allbutself = numachip_send_IPI_mask_allbutself, | |
322 | .send_IPI_allbutself = numachip_send_IPI_allbutself, | |
323 | .send_IPI_all = numachip_send_IPI_all, | |
324 | .send_IPI_self = numachip_send_IPI_self, | |
325 | ||
326 | .wakeup_secondary_cpu = numachip_wakeup_secondary, | |
327 | .inquire_remote_apic = NULL, /* REMRD not supported */ | |
328 | ||
329 | .read = native_apic_mem_read, | |
330 | .write = native_apic_mem_write, | |
331 | .eoi_write = native_apic_mem_write, | |
332 | .icr_read = native_apic_icr_read, | |
333 | .icr_write = native_apic_icr_write, | |
ad03a9c2 DB |
334 | .wait_icr_idle = numachip_apic_wait_icr_idle, |
335 | .safe_wait_icr_idle = numachip_safe_apic_wait_icr_idle, | |
d9d4dee6 DB |
336 | }; |
337 | ||
338 | apic_driver(apic_numachip2); |