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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Written by: Garry Forsgren, Unisys Corporation | |
3 | * Natalie Protasevich, Unisys Corporation | |
7da18ed9 | 4 | * |
1da177e4 LT |
5 | * This file contains the code to configure and interface |
6 | * with Unisys ES7000 series hardware system manager. | |
7 | * | |
7da18ed9 IM |
8 | * Copyright (c) 2003 Unisys Corporation. |
9 | * Copyright (C) 2009, Red Hat, Inc., Ingo Molnar | |
10 | * | |
11 | * All Rights Reserved. | |
1da177e4 LT |
12 | * |
13 | * This program is free software; you can redistribute it and/or modify it | |
14 | * under the terms of version 2 of the GNU General Public License as | |
15 | * published by the Free Software Foundation. | |
16 | * | |
17 | * This program is distributed in the hope that it would be useful, but | |
18 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along | |
22 | * with this program; if not, write the Free Software Foundation, Inc., 59 | |
23 | * Temple Place - Suite 330, Boston MA 02111-1307, USA. | |
24 | * | |
25 | * Contact information: Unisys Corporation, Township Line & Union Meeting | |
26 | * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or: | |
27 | * | |
28 | * http://www.unisys.com | |
29 | */ | |
2c4ce18c IM |
30 | #include <linux/notifier.h> |
31 | #include <linux/spinlock.h> | |
32 | #include <linux/cpumask.h> | |
33 | #include <linux/threads.h> | |
1da177e4 | 34 | #include <linux/kernel.h> |
2c4ce18c IM |
35 | #include <linux/module.h> |
36 | #include <linux/reboot.h> | |
1da177e4 | 37 | #include <linux/string.h> |
2c4ce18c | 38 | #include <linux/types.h> |
1da177e4 | 39 | #include <linux/errno.h> |
1da177e4 | 40 | #include <linux/acpi.h> |
2c4ce18c | 41 | #include <linux/init.h> |
7da18ed9 | 42 | #include <linux/nmi.h> |
2c4ce18c | 43 | #include <linux/smp.h> |
7da18ed9 | 44 | #include <linux/io.h> |
2c4ce18c | 45 | |
1da177e4 | 46 | #include <asm/apicdef.h> |
2c4ce18c IM |
47 | #include <asm/atomic.h> |
48 | #include <asm/fixmap.h> | |
49 | #include <asm/mpspec.h> | |
569712b2 | 50 | #include <asm/setup.h> |
2c4ce18c IM |
51 | #include <asm/apic.h> |
52 | #include <asm/ipi.h> | |
1da177e4 | 53 | |
1625324d YL |
54 | /* |
55 | * ES7000 chipsets | |
56 | */ | |
57 | ||
2c4ce18c IM |
58 | #define NON_UNISYS 0 |
59 | #define ES7000_CLASSIC 1 | |
60 | #define ES7000_ZORRO 2 | |
1625324d | 61 | |
2c4ce18c IM |
62 | #define MIP_REG 1 |
63 | #define MIP_PSAI_REG 4 | |
1625324d | 64 | |
2c4ce18c IM |
65 | #define MIP_BUSY 1 |
66 | #define MIP_SPIN 0xf0000 | |
67 | #define MIP_VALID 0x0100000000000000ULL | |
352887d1 | 68 | #define MIP_SW_APIC 0x1020b |
1625324d | 69 | |
2c4ce18c | 70 | #define MIP_PORT(val) ((val >> 32) & 0xffff) |
1625324d | 71 | |
2c4ce18c | 72 | #define MIP_RD_LO(val) (val & 0xffffffff) |
1625324d | 73 | |
352887d1 IM |
74 | struct mip_reg { |
75 | unsigned long long off_0x00; | |
76 | unsigned long long off_0x08; | |
77 | unsigned long long off_0x10; | |
78 | unsigned long long off_0x18; | |
79 | unsigned long long off_0x20; | |
80 | unsigned long long off_0x28; | |
81 | unsigned long long off_0x30; | |
82 | unsigned long long off_0x38; | |
83 | }; | |
84 | ||
1625324d | 85 | struct mip_reg_info { |
2c4ce18c IM |
86 | unsigned long long mip_info; |
87 | unsigned long long delivery_info; | |
88 | unsigned long long host_reg; | |
89 | unsigned long long mip_reg; | |
1625324d YL |
90 | }; |
91 | ||
1625324d | 92 | struct psai { |
2c4ce18c IM |
93 | unsigned long long entry_type; |
94 | unsigned long long addr; | |
95 | unsigned long long bep_addr; | |
1625324d YL |
96 | }; |
97 | ||
1625324d | 98 | #ifdef CONFIG_ACPI |
7da18ed9 | 99 | |
352887d1 | 100 | struct es7000_oem_table { |
2c4ce18c IM |
101 | struct acpi_table_header Header; |
102 | u32 OEMTableAddr; | |
103 | u32 OEMTableSize; | |
1625324d | 104 | }; |
7da18ed9 IM |
105 | |
106 | static unsigned long oem_addrX; | |
107 | static unsigned long oem_size; | |
108 | ||
1625324d YL |
109 | #endif |
110 | ||
1da177e4 LT |
111 | /* |
112 | * ES7000 Globals | |
113 | */ | |
114 | ||
7da18ed9 | 115 | static volatile unsigned long *psai; |
2c4ce18c IM |
116 | static struct mip_reg *mip_reg; |
117 | static struct mip_reg *host_reg; | |
118 | static int mip_port; | |
7da18ed9 IM |
119 | static unsigned long mip_addr; |
120 | static unsigned long host_addr; | |
1da177e4 | 121 | |
2c4ce18c | 122 | int es7000_plat; |
32c50612 | 123 | |
1da177e4 LT |
124 | /* |
125 | * GSI override for ES7000 platforms. | |
126 | */ | |
127 | ||
2c4ce18c | 128 | static unsigned int base; |
1da177e4 LT |
129 | |
130 | static int | |
131 | es7000_rename_gsi(int ioapic, int gsi) | |
132 | { | |
9338316c NP |
133 | if (es7000_plat == ES7000_ZORRO) |
134 | return gsi; | |
135 | ||
1da177e4 LT |
136 | if (!base) { |
137 | int i; | |
138 | for (i = 0; i < nr_ioapics; i++) | |
139 | base += nr_ioapic_registers[i]; | |
140 | } | |
141 | ||
c7e7964c | 142 | if (!ioapic && (gsi < 16)) |
1da177e4 | 143 | gsi += base; |
2c4ce18c | 144 | |
1da177e4 LT |
145 | return gsi; |
146 | } | |
147 | ||
569712b2 YL |
148 | static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip) |
149 | { | |
150 | unsigned long vect = 0, psaival = 0; | |
151 | ||
152 | if (psai == NULL) | |
153 | return -1; | |
154 | ||
155 | vect = ((unsigned long)__pa(eip)/0x1000) << 16; | |
156 | psaival = (0x1000000 | vect | cpu); | |
157 | ||
158 | while (*psai & 0x1000000) | |
159 | ; | |
160 | ||
161 | *psai = psaival; | |
162 | ||
163 | return 0; | |
164 | } | |
54ac14a8 | 165 | |
be163a15 | 166 | static int __init es7000_update_apic(void) |
54ac14a8 | 167 | { |
c8d46cf0 | 168 | apic->wakeup_cpu = wakeup_secondary_cpu_via_mip; |
54ac14a8 | 169 | |
b5fe363b YL |
170 | /* MPENTIUMIII */ |
171 | if (boot_cpu_data.x86 == 6 && | |
172 | (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) { | |
be163a15 | 173 | es7000_update_apic_to_cluster(); |
a9659366 | 174 | apic->wait_for_init_deassert = NULL; |
c8d46cf0 | 175 | apic->wakeup_cpu = wakeup_secondary_cpu_via_mip; |
b5fe363b YL |
176 | } |
177 | ||
54ac14a8 YL |
178 | return 0; |
179 | } | |
569712b2 | 180 | |
d3185b37 | 181 | static void __init setup_unisys(void) |
56f1d5d5 NP |
182 | { |
183 | /* | |
184 | * Determine the generation of the ES7000 currently running. | |
185 | * | |
186 | * es7000_plat = 1 if the machine is a 5xx ES7000 box | |
187 | * es7000_plat = 2 if the machine is a x86_64 ES7000 box | |
188 | * | |
189 | */ | |
190 | if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2)) | |
9338316c | 191 | es7000_plat = ES7000_ZORRO; |
56f1d5d5 | 192 | else |
9338316c | 193 | es7000_plat = ES7000_CLASSIC; |
56f1d5d5 | 194 | ioapic_renumber_irq = es7000_rename_gsi; |
54ac14a8 | 195 | |
be163a15 | 196 | x86_quirks->update_apic = es7000_update_apic; |
56f1d5d5 NP |
197 | } |
198 | ||
1da177e4 | 199 | /* |
d3185b37 | 200 | * Parse the OEM Table: |
1da177e4 | 201 | */ |
352887d1 | 202 | static int __init parse_unisys_oem(char *oemptr) |
1da177e4 | 203 | { |
352887d1 | 204 | int i; |
1da177e4 | 205 | int success = 0; |
352887d1 IM |
206 | unsigned char type, size; |
207 | unsigned long val; | |
208 | char *tp = NULL; | |
209 | struct psai *psaip = NULL; | |
1da177e4 LT |
210 | struct mip_reg_info *mi; |
211 | struct mip_reg *host, *mip; | |
212 | ||
213 | tp = oemptr; | |
214 | ||
215 | tp += 8; | |
216 | ||
352887d1 | 217 | for (i = 0; i <= 6; i++) { |
1da177e4 LT |
218 | type = *tp++; |
219 | size = *tp++; | |
220 | tp -= 2; | |
221 | switch (type) { | |
222 | case MIP_REG: | |
223 | mi = (struct mip_reg_info *)tp; | |
224 | val = MIP_RD_LO(mi->host_reg); | |
225 | host_addr = val; | |
226 | host = (struct mip_reg *)val; | |
227 | host_reg = __va(host); | |
228 | val = MIP_RD_LO(mi->mip_reg); | |
229 | mip_port = MIP_PORT(mi->mip_info); | |
230 | mip_addr = val; | |
231 | mip = (struct mip_reg *)val; | |
232 | mip_reg = __va(mip); | |
5171c304 TG |
233 | pr_debug("es7000_mipcfg: host_reg = 0x%lx \n", |
234 | (unsigned long)host_reg); | |
235 | pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n", | |
236 | (unsigned long)mip_reg); | |
1da177e4 LT |
237 | success++; |
238 | break; | |
239 | case MIP_PSAI_REG: | |
240 | psaip = (struct psai *)tp; | |
241 | if (tp != NULL) { | |
242 | if (psaip->addr) | |
243 | psai = __va(psaip->addr); | |
244 | else | |
245 | psai = NULL; | |
246 | success++; | |
247 | } | |
248 | break; | |
249 | default: | |
250 | break; | |
251 | } | |
1da177e4 LT |
252 | tp += size; |
253 | } | |
254 | ||
d3185b37 | 255 | if (success < 2) |
9338316c | 256 | es7000_plat = NON_UNISYS; |
d3185b37 | 257 | else |
56f1d5d5 | 258 | setup_unisys(); |
2c4ce18c | 259 | |
1da177e4 LT |
260 | return es7000_plat; |
261 | } | |
262 | ||
e5428ede | 263 | #ifdef CONFIG_ACPI |
d3185b37 | 264 | static int __init find_unisys_acpi_oem_table(unsigned long *oem_addr) |
1da177e4 | 265 | { |
ceb6c468 | 266 | struct acpi_table_header *header = NULL; |
7da18ed9 | 267 | struct es7000_oem_table *table; |
b825e6cc | 268 | acpi_size tbl_size; |
7da18ed9 IM |
269 | acpi_status ret; |
270 | int i = 0; | |
a73aaedd | 271 | |
7da18ed9 IM |
272 | for (;;) { |
273 | ret = acpi_get_table_with_size("OEM1", i++, &header, &tbl_size); | |
274 | if (!ACPI_SUCCESS(ret)) | |
275 | return -1; | |
a73aaedd | 276 | |
7da18ed9 IM |
277 | if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) |
278 | break; | |
a73aaedd | 279 | |
b825e6cc | 280 | early_acpi_os_unmap_memory(header, tbl_size); |
1da177e4 | 281 | } |
7da18ed9 IM |
282 | |
283 | table = (void *)header; | |
284 | ||
285 | oem_addrX = table->OEMTableAddr; | |
286 | oem_size = table->OEMTableSize; | |
287 | ||
288 | early_acpi_os_unmap_memory(header, tbl_size); | |
289 | ||
290 | *oem_addr = (unsigned long)__acpi_map_table(oem_addrX, oem_size); | |
291 | ||
292 | return 0; | |
1da177e4 | 293 | } |
a73aaedd | 294 | |
d3185b37 | 295 | static void __init unmap_unisys_acpi_oem_table(unsigned long oem_addr) |
a73aaedd | 296 | { |
b825e6cc YL |
297 | if (!oem_addr) |
298 | return; | |
299 | ||
300 | __acpi_unmap_table((char *)oem_addr, oem_size); | |
a73aaedd | 301 | } |
7da18ed9 IM |
302 | |
303 | static int es7000_check_dsdt(void) | |
304 | { | |
305 | struct acpi_table_header header; | |
306 | ||
307 | if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) && | |
308 | !strncmp(header.oem_id, "UNISYS", 6)) | |
309 | return 1; | |
310 | return 0; | |
311 | } | |
312 | ||
313 | /* Hook from generic ACPI tables.c */ | |
314 | static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | |
315 | { | |
316 | unsigned long oem_addr = 0; | |
317 | int check_dsdt; | |
318 | int ret = 0; | |
319 | ||
320 | /* check dsdt at first to avoid clear fix_map for oem_addr */ | |
321 | check_dsdt = es7000_check_dsdt(); | |
322 | ||
323 | if (!find_unisys_acpi_oem_table(&oem_addr)) { | |
324 | if (check_dsdt) { | |
325 | ret = parse_unisys_oem((char *)oem_addr); | |
326 | } else { | |
327 | setup_unisys(); | |
328 | ret = 1; | |
329 | } | |
330 | /* | |
331 | * we need to unmap it | |
332 | */ | |
333 | unmap_unisys_acpi_oem_table(oem_addr); | |
334 | } | |
335 | return ret; | |
336 | } | |
337 | #else /* !CONFIG_ACPI: */ | |
338 | static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | |
339 | { | |
340 | return 0; | |
341 | } | |
342 | #endif /* !CONFIG_ACPI */ | |
1da177e4 | 343 | |
2c4ce18c | 344 | static void es7000_spin(int n) |
1da177e4 LT |
345 | { |
346 | int i = 0; | |
347 | ||
348 | while (i++ < n) | |
349 | rep_nop(); | |
350 | } | |
351 | ||
352 | static int __init | |
353 | es7000_mip_write(struct mip_reg *mip_reg) | |
354 | { | |
2c4ce18c IM |
355 | int status = 0; |
356 | int spin; | |
1da177e4 LT |
357 | |
358 | spin = MIP_SPIN; | |
2c4ce18c IM |
359 | while ((host_reg->off_0x38 & MIP_VALID) != 0) { |
360 | if (--spin <= 0) { | |
7da18ed9 | 361 | WARN(1, "Timeout waiting for Host Valid Flag\n"); |
2c4ce18c IM |
362 | return -1; |
363 | } | |
1da177e4 LT |
364 | es7000_spin(MIP_SPIN); |
365 | } | |
366 | ||
367 | memcpy(host_reg, mip_reg, sizeof(struct mip_reg)); | |
368 | outb(1, mip_port); | |
369 | ||
370 | spin = MIP_SPIN; | |
371 | ||
2c4ce18c | 372 | while ((mip_reg->off_0x38 & MIP_VALID) == 0) { |
1da177e4 | 373 | if (--spin <= 0) { |
7da18ed9 | 374 | WARN(1, "Timeout waiting for MIP Valid Flag\n"); |
1da177e4 LT |
375 | return -1; |
376 | } | |
377 | es7000_spin(MIP_SPIN); | |
378 | } | |
379 | ||
2c4ce18c IM |
380 | status = (mip_reg->off_0x00 & 0xffff0000000000ULL) >> 48; |
381 | mip_reg->off_0x38 &= ~MIP_VALID; | |
382 | ||
1da177e4 LT |
383 | return status; |
384 | } | |
385 | ||
d3185b37 | 386 | static void __init es7000_enable_apic_mode(void) |
1da177e4 | 387 | { |
b0b20e5a IM |
388 | struct mip_reg es7000_mip_reg; |
389 | int mip_status; | |
390 | ||
391 | if (!es7000_plat) | |
1da177e4 | 392 | return; |
b0b20e5a | 393 | |
7da18ed9 | 394 | printk(KERN_INFO "ES7000: Enabling APIC mode.\n"); |
352887d1 IM |
395 | memset(&es7000_mip_reg, 0, sizeof(struct mip_reg)); |
396 | es7000_mip_reg.off_0x00 = MIP_SW_APIC; | |
397 | es7000_mip_reg.off_0x38 = MIP_VALID; | |
b0b20e5a | 398 | |
7da18ed9 IM |
399 | while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0) |
400 | WARN(1, "Command failed, status = %x\n", mip_status); | |
1da177e4 | 401 | } |
2e096df8 | 402 | |
2e096df8 IM |
403 | static void es7000_vector_allocation_domain(int cpu, cpumask_t *retmask) |
404 | { | |
405 | /* Careful. Some cpus do not strictly honor the set of cpus | |
406 | * specified in the interrupt destination when using lowest | |
407 | * priority interrupt delivery mode. | |
408 | * | |
409 | * In particular there was a hyperthreading cpu observed to | |
410 | * deliver interrupts to the wrong hyperthread when only one | |
411 | * hyperthread was specified in the interrupt desitination. | |
412 | */ | |
413 | *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } }; | |
414 | } | |
415 | ||
416 | ||
417 | static void es7000_wait_for_init_deassert(atomic_t *deassert) | |
418 | { | |
419 | #ifndef CONFIG_ES7000_CLUSTERED_APIC | |
420 | while (!atomic_read(deassert)) | |
421 | cpu_relax(); | |
422 | #endif | |
423 | return; | |
424 | } | |
425 | ||
426 | static unsigned int es7000_get_apic_id(unsigned long x) | |
427 | { | |
428 | return (x >> 24) & 0xFF; | |
429 | } | |
430 | ||
2e096df8 IM |
431 | static void es7000_send_IPI_mask(const struct cpumask *mask, int vector) |
432 | { | |
43f39890 | 433 | default_send_IPI_mask_sequence_phys(mask, vector); |
2e096df8 IM |
434 | } |
435 | ||
436 | static void es7000_send_IPI_allbutself(int vector) | |
437 | { | |
43f39890 | 438 | default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector); |
2e096df8 IM |
439 | } |
440 | ||
441 | static void es7000_send_IPI_all(int vector) | |
442 | { | |
443 | es7000_send_IPI_mask(cpu_online_mask, vector); | |
444 | } | |
445 | ||
446 | static int es7000_apic_id_registered(void) | |
447 | { | |
352887d1 | 448 | return 1; |
2e096df8 IM |
449 | } |
450 | ||
451 | static const cpumask_t *target_cpus_cluster(void) | |
452 | { | |
453 | return &CPU_MASK_ALL; | |
454 | } | |
455 | ||
456 | static const cpumask_t *es7000_target_cpus(void) | |
457 | { | |
458 | return &cpumask_of_cpu(smp_processor_id()); | |
459 | } | |
460 | ||
461 | static unsigned long | |
462 | es7000_check_apicid_used(physid_mask_t bitmap, int apicid) | |
463 | { | |
464 | return 0; | |
465 | } | |
466 | static unsigned long es7000_check_apicid_present(int bit) | |
467 | { | |
468 | return physid_isset(bit, phys_cpu_present_map); | |
469 | } | |
470 | ||
471 | static unsigned long calculate_ldr(int cpu) | |
472 | { | |
2c4ce18c | 473 | unsigned long id = per_cpu(x86_bios_cpu_apicid, cpu); |
2e096df8 | 474 | |
2c4ce18c | 475 | return SET_APIC_LOGICAL_ID(id); |
2e096df8 IM |
476 | } |
477 | ||
478 | /* | |
479 | * Set up the logical destination ID. | |
480 | * | |
481 | * Intel recommends to set DFR, LdR and TPR before enabling | |
482 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | |
483 | * document number 292116). So here it goes... | |
484 | */ | |
485 | static void es7000_init_apic_ldr_cluster(void) | |
486 | { | |
487 | unsigned long val; | |
488 | int cpu = smp_processor_id(); | |
489 | ||
352887d1 | 490 | apic_write(APIC_DFR, APIC_DFR_CLUSTER); |
2e096df8 IM |
491 | val = calculate_ldr(cpu); |
492 | apic_write(APIC_LDR, val); | |
493 | } | |
494 | ||
495 | static void es7000_init_apic_ldr(void) | |
496 | { | |
497 | unsigned long val; | |
498 | int cpu = smp_processor_id(); | |
499 | ||
352887d1 | 500 | apic_write(APIC_DFR, APIC_DFR_FLAT); |
2e096df8 IM |
501 | val = calculate_ldr(cpu); |
502 | apic_write(APIC_LDR, val); | |
503 | } | |
504 | ||
505 | static void es7000_setup_apic_routing(void) | |
506 | { | |
507 | int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id()); | |
7da18ed9 IM |
508 | |
509 | printk(KERN_INFO | |
510 | "Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", | |
2e096df8 IM |
511 | (apic_version[apic] == 0x14) ? |
512 | "Physical Cluster" : "Logical Cluster", | |
7da18ed9 | 513 | nr_ioapics, cpus_addr(*es7000_target_cpus())[0]); |
2e096df8 IM |
514 | } |
515 | ||
516 | static int es7000_apicid_to_node(int logical_apicid) | |
517 | { | |
518 | return 0; | |
519 | } | |
520 | ||
521 | ||
522 | static int es7000_cpu_present_to_apicid(int mps_cpu) | |
523 | { | |
524 | if (!mps_cpu) | |
525 | return boot_cpu_physical_apicid; | |
526 | else if (mps_cpu < nr_cpu_ids) | |
2c4ce18c | 527 | return per_cpu(x86_bios_cpu_apicid, mps_cpu); |
2e096df8 IM |
528 | else |
529 | return BAD_APICID; | |
530 | } | |
531 | ||
7da18ed9 IM |
532 | static int cpu_id; |
533 | ||
2e096df8 IM |
534 | static physid_mask_t es7000_apicid_to_cpu_present(int phys_apicid) |
535 | { | |
2e096df8 IM |
536 | physid_mask_t mask; |
537 | ||
7da18ed9 IM |
538 | mask = physid_mask_of_physid(cpu_id); |
539 | ++cpu_id; | |
2e096df8 IM |
540 | |
541 | return mask; | |
542 | } | |
543 | ||
544 | /* Mapping from cpu number to logical apicid */ | |
545 | static int es7000_cpu_to_logical_apicid(int cpu) | |
546 | { | |
547 | #ifdef CONFIG_SMP | |
548 | if (cpu >= nr_cpu_ids) | |
549 | return BAD_APICID; | |
2f205bc4 | 550 | return cpu_2_logical_apicid[cpu]; |
2e096df8 IM |
551 | #else |
552 | return logical_smp_processor_id(); | |
553 | #endif | |
554 | } | |
555 | ||
556 | static physid_mask_t es7000_ioapic_phys_id_map(physid_mask_t phys_map) | |
557 | { | |
558 | /* For clustered we don't have a good way to do this yet - hack */ | |
559 | return physids_promote(0xff); | |
560 | } | |
561 | ||
562 | static int es7000_check_phys_apicid_present(int cpu_physical_apicid) | |
563 | { | |
564 | boot_cpu_physical_apicid = read_apic_id(); | |
2c4ce18c | 565 | return 1; |
2e096df8 IM |
566 | } |
567 | ||
568 | static unsigned int | |
569 | es7000_cpu_mask_to_apicid_cluster(const struct cpumask *cpumask) | |
570 | { | |
571 | int cpus_found = 0; | |
572 | int num_bits_set; | |
573 | int apicid; | |
574 | int cpu; | |
575 | ||
576 | num_bits_set = cpumask_weight(cpumask); | |
577 | /* Return id to all */ | |
578 | if (num_bits_set == nr_cpu_ids) | |
579 | return 0xFF; | |
580 | /* | |
581 | * The cpus in the mask must all be on the apic cluster. If are not | |
582 | * on the same apicid cluster return default value of target_cpus(): | |
583 | */ | |
584 | cpu = cpumask_first(cpumask); | |
585 | apicid = es7000_cpu_to_logical_apicid(cpu); | |
586 | ||
587 | while (cpus_found < num_bits_set) { | |
588 | if (cpumask_test_cpu(cpu, cpumask)) { | |
589 | int new_apicid = es7000_cpu_to_logical_apicid(cpu); | |
590 | ||
b9e0d1aa | 591 | if (APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) { |
7da18ed9 | 592 | WARN(1, "Not a valid mask!"); |
2e096df8 IM |
593 | |
594 | return 0xFF; | |
595 | } | |
596 | apicid = new_apicid; | |
597 | cpus_found++; | |
598 | } | |
599 | cpu++; | |
600 | } | |
601 | return apicid; | |
602 | } | |
603 | ||
604 | static unsigned int es7000_cpu_mask_to_apicid(const cpumask_t *cpumask) | |
605 | { | |
606 | int cpus_found = 0; | |
607 | int num_bits_set; | |
608 | int apicid; | |
609 | int cpu; | |
610 | ||
611 | num_bits_set = cpus_weight(*cpumask); | |
612 | /* Return id to all */ | |
613 | if (num_bits_set == nr_cpu_ids) | |
614 | return es7000_cpu_to_logical_apicid(0); | |
615 | /* | |
616 | * The cpus in the mask must all be on the apic cluster. If are not | |
617 | * on the same apicid cluster return default value of target_cpus(): | |
618 | */ | |
619 | cpu = first_cpu(*cpumask); | |
620 | apicid = es7000_cpu_to_logical_apicid(cpu); | |
621 | while (cpus_found < num_bits_set) { | |
622 | if (cpu_isset(cpu, *cpumask)) { | |
623 | int new_apicid = es7000_cpu_to_logical_apicid(cpu); | |
624 | ||
b9e0d1aa | 625 | if (APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) { |
352887d1 | 626 | printk("%s: Not a valid mask!\n", __func__); |
2e096df8 IM |
627 | |
628 | return es7000_cpu_to_logical_apicid(0); | |
629 | } | |
630 | apicid = new_apicid; | |
631 | cpus_found++; | |
632 | } | |
633 | cpu++; | |
634 | } | |
635 | return apicid; | |
636 | } | |
637 | ||
638 | static unsigned int | |
639 | es7000_cpu_mask_to_apicid_and(const struct cpumask *inmask, | |
640 | const struct cpumask *andmask) | |
641 | { | |
642 | int apicid = es7000_cpu_to_logical_apicid(0); | |
643 | cpumask_var_t cpumask; | |
644 | ||
645 | if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC)) | |
646 | return apicid; | |
647 | ||
648 | cpumask_and(cpumask, inmask, andmask); | |
649 | cpumask_and(cpumask, cpumask, cpu_online_mask); | |
650 | apicid = es7000_cpu_mask_to_apicid(cpumask); | |
651 | ||
652 | free_cpumask_var(cpumask); | |
653 | ||
654 | return apicid; | |
655 | } | |
656 | ||
657 | static int es7000_phys_pkg_id(int cpuid_apic, int index_msb) | |
658 | { | |
659 | return cpuid_apic >> index_msb; | |
660 | } | |
661 | ||
be163a15 | 662 | void __init es7000_update_apic_to_cluster(void) |
2e096df8 IM |
663 | { |
664 | apic->target_cpus = target_cpus_cluster; | |
352887d1 IM |
665 | apic->irq_delivery_mode = dest_LowestPrio; |
666 | /* logical delivery broadcast to all procs: */ | |
667 | apic->irq_dest_mode = 1; | |
2e096df8 IM |
668 | |
669 | apic->init_apic_ldr = es7000_init_apic_ldr_cluster; | |
670 | ||
671 | apic->cpu_mask_to_apicid = es7000_cpu_mask_to_apicid_cluster; | |
672 | } | |
673 | ||
674 | static int probe_es7000(void) | |
675 | { | |
676 | /* probed later in mptable/ACPI hooks */ | |
677 | return 0; | |
678 | } | |
679 | ||
680 | static __init int | |
681 | es7000_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid) | |
682 | { | |
683 | if (mpc->oemptr) { | |
684 | struct mpc_oemtable *oem_table = | |
685 | (struct mpc_oemtable *)mpc->oemptr; | |
686 | ||
687 | if (!strncmp(oem, "UNISYS", 6)) | |
688 | return parse_unisys_oem((char *)oem_table); | |
689 | } | |
690 | return 0; | |
691 | } | |
692 | ||
2e096df8 | 693 | |
be163a15 | 694 | struct apic apic_es7000 = { |
2e096df8 IM |
695 | |
696 | .name = "es7000", | |
697 | .probe = probe_es7000, | |
698 | .acpi_madt_oem_check = es7000_acpi_madt_oem_check, | |
699 | .apic_id_registered = es7000_apic_id_registered, | |
700 | ||
701 | .irq_delivery_mode = dest_Fixed, | |
702 | /* phys delivery to target CPUs: */ | |
703 | .irq_dest_mode = 0, | |
704 | ||
705 | .target_cpus = es7000_target_cpus, | |
706 | .disable_esr = 1, | |
707 | .dest_logical = 0, | |
708 | .check_apicid_used = es7000_check_apicid_used, | |
709 | .check_apicid_present = es7000_check_apicid_present, | |
710 | ||
711 | .vector_allocation_domain = es7000_vector_allocation_domain, | |
712 | .init_apic_ldr = es7000_init_apic_ldr, | |
713 | ||
714 | .ioapic_phys_id_map = es7000_ioapic_phys_id_map, | |
715 | .setup_apic_routing = es7000_setup_apic_routing, | |
716 | .multi_timer_check = NULL, | |
717 | .apicid_to_node = es7000_apicid_to_node, | |
718 | .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid, | |
719 | .cpu_present_to_apicid = es7000_cpu_present_to_apicid, | |
720 | .apicid_to_cpu_present = es7000_apicid_to_cpu_present, | |
721 | .setup_portio_remap = NULL, | |
722 | .check_phys_apicid_present = es7000_check_phys_apicid_present, | |
723 | .enable_apic_mode = es7000_enable_apic_mode, | |
724 | .phys_pkg_id = es7000_phys_pkg_id, | |
725 | .mps_oem_check = es7000_mps_oem_check, | |
726 | ||
727 | .get_apic_id = es7000_get_apic_id, | |
728 | .set_apic_id = NULL, | |
729 | .apic_id_mask = 0xFF << 24, | |
730 | ||
731 | .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid, | |
732 | .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and, | |
733 | ||
734 | .send_IPI_mask = es7000_send_IPI_mask, | |
735 | .send_IPI_mask_allbutself = NULL, | |
736 | .send_IPI_allbutself = es7000_send_IPI_allbutself, | |
737 | .send_IPI_all = es7000_send_IPI_all, | |
6b64ee02 | 738 | .send_IPI_self = default_send_IPI_self, |
2e096df8 IM |
739 | |
740 | .wakeup_cpu = NULL, | |
741 | ||
742 | .trampoline_phys_low = 0x467, | |
743 | .trampoline_phys_high = 0x469, | |
744 | ||
745 | .wait_for_init_deassert = es7000_wait_for_init_deassert, | |
746 | ||
747 | /* Nothing to do for most platforms, since cleared by the INIT cycle: */ | |
748 | .smp_callin_clear_local_apic = NULL, | |
2e096df8 | 749 | .inquire_remote_apic = default_inquire_remote_apic, |
c1eeb2de YL |
750 | |
751 | .read = native_apic_mem_read, | |
752 | .write = native_apic_mem_write, | |
753 | .icr_read = native_apic_icr_read, | |
754 | .icr_write = native_apic_icr_write, | |
755 | .wait_icr_idle = native_apic_wait_icr_idle, | |
756 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | |
2e096df8 | 757 | }; |