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Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * NMI watchdog support on APIC systems |
3 | * | |
4 | * Started by Ingo Molnar <mingo@redhat.com> | |
5 | * | |
6 | * Fixes: | |
7 | * Mikael Pettersson : AMD K7 support for local APIC NMI watchdog. | |
8 | * Mikael Pettersson : Power Management for local APIC NMI watchdog. | |
1da177e4 | 9 | * Mikael Pettersson : Pentium 4 support for local APIC NMI watchdog. |
1da177e4 LT |
10 | * Pavel Machek and |
11 | * Mikael Pettersson : PM converted to driver model. Disable/enable API. | |
12 | */ | |
13 | ||
7b6aa335 | 14 | #include <asm/apic.h> |
3d1ba1da | 15 | |
bb81a09e | 16 | #include <linux/nmi.h> |
1da177e4 | 17 | #include <linux/mm.h> |
1da177e4 | 18 | #include <linux/delay.h> |
1da177e4 | 19 | #include <linux/interrupt.h> |
1da177e4 | 20 | #include <linux/module.h> |
5a0e3ad6 | 21 | #include <linux/slab.h> |
1da177e4 | 22 | #include <linux/sysdev.h> |
1da177e4 | 23 | #include <linux/sysctl.h> |
3e4ff115 | 24 | #include <linux/percpu.h> |
eddb6fb9 | 25 | #include <linux/kprobes.h> |
bb81a09e | 26 | #include <linux/cpumask.h> |
f8b5035b | 27 | #include <linux/kernel_stat.h> |
1eeb66a1 | 28 | #include <linux/kdebug.h> |
88ff0a47 | 29 | #include <linux/smp.h> |
1da177e4 | 30 | |
35542c5e MR |
31 | #include <asm/i8259.h> |
32 | #include <asm/io_apic.h> | |
1da177e4 | 33 | #include <asm/proto.h> |
6e908947 | 34 | #include <asm/timer.h> |
1da177e4 | 35 | |
553f265f | 36 | #include <asm/mce.h> |
1da177e4 | 37 | |
1164dd00 | 38 | #include <asm/mach_traps.h> |
e32ede19 | 39 | |
29cbc78b AK |
40 | int unknown_nmi_panic; |
41 | int nmi_watchdog_enabled; | |
29cbc78b | 42 | |
ce7c4271 RR |
43 | /* For reliability, we're prepared to waste bits here. */ |
44 | static DECLARE_BITMAP(backtrace_mask, NR_CPUS) __read_mostly; | |
828f0afd | 45 | |
1da177e4 | 46 | /* nmi_active: |
f2802e7f DZ |
47 | * >0: the lapic NMI watchdog is active, but can be disabled |
48 | * <0: the lapic NMI watchdog has not been set up, and cannot | |
1da177e4 | 49 | * be enabled |
f2802e7f | 50 | * 0: the lapic NMI watchdog is disabled, but can be enabled |
1da177e4 | 51 | */ |
f2802e7f | 52 | atomic_t nmi_active = ATOMIC_INIT(0); /* oprofile uses this */ |
88ff0a47 | 53 | EXPORT_SYMBOL(nmi_active); |
1da177e4 | 54 | |
c376d454 | 55 | unsigned int nmi_watchdog = NMI_NONE; |
88ff0a47 HS |
56 | EXPORT_SYMBOL(nmi_watchdog); |
57 | ||
58 | static int panic_on_timeout; | |
1da177e4 | 59 | |
1798bc22 | 60 | static unsigned int nmi_hz = HZ; |
05cb007d | 61 | static DEFINE_PER_CPU(short, wd_enabled); |
88ff0a47 | 62 | static int endflag __initdata; |
92715e28 | 63 | |
fd5cea02 CG |
64 | static inline unsigned int get_nmi_count(int cpu) |
65 | { | |
1b437c8c | 66 | return per_cpu(irq_stat, cpu).__nmi_count; |
fd5cea02 CG |
67 | } |
68 | ||
69 | static inline int mce_in_progress(void) | |
70 | { | |
c1ebf835 | 71 | #if defined(CONFIG_X86_MCE) |
1798bc22 CG |
72 | return atomic_read(&mce_entry) > 0; |
73 | #endif | |
fd5cea02 CG |
74 | return 0; |
75 | } | |
76 | ||
77 | /* | |
78 | * Take the local apic timer and PIT/HPET into account. We don't | |
79 | * know which one is active, when we have highres/dyntick on | |
80 | */ | |
81 | static inline unsigned int get_timer_irqs(int cpu) | |
82 | { | |
83 | return per_cpu(irq_stat, cpu).apic_timer_irqs + | |
84 | per_cpu(irq_stat, cpu).irq0_irqs; | |
85 | } | |
1da177e4 | 86 | |
75152114 | 87 | #ifdef CONFIG_SMP |
1798bc22 CG |
88 | /* |
89 | * The performance counters used by NMI_LOCAL_APIC don't trigger when | |
75152114 AK |
90 | * the CPU is idle. To make sure the NMI watchdog really ticks on all |
91 | * CPUs during the test make them busy. | |
92 | */ | |
93 | static __init void nmi_cpu_busy(void *data) | |
1da177e4 | 94 | { |
366c7f55 | 95 | local_irq_enable_in_hardirq(); |
1798bc22 CG |
96 | /* |
97 | * Intentionally don't use cpu_relax here. This is | |
98 | * to make sure that the performance counter really ticks, | |
99 | * even if there is a simulator or similar that catches the | |
100 | * pause instruction. On a real HT machine this is fine because | |
101 | * all other CPUs are busy with "useless" delay loops and don't | |
102 | * care if they get somewhat less cycles. | |
103 | */ | |
92715e28 RT |
104 | while (endflag == 0) |
105 | mb(); | |
1da177e4 | 106 | } |
75152114 | 107 | #endif |
1da177e4 | 108 | |
2c1b284e | 109 | static void report_broken_nmi(int cpu, unsigned int *prev_nmi_count) |
8bb85190 IM |
110 | { |
111 | printk(KERN_CONT "\n"); | |
112 | ||
113 | printk(KERN_WARNING | |
114 | "WARNING: CPU#%d: NMI appears to be stuck (%d->%d)!\n", | |
115 | cpu, prev_nmi_count[cpu], get_nmi_count(cpu)); | |
116 | ||
117 | printk(KERN_WARNING | |
118 | "Please report this to bugzilla.kernel.org,\n"); | |
119 | printk(KERN_WARNING | |
120 | "and attach the output of the 'dmesg' command.\n"); | |
121 | ||
122 | per_cpu(wd_enabled, cpu) = 0; | |
123 | atomic_dec(&nmi_active); | |
124 | } | |
125 | ||
7d5a78cd AR |
126 | static void __acpi_nmi_disable(void *__unused) |
127 | { | |
128 | apic_write(APIC_LVT0, APIC_DM_NMI | APIC_LVT_MASKED); | |
129 | } | |
130 | ||
416b7218 | 131 | int __init check_nmi_watchdog(void) |
1da177e4 | 132 | { |
29b70081 | 133 | unsigned int *prev_nmi_count; |
1da177e4 LT |
134 | int cpu; |
135 | ||
4de00436 | 136 | if (!nmi_watchdog_active() || !atomic_read(&nmi_active)) |
f2802e7f DZ |
137 | return 0; |
138 | ||
7496b606 | 139 | prev_nmi_count = kmalloc(nr_cpu_ids * sizeof(int), GFP_KERNEL); |
416b7218 | 140 | if (!prev_nmi_count) |
35542c5e | 141 | goto error; |
1da177e4 | 142 | |
416b7218 | 143 | printk(KERN_INFO "Testing NMI watchdog ... "); |
ac6b931c | 144 | |
7554c3f0 | 145 | #ifdef CONFIG_SMP |
75152114 | 146 | if (nmi_watchdog == NMI_LOCAL_APIC) |
8691e5a8 | 147 | smp_call_function(nmi_cpu_busy, (void *)&endflag, 0); |
7554c3f0 | 148 | #endif |
1da177e4 | 149 | |
c8912599 | 150 | for_each_possible_cpu(cpu) |
fd5cea02 | 151 | prev_nmi_count[cpu] = get_nmi_count(cpu); |
1da177e4 | 152 | local_irq_enable(); |
1798bc22 | 153 | mdelay((20 * 1000) / nmi_hz); /* wait 20 ticks */ |
1da177e4 | 154 | |
394e3902 | 155 | for_each_online_cpu(cpu) { |
05cb007d | 156 | if (!per_cpu(wd_enabled, cpu)) |
f2802e7f | 157 | continue; |
8bb85190 IM |
158 | if (get_nmi_count(cpu) - prev_nmi_count[cpu] <= 5) |
159 | report_broken_nmi(cpu, prev_nmi_count); | |
1da177e4 | 160 | } |
416b7218 | 161 | endflag = 1; |
f2802e7f | 162 | if (!atomic_read(&nmi_active)) { |
416b7218 | 163 | kfree(prev_nmi_count); |
f2802e7f | 164 | atomic_set(&nmi_active, -1); |
35542c5e | 165 | goto error; |
f2802e7f | 166 | } |
1da177e4 LT |
167 | printk("OK.\n"); |
168 | ||
1798bc22 CG |
169 | /* |
170 | * now that we know it works we can reduce NMI frequency to | |
171 | * something more reasonable; makes a difference in some configs | |
172 | */ | |
05cb007d AK |
173 | if (nmi_watchdog == NMI_LOCAL_APIC) |
174 | nmi_hz = lapic_adjust_nmi_hz(1); | |
1da177e4 | 175 | |
416b7218 | 176 | kfree(prev_nmi_count); |
1da177e4 | 177 | return 0; |
35542c5e | 178 | error: |
7d5a78cd AR |
179 | if (nmi_watchdog == NMI_IO_APIC) { |
180 | if (!timer_through_8259) | |
4305df94 | 181 | legacy_pic->mask(0); |
7d5a78cd AR |
182 | on_each_cpu(__acpi_nmi_disable, NULL, 1); |
183 | } | |
184 | ||
5b4d2386 MR |
185 | #ifdef CONFIG_X86_32 |
186 | timer_ack = 0; | |
187 | #endif | |
35542c5e | 188 | return -1; |
1da177e4 LT |
189 | } |
190 | ||
867ab545 | 191 | static int __init setup_nmi_watchdog(char *str) |
1da177e4 | 192 | { |
2b6addad | 193 | unsigned int nmi; |
1da177e4 | 194 | |
d1b946b9 | 195 | if (!strncmp(str, "panic", 5)) { |
1da177e4 LT |
196 | panic_on_timeout = 1; |
197 | str = strchr(str, ','); | |
198 | if (!str) | |
199 | return 1; | |
200 | ++str; | |
201 | } | |
202 | ||
b062f841 CG |
203 | if (!strncmp(str, "lapic", 5)) |
204 | nmi_watchdog = NMI_LOCAL_APIC; | |
205 | else if (!strncmp(str, "ioapic", 6)) | |
206 | nmi_watchdog = NMI_IO_APIC; | |
207 | else { | |
208 | get_option(&str, &nmi); | |
209 | if (nmi >= NMI_INVALID) | |
210 | return 0; | |
211 | nmi_watchdog = nmi; | |
212 | } | |
f2802e7f | 213 | |
1da177e4 LT |
214 | return 1; |
215 | } | |
1da177e4 LT |
216 | __setup("nmi_watchdog=", setup_nmi_watchdog); |
217 | ||
1798bc22 CG |
218 | /* |
219 | * Suspend/resume support | |
220 | */ | |
1da177e4 LT |
221 | #ifdef CONFIG_PM |
222 | ||
223 | static int nmi_pm_active; /* nmi_active before suspend */ | |
224 | ||
829ca9a3 | 225 | static int lapic_nmi_suspend(struct sys_device *dev, pm_message_t state) |
1da177e4 | 226 | { |
4038f901 | 227 | /* only CPU0 goes here, other CPUs should be offline */ |
f2802e7f | 228 | nmi_pm_active = atomic_read(&nmi_active); |
4038f901 SL |
229 | stop_apic_nmi_watchdog(NULL); |
230 | BUG_ON(atomic_read(&nmi_active) != 0); | |
1da177e4 LT |
231 | return 0; |
232 | } | |
233 | ||
234 | static int lapic_nmi_resume(struct sys_device *dev) | |
235 | { | |
4038f901 SL |
236 | /* only CPU0 goes here, other CPUs should be offline */ |
237 | if (nmi_pm_active > 0) { | |
238 | setup_apic_nmi_watchdog(NULL); | |
239 | touch_nmi_watchdog(); | |
240 | } | |
1da177e4 LT |
241 | return 0; |
242 | } | |
243 | ||
244 | static struct sysdev_class nmi_sysclass = { | |
af5ca3f4 | 245 | .name = "lapic_nmi", |
1da177e4 LT |
246 | .resume = lapic_nmi_resume, |
247 | .suspend = lapic_nmi_suspend, | |
248 | }; | |
249 | ||
250 | static struct sys_device device_lapic_nmi = { | |
416b7218 | 251 | .id = 0, |
1da177e4 LT |
252 | .cls = &nmi_sysclass, |
253 | }; | |
254 | ||
255 | static int __init init_lapic_nmi_sysfs(void) | |
256 | { | |
257 | int error; | |
258 | ||
1798bc22 CG |
259 | /* |
260 | * should really be a BUG_ON but b/c this is an | |
f2802e7f DZ |
261 | * init call, it just doesn't work. -dcz |
262 | */ | |
263 | if (nmi_watchdog != NMI_LOCAL_APIC) | |
264 | return 0; | |
265 | ||
416b7218 | 266 | if (atomic_read(&nmi_active) < 0) |
1da177e4 LT |
267 | return 0; |
268 | ||
269 | error = sysdev_class_register(&nmi_sysclass); | |
270 | if (!error) | |
271 | error = sysdev_register(&device_lapic_nmi); | |
272 | return error; | |
273 | } | |
1798bc22 | 274 | |
1da177e4 LT |
275 | /* must come after the local APIC's device_initcall() */ |
276 | late_initcall(init_lapic_nmi_sysfs); | |
277 | ||
278 | #endif /* CONFIG_PM */ | |
279 | ||
416b7218 HS |
280 | static void __acpi_nmi_enable(void *__unused) |
281 | { | |
593f4a78 | 282 | apic_write(APIC_LVT0, APIC_DM_NMI); |
416b7218 HS |
283 | } |
284 | ||
285 | /* | |
286 | * Enable timer based NMIs on all CPUs: | |
287 | */ | |
288 | void acpi_nmi_enable(void) | |
289 | { | |
290 | if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) | |
15c8b6c1 | 291 | on_each_cpu(__acpi_nmi_enable, NULL, 1); |
416b7218 HS |
292 | } |
293 | ||
416b7218 HS |
294 | /* |
295 | * Disable timer based NMIs on all CPUs: | |
296 | */ | |
297 | void acpi_nmi_disable(void) | |
298 | { | |
299 | if (atomic_read(&nmi_active) && nmi_watchdog == NMI_IO_APIC) | |
15c8b6c1 | 300 | on_each_cpu(__acpi_nmi_disable, NULL, 1); |
416b7218 HS |
301 | } |
302 | ||
b3e15bde AR |
303 | /* |
304 | * This function is called as soon the LAPIC NMI watchdog driver has everything | |
305 | * in place and it's ready to check if the NMIs belong to the NMI watchdog | |
306 | */ | |
307 | void cpu_nmi_set_wd_enabled(void) | |
308 | { | |
309 | __get_cpu_var(wd_enabled) = 1; | |
310 | } | |
311 | ||
f2802e7f DZ |
312 | void setup_apic_nmi_watchdog(void *unused) |
313 | { | |
416b7218 | 314 | if (__get_cpu_var(wd_enabled)) |
4038f901 SL |
315 | return; |
316 | ||
317 | /* cheap hack to support suspend/resume */ | |
318 | /* if cpu0 is not active neither should the other cpus */ | |
1798bc22 | 319 | if (smp_processor_id() != 0 && atomic_read(&nmi_active) <= 0) |
4038f901 SL |
320 | return; |
321 | ||
05cb007d AK |
322 | switch (nmi_watchdog) { |
323 | case NMI_LOCAL_APIC: | |
05cb007d AK |
324 | if (lapic_watchdog_init(nmi_hz) < 0) { |
325 | __get_cpu_var(wd_enabled) = 0; | |
75152114 | 326 | return; |
f2802e7f | 327 | } |
05cb007d AK |
328 | /* FALL THROUGH */ |
329 | case NMI_IO_APIC: | |
330 | __get_cpu_var(wd_enabled) = 1; | |
331 | atomic_inc(&nmi_active); | |
f2802e7f | 332 | } |
f2802e7f | 333 | } |
75152114 | 334 | |
4038f901 | 335 | void stop_apic_nmi_watchdog(void *unused) |
f2802e7f DZ |
336 | { |
337 | /* only support LOCAL and IO APICs for now */ | |
4de00436 | 338 | if (!nmi_watchdog_active()) |
1798bc22 | 339 | return; |
05cb007d | 340 | if (__get_cpu_var(wd_enabled) == 0) |
4038f901 | 341 | return; |
05cb007d AK |
342 | if (nmi_watchdog == NMI_LOCAL_APIC) |
343 | lapic_watchdog_stop(); | |
6f290b4e AR |
344 | else |
345 | __acpi_nmi_disable(NULL); | |
05cb007d | 346 | __get_cpu_var(wd_enabled) = 0; |
f2802e7f | 347 | atomic_dec(&nmi_active); |
1da177e4 LT |
348 | } |
349 | ||
350 | /* | |
351 | * the best way to detect whether a CPU has a 'hard lockup' problem | |
352 | * is to check it's local APIC timer IRQ counts. If they are not | |
353 | * changing then that CPU has some problem. | |
354 | * | |
355 | * as these watchdog NMI IRQs are generated on every CPU, we only | |
356 | * have to check the current processor. | |
1da177e4 LT |
357 | * |
358 | * since NMIs don't listen to _any_ locks, we have to be extremely | |
359 | * careful not to rely on unsafe variables. The printk might lock | |
360 | * up though, so we have to break up any console locks first ... | |
1798bc22 | 361 | * [when there will be more tty-related locks, break them up here too!] |
1da177e4 LT |
362 | */ |
363 | ||
75152114 | 364 | static DEFINE_PER_CPU(unsigned, last_irq_sum); |
494f6a9e | 365 | static DEFINE_PER_CPU(long, alert_counter); |
75152114 | 366 | static DEFINE_PER_CPU(int, nmi_touch); |
1da177e4 | 367 | |
567f3e42 | 368 | void touch_nmi_watchdog(void) |
1da177e4 | 369 | { |
4de00436 | 370 | if (nmi_watchdog_active()) { |
99019e91 | 371 | unsigned cpu; |
1da177e4 | 372 | |
99019e91 | 373 | /* |
f784946d | 374 | * Tell other CPUs to reset their alert counters. We cannot |
99019e91 JB |
375 | * do it ourselves because the alert count increase is not |
376 | * atomic. | |
377 | */ | |
567f3e42 AM |
378 | for_each_present_cpu(cpu) { |
379 | if (per_cpu(nmi_touch, cpu) != 1) | |
380 | per_cpu(nmi_touch, cpu) = 1; | |
381 | } | |
99019e91 | 382 | } |
8446f1d3 | 383 | |
8446f1d3 IM |
384 | /* |
385 | * Tickle the softlockup detector too: | |
386 | */ | |
416b7218 | 387 | touch_softlockup_watchdog(); |
1da177e4 | 388 | } |
416b7218 | 389 | EXPORT_SYMBOL(touch_nmi_watchdog); |
1da177e4 | 390 | |
5deb45e3 SR |
391 | notrace __kprobes int |
392 | nmi_watchdog_tick(struct pt_regs *regs, unsigned reason) | |
1da177e4 | 393 | { |
1da177e4 LT |
394 | /* |
395 | * Since current_thread_info()-> is always on the stack, and we | |
396 | * always switch the stack NMI-atomically, it's safe to use | |
397 | * smp_processor_id(). | |
398 | */ | |
b791ccef | 399 | unsigned int sum; |
75152114 | 400 | int touched = 0; |
bb81a09e | 401 | int cpu = smp_processor_id(); |
05cb007d | 402 | int rc = 0; |
f2802e7f | 403 | |
fd5cea02 CG |
404 | sum = get_timer_irqs(cpu); |
405 | ||
75152114 AK |
406 | if (__get_cpu_var(nmi_touch)) { |
407 | __get_cpu_var(nmi_touch) = 0; | |
408 | touched = 1; | |
409 | } | |
f2802e7f | 410 | |
2f537a9f | 411 | /* We can be called before check_nmi_watchdog, hence NULL check. */ |
ce7c4271 | 412 | if (cpumask_test_cpu(cpu, to_cpumask(backtrace_mask))) { |
0fdc7a80 | 413 | static DEFINE_RAW_SPINLOCK(lock); /* Serialise the printks */ |
bb81a09e | 414 | |
0fdc7a80 | 415 | raw_spin_lock(&lock); |
88ff0a47 | 416 | printk(KERN_WARNING "NMI backtrace for cpu %d\n", cpu); |
c1dc0b9c | 417 | show_regs(regs); |
bb81a09e | 418 | dump_stack(); |
0fdc7a80 | 419 | raw_spin_unlock(&lock); |
ce7c4271 | 420 | cpumask_clear_cpu(cpu, to_cpumask(backtrace_mask)); |
c1dc0b9c IM |
421 | |
422 | rc = 1; | |
bb81a09e AM |
423 | } |
424 | ||
fd5cea02 CG |
425 | /* Could check oops_in_progress here too, but it's safer not to */ |
426 | if (mce_in_progress()) | |
553f265f | 427 | touched = 1; |
1da177e4 | 428 | |
f8b5035b | 429 | /* if the none of the timers isn't firing, this cpu isn't doing much */ |
75152114 | 430 | if (!touched && __get_cpu_var(last_irq_sum) == sum) { |
1da177e4 LT |
431 | /* |
432 | * Ayiee, looks like this CPU is stuck ... | |
433 | * wait a few IRQs (5 seconds) before doing the oops ... | |
434 | */ | |
dd17c8f7 RR |
435 | __this_cpu_inc(alert_counter); |
436 | if (__this_cpu_read(alert_counter) == 5 * nmi_hz) | |
748f2edb GA |
437 | /* |
438 | * die_nmi will return ONLY if NOTIFY_STOP happens.. | |
439 | */ | |
ddca03c9 | 440 | die_nmi("BUG: NMI Watchdog detected LOCKUP", |
d1b946b9 | 441 | regs, panic_on_timeout); |
1da177e4 | 442 | } else { |
75152114 | 443 | __get_cpu_var(last_irq_sum) = sum; |
dd17c8f7 | 444 | __this_cpu_write(alert_counter, 0); |
1da177e4 | 445 | } |
f2802e7f DZ |
446 | |
447 | /* see if the nmi watchdog went off */ | |
05cb007d AK |
448 | if (!__get_cpu_var(wd_enabled)) |
449 | return rc; | |
450 | switch (nmi_watchdog) { | |
451 | case NMI_LOCAL_APIC: | |
452 | rc |= lapic_wd_event(nmi_hz); | |
453 | break; | |
454 | case NMI_IO_APIC: | |
1798bc22 CG |
455 | /* |
456 | * don't know how to accurately check for this. | |
05cb007d AK |
457 | * just assume it was a watchdog timer interrupt |
458 | * This matches the old behaviour. | |
459 | */ | |
460 | rc = 1; | |
461 | break; | |
75152114 | 462 | } |
3adbbcce | 463 | return rc; |
1da177e4 LT |
464 | } |
465 | ||
1da177e4 LT |
466 | #ifdef CONFIG_SYSCTL |
467 | ||
6f290b4e AR |
468 | static void enable_ioapic_nmi_watchdog_single(void *unused) |
469 | { | |
470 | __get_cpu_var(wd_enabled) = 1; | |
471 | atomic_inc(&nmi_active); | |
472 | __acpi_nmi_enable(NULL); | |
473 | } | |
474 | ||
475 | static void enable_ioapic_nmi_watchdog(void) | |
476 | { | |
477 | on_each_cpu(enable_ioapic_nmi_watchdog_single, NULL, 1); | |
478 | touch_nmi_watchdog(); | |
479 | } | |
480 | ||
481 | static void disable_ioapic_nmi_watchdog(void) | |
482 | { | |
483 | on_each_cpu(stop_apic_nmi_watchdog, NULL, 1); | |
484 | } | |
485 | ||
e3a61b0a | 486 | static int __init setup_unknown_nmi_panic(char *str) |
8f4e956b | 487 | { |
e3a61b0a SA |
488 | unknown_nmi_panic = 1; |
489 | return 1; | |
8f4e956b | 490 | } |
e3a61b0a | 491 | __setup("unknown_nmi_panic", setup_unknown_nmi_panic); |
1da177e4 LT |
492 | |
493 | static int unknown_nmi_panic_callback(struct pt_regs *regs, int cpu) | |
494 | { | |
495 | unsigned char reason = get_nmi_reason(); | |
496 | char buf[64]; | |
497 | ||
2fbe7b25 | 498 | sprintf(buf, "NMI received for unknown reason %02x\n", reason); |
6c8decdf | 499 | die_nmi(buf, regs, 1); /* Always panic here */ |
1da177e4 LT |
500 | return 0; |
501 | } | |
502 | ||
407984f1 DZ |
503 | /* |
504 | * proc handler for /proc/sys/kernel/nmi | |
505 | */ | |
8d65af78 | 506 | int proc_nmi_enabled(struct ctl_table *table, int write, |
407984f1 DZ |
507 | void __user *buffer, size_t *length, loff_t *ppos) |
508 | { | |
509 | int old_state; | |
510 | ||
511 | nmi_watchdog_enabled = (atomic_read(&nmi_active) > 0) ? 1 : 0; | |
512 | old_state = nmi_watchdog_enabled; | |
8d65af78 | 513 | proc_dointvec(table, write, buffer, length, ppos); |
407984f1 DZ |
514 | if (!!old_state == !!nmi_watchdog_enabled) |
515 | return 0; | |
516 | ||
4de00436 | 517 | if (atomic_read(&nmi_active) < 0 || !nmi_watchdog_active()) { |
1798bc22 CG |
518 | printk(KERN_WARNING |
519 | "NMI watchdog is permanently disabled\n"); | |
e33e89ab | 520 | return -EIO; |
407984f1 DZ |
521 | } |
522 | ||
e33e89ab | 523 | if (nmi_watchdog == NMI_LOCAL_APIC) { |
407984f1 DZ |
524 | if (nmi_watchdog_enabled) |
525 | enable_lapic_nmi_watchdog(); | |
526 | else | |
527 | disable_lapic_nmi_watchdog(); | |
6f290b4e AR |
528 | } else if (nmi_watchdog == NMI_IO_APIC) { |
529 | if (nmi_watchdog_enabled) | |
530 | enable_ioapic_nmi_watchdog(); | |
531 | else | |
532 | disable_ioapic_nmi_watchdog(); | |
407984f1 | 533 | } else { |
1798bc22 | 534 | printk(KERN_WARNING |
407984f1 DZ |
535 | "NMI watchdog doesn't know what hardware to touch\n"); |
536 | return -EIO; | |
537 | } | |
538 | return 0; | |
539 | } | |
540 | ||
1798bc22 | 541 | #endif /* CONFIG_SYSCTL */ |
1da177e4 | 542 | |
a062bae9 LZ |
543 | int do_nmi_callback(struct pt_regs *regs, int cpu) |
544 | { | |
545 | #ifdef CONFIG_SYSCTL | |
546 | if (unknown_nmi_panic) | |
547 | return unknown_nmi_panic_callback(regs, cpu); | |
548 | #endif | |
549 | return 0; | |
550 | } | |
551 | ||
47cab6a7 | 552 | void arch_trigger_all_cpu_backtrace(void) |
bb81a09e AM |
553 | { |
554 | int i; | |
555 | ||
ce7c4271 | 556 | cpumask_copy(to_cpumask(backtrace_mask), cpu_online_mask); |
c1dc0b9c IM |
557 | |
558 | printk(KERN_INFO "sending NMI to all CPUs:\n"); | |
559 | apic->send_IPI_all(NMI_VECTOR); | |
560 | ||
bb81a09e AM |
561 | /* Wait for up to 10 seconds for all CPUs to do the backtrace */ |
562 | for (i = 0; i < 10 * 1000; i++) { | |
ce7c4271 | 563 | if (cpumask_empty(to_cpumask(backtrace_mask))) |
bb81a09e AM |
564 | break; |
565 | mdelay(1); | |
566 | } | |
567 | } |