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x86/apic: Switch all APICs to Fixed delivery mode
[mirror_ubuntu-bionic-kernel.git] / arch / x86 / kernel / apic / x2apic_cluster.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
12a67cf6
SS
2#include <linux/threads.h>
3#include <linux/cpumask.h>
4#include <linux/string.h>
5#include <linux/kernel.h>
6#include <linux/ctype.h>
1b9b89e7 7#include <linux/dmar.h>
c7d6c9dd 8#include <linux/irq.h>
9d0fa6c5 9#include <linux/cpu.h>
1b9b89e7 10
12a67cf6 11#include <asm/smp.h>
981c2eac 12#include "x2apic.h"
12a67cf6 13
023a6117
TG
14struct cluster_mask {
15 unsigned int clusterid;
16 int node;
17 struct cpumask mask;
18};
19
2de1f33e 20static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
9d0fa6c5 21static DEFINE_PER_CPU(cpumask_var_t, ipi_mask);
023a6117
TG
22static DEFINE_PER_CPU(struct cluster_mask *, cluster_masks);
23static struct cluster_mask *cluster_hotplug_mask;
12a67cf6 24
2caa3715 25static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
1b9b89e7 26{
ef1f87aa 27 return x2apic_enabled();
1b9b89e7
YL
28}
29
7b6ce46c
LT
30static void x2apic_send_IPI(int cpu, int vector)
31{
32 u32 dest = per_cpu(x86_cpu_to_logical_apicid, cpu);
33
34 x2apic_wrmsr_fence();
35 __x2apic_send_IPI_dest(dest, vector, APIC_DEST_LOGICAL);
36}
37
a27d0b5e
SS
38static void
39__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
12a67cf6 40{
023a6117
TG
41 unsigned int cpu, clustercpu;
42 struct cpumask *tmpmsk;
dac5f412 43 unsigned long flags;
9d0fa6c5 44 u32 dest;
12a67cf6 45
ce4e240c 46 x2apic_wrmsr_fence();
12a67cf6 47 local_irq_save(flags);
a27d0b5e 48
023a6117
TG
49 tmpmsk = this_cpu_cpumask_var_ptr(ipi_mask);
50 cpumask_copy(tmpmsk, mask);
51 /* If IPI should not be sent to self, clear current CPU */
52 if (apic_dest != APIC_DEST_ALLINC)
53 cpumask_clear_cpu(smp_processor_id(), tmpmsk);
9d0fa6c5 54
023a6117
TG
55 /* Collapse cpus in a cluster so a single IPI per cluster is sent */
56 for_each_cpu(cpu, tmpmsk) {
57 struct cluster_mask *cmsk = per_cpu(cluster_masks, cpu);
9d0fa6c5 58
9d0fa6c5 59 dest = 0;
023a6117
TG
60 for_each_cpu_and(clustercpu, tmpmsk, &cmsk->mask)
61 dest |= per_cpu(x86_cpu_to_logical_apicid, clustercpu);
9d0fa6c5
CG
62
63 if (!dest)
a27d0b5e 64 continue;
9d0fa6c5
CG
65
66 __x2apic_send_IPI_dest(dest, vector, apic->dest_logical);
023a6117
TG
67 /* Remove cluster CPUs from tmpmask */
68 cpumask_andnot(tmpmsk, tmpmsk, &cmsk->mask);
dac5f412 69 }
a27d0b5e 70
12a67cf6
SS
71 local_irq_restore(flags);
72}
73
a27d0b5e
SS
74static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
75{
76 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
77}
78
dac5f412 79static void
49d0c7a0 80x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
12a67cf6 81{
a27d0b5e 82 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
e7986739 83}
12a67cf6 84
e7986739
MT
85static void x2apic_send_IPI_allbutself(int vector)
86{
a27d0b5e 87 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
12a67cf6
SS
88}
89
90static void x2apic_send_IPI_all(int vector)
91{
a27d0b5e 92 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
12a67cf6
SS
93}
94
9f9e3bb1
TG
95static u32 x2apic_calc_apicid(unsigned int cpu)
96{
97 return per_cpu(x86_cpu_to_logical_apicid, cpu);
98}
99
12a67cf6 100static void init_x2apic_ldr(void)
a39d1f3f 101{
023a6117
TG
102 struct cluster_mask *cmsk = this_cpu_read(cluster_masks);
103 u32 cluster, apicid = apic_read(APIC_LDR);
a39d1f3f
CG
104 unsigned int cpu;
105
023a6117 106 this_cpu_write(x86_cpu_to_logical_apicid, apicid);
a39d1f3f 107
023a6117
TG
108 if (cmsk)
109 goto update;
110
111 cluster = apicid >> 16;
a39d1f3f 112 for_each_online_cpu(cpu) {
023a6117
TG
113 cmsk = per_cpu(cluster_masks, cpu);
114 /* Matching cluster found. Link and update it. */
115 if (cmsk && cmsk->clusterid == cluster)
116 goto update;
a39d1f3f 117 }
023a6117
TG
118 cmsk = cluster_hotplug_mask;
119 cluster_hotplug_mask = NULL;
120update:
121 this_cpu_write(cluster_masks, cmsk);
122 cpumask_set_cpu(smp_processor_id(), &cmsk->mask);
a39d1f3f
CG
123}
124
023a6117 125static int alloc_clustermask(unsigned int cpu, int node)
a39d1f3f 126{
023a6117
TG
127 if (per_cpu(cluster_masks, cpu))
128 return 0;
129 /*
130 * If a hotplug spare mask exists, check whether it's on the right
131 * node. If not, free it and allocate a new one.
132 */
133 if (cluster_hotplug_mask) {
134 if (cluster_hotplug_mask->node == node)
135 return 0;
136 kfree(cluster_hotplug_mask);
137 }
6b2c2847 138
023a6117
TG
139 cluster_hotplug_mask = kzalloc_node(sizeof(*cluster_hotplug_mask),
140 GFP_KERNEL, node);
141 if (!cluster_hotplug_mask)
6b2c2847 142 return -ENOMEM;
023a6117
TG
143 cluster_hotplug_mask->node = node;
144 return 0;
145}
a39d1f3f 146
023a6117
TG
147static int x2apic_prepare_cpu(unsigned int cpu)
148{
149 if (alloc_clustermask(cpu, cpu_to_node(cpu)) < 0)
150 return -ENOMEM;
151 if (!zalloc_cpumask_var(&per_cpu(ipi_mask, cpu), GFP_KERNEL))
152 return -ENOMEM;
6b2c2847 153 return 0;
a39d1f3f
CG
154}
155
023a6117 156static int x2apic_dead_cpu(unsigned int dead_cpu)
12a67cf6 157{
023a6117 158 struct cluster_mask *cmsk = per_cpu(cluster_masks, dead_cpu);
a39d1f3f 159
1e66e2b8 160 cpumask_clear_cpu(dead_cpu, &cmsk->mask);
023a6117 161 free_cpumask_var(per_cpu(ipi_mask, dead_cpu));
6b2c2847 162 return 0;
12a67cf6
SS
163}
164
9ebd680b
SS
165static int x2apic_cluster_probe(void)
166{
6b2c2847 167 if (!x2apic_mode)
a39d1f3f 168 return 0;
6b2c2847 169
023a6117
TG
170 if (cpuhp_setup_state(CPUHP_X2APIC_PREPARE, "x86/x2apic:prepare",
171 x2apic_prepare_cpu, x2apic_dead_cpu) < 0) {
d52c0569
SAS
172 pr_err("Failed to register X2APIC_PREPARE\n");
173 return 0;
174 }
023a6117 175 init_x2apic_ldr();
6b2c2847 176 return 1;
9ebd680b
SS
177}
178
404f6aac 179static struct apic apic_x2apic_cluster __ro_after_init = {
504a3c3a
IM
180
181 .name = "cluster x2apic",
9ebd680b 182 .probe = x2apic_cluster_probe,
504a3c3a 183 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
b7157acf 184 .apic_id_valid = x2apic_apic_id_valid,
504a3c3a
IM
185 .apic_id_registered = x2apic_apic_id_registered,
186
a31e58e1 187 .irq_delivery_mode = dest_Fixed,
0b06e734 188 .irq_dest_mode = 1, /* logical */
504a3c3a 189
08125d3e 190 .disable_esr = 0,
bdb1a9b6 191 .dest_logical = APIC_DEST_LOGICAL,
504a3c3a 192 .check_apicid_used = NULL,
504a3c3a 193
504a3c3a
IM
194 .init_apic_ldr = init_x2apic_ldr,
195
196 .ioapic_phys_id_map = NULL,
197 .setup_apic_routing = NULL,
a21769a4 198 .cpu_present_to_apicid = default_cpu_present_to_apicid,
504a3c3a 199 .apicid_to_cpu_present = NULL,
a27a6210 200 .check_phys_apicid_present = default_check_phys_apicid_present,
79deb8e5 201 .phys_pkg_id = x2apic_phys_pkg_id,
504a3c3a 202
79deb8e5
CG
203 .get_apic_id = x2apic_get_apic_id,
204 .set_apic_id = x2apic_set_apic_id,
504a3c3a 205
9f9e3bb1 206 .calc_dest_apicid = x2apic_calc_apicid,
504a3c3a 207
7b6ce46c 208 .send_IPI = x2apic_send_IPI,
504a3c3a
IM
209 .send_IPI_mask = x2apic_send_IPI_mask,
210 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
211 .send_IPI_allbutself = x2apic_send_IPI_allbutself,
212 .send_IPI_all = x2apic_send_IPI_all,
213 .send_IPI_self = x2apic_send_IPI_self,
214
504a3c3a 215 .inquire_remote_apic = NULL,
c1eeb2de
YL
216
217 .read = native_apic_msr_read,
218 .write = native_apic_msr_write,
0ab711ae 219 .eoi_write = native_apic_msr_eoi_write,
c1eeb2de
YL
220 .icr_read = native_x2apic_icr_read,
221 .icr_write = native_x2apic_icr_write,
222 .wait_icr_idle = native_x2apic_wait_icr_idle,
223 .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
12a67cf6 224};
107e0e0c
SS
225
226apic_driver(apic_x2apic_cluster);