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[mirror_ubuntu-artful-kernel.git] / arch / x86 / kernel / apic / x2apic_phys.c
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1#include <linux/threads.h>
2#include <linux/cpumask.h>
3#include <linux/string.h>
4#include <linux/kernel.h>
5#include <linux/ctype.h>
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6#include <linux/dmar.h>
7
2d9579a1 8#include <asm/smp.h>
79deb8e5 9#include <asm/x2apic.h>
2d9579a1 10
ef1f87aa 11int x2apic_phys;
1b9b89e7 12
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13static struct apic apic_x2apic_phys;
14
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15static int set_x2apic_phys_mode(char *arg)
16{
17 x2apic_phys = 1;
18 return 0;
19}
20early_param("x2apic_phys", set_x2apic_phys_mode);
21
cb214ede 22static bool x2apic_fadt_phys(void)
1b9b89e7 23{
781674fc 24#ifdef CONFIG_ACPI
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25 if ((acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) &&
26 (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
ea0dcf90 27 printk(KERN_DEBUG "System requires x2apic physical mode\n");
cb214ede 28 return true;
ea0dcf90 29 }
781674fc 30#endif
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31 return false;
32}
33
34static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
35{
36 return x2apic_enabled() && (x2apic_phys || x2apic_fadt_phys());
1b9b89e7 37}
2d9579a1 38
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39static void
40__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
2d9579a1 41{
2d9579a1 42 unsigned long query_cpu;
a27d0b5e 43 unsigned long this_cpu;
dac5f412 44 unsigned long flags;
2d9579a1 45
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46 x2apic_wrmsr_fence();
47
2d9579a1 48 local_irq_save(flags);
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49
50 this_cpu = smp_processor_id();
bcda016e 51 for_each_cpu(query_cpu, mask) {
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52 if (apic_dest == APIC_DEST_ALLBUT && this_cpu == query_cpu)
53 continue;
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54 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
55 vector, APIC_DEST_PHYSICAL);
56 }
57 local_irq_restore(flags);
58}
59
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60static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
61{
62 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
63}
64
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65static void
66 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
2d9579a1 67{
a27d0b5e 68 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
e7986739 69}
2d9579a1 70
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71static void x2apic_send_IPI_allbutself(int vector)
72{
a27d0b5e 73 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
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74}
75
76static void x2apic_send_IPI_all(int vector)
77{
a27d0b5e 78 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
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79}
80
4d08d97f 81static void init_x2apic_ldr(void)
2d9579a1 82{
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83}
84
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85static int x2apic_phys_probe(void)
86{
cb214ede 87 if (x2apic_mode && (x2apic_phys || x2apic_fadt_phys()))
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88 return 1;
89
90 return apic == &apic_x2apic_phys;
91}
92
1a8880a1 93static struct apic apic_x2apic_phys = {
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94
95 .name = "physical x2apic",
9ebd680b 96 .probe = x2apic_phys_probe,
05c155c2 97 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
b7157acf 98 .apic_id_valid = x2apic_apic_id_valid,
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99 .apic_id_registered = x2apic_apic_id_registered,
100
f8987a10 101 .irq_delivery_mode = dest_Fixed,
0b06e734 102 .irq_dest_mode = 0, /* physical */
05c155c2 103
bf721d3a 104 .target_cpus = online_target_cpus,
08125d3e 105 .disable_esr = 0,
bdb1a9b6 106 .dest_logical = 0,
05c155c2 107 .check_apicid_used = NULL,
05c155c2 108
9d8e1066 109 .vector_allocation_domain = default_vector_allocation_domain,
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110 .init_apic_ldr = init_x2apic_ldr,
111
112 .ioapic_phys_id_map = NULL,
113 .setup_apic_routing = NULL,
a21769a4 114 .cpu_present_to_apicid = default_cpu_present_to_apicid,
05c155c2 115 .apicid_to_cpu_present = NULL,
a27a6210 116 .check_phys_apicid_present = default_check_phys_apicid_present,
d4c9a9f3 117 .phys_pkg_id = x2apic_phys_pkg_id,
05c155c2 118
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119 .get_apic_id = x2apic_get_apic_id,
120 .set_apic_id = x2apic_set_apic_id,
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121 .apic_id_mask = 0xFFFFFFFFu,
122
6398268d 123 .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and,
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124
125 .send_IPI_mask = x2apic_send_IPI_mask,
126 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
127 .send_IPI_allbutself = x2apic_send_IPI_allbutself,
128 .send_IPI_all = x2apic_send_IPI_all,
129 .send_IPI_self = x2apic_send_IPI_self,
130
465822cf 131 .wait_for_init_deassert = false,
05c155c2 132 .inquire_remote_apic = NULL,
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133
134 .read = native_apic_msr_read,
135 .write = native_apic_msr_write,
0ab711ae 136 .eoi_write = native_apic_msr_eoi_write,
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137 .icr_read = native_x2apic_icr_read,
138 .icr_write = native_x2apic_icr_write,
139 .wait_icr_idle = native_x2apic_wait_icr_idle,
140 .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
2d9579a1 141};
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142
143apic_driver(apic_x2apic_phys);