]>
Commit | Line | Data |
---|---|---|
b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
b82fef82 JB |
2 | /* |
3 | * Generate definitions needed by assembly language modules. | |
4 | * This code generates raw asm output which is post-processed to extract | |
5 | * and format the required data. | |
6 | */ | |
7 | #define COMPILE_OFFSETS | |
8 | ||
9 | #include <linux/crypto.h> | |
10 | #include <linux/sched.h> | |
11 | #include <linux/stddef.h> | |
12 | #include <linux/hardirq.h> | |
13 | #include <linux/suspend.h> | |
14 | #include <linux/kbuild.h> | |
15 | #include <asm/processor.h> | |
16 | #include <asm/thread_info.h> | |
17 | #include <asm/sigframe.h> | |
18 | #include <asm/bootparam.h> | |
19 | #include <asm/suspend.h> | |
6fd166aa | 20 | #include <asm/tlbflush.h> |
b82fef82 JB |
21 | |
22 | #ifdef CONFIG_XEN | |
23 | #include <xen/interface/xen.h> | |
24 | #endif | |
25 | ||
8d0d37cf TG |
26 | #ifdef CONFIG_X86_32 |
27 | # include "asm-offsets_32.c" | |
28 | #else | |
29 | # include "asm-offsets_64.c" | |
6db7016d | 30 | #endif |
b82fef82 | 31 | |
ad3bc25a BP |
32 | static void __used common(void) |
33 | { | |
0100301b BG |
34 | BLANK(); |
35 | OFFSET(TASK_threadsp, task_struct, thread.sp); | |
050e9baa | 36 | #ifdef CONFIG_STACKPROTECTOR |
0100301b BG |
37 | OFFSET(TASK_stack_canary, task_struct, stack_canary); |
38 | #endif | |
39 | ||
b82fef82 JB |
40 | BLANK(); |
41 | OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx); | |
42 | ||
43 | BLANK(); | |
44 | OFFSET(pbe_address, pbe, address); | |
45 | OFFSET(pbe_orig_address, pbe, orig_address); | |
46 | OFFSET(pbe_next, pbe, next); | |
47 | ||
4d178f94 BG |
48 | #if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION) |
49 | BLANK(); | |
8fcb346b IM |
50 | OFFSET(IA32_SIGCONTEXT_ax, sigcontext_32, ax); |
51 | OFFSET(IA32_SIGCONTEXT_bx, sigcontext_32, bx); | |
52 | OFFSET(IA32_SIGCONTEXT_cx, sigcontext_32, cx); | |
53 | OFFSET(IA32_SIGCONTEXT_dx, sigcontext_32, dx); | |
54 | OFFSET(IA32_SIGCONTEXT_si, sigcontext_32, si); | |
55 | OFFSET(IA32_SIGCONTEXT_di, sigcontext_32, di); | |
56 | OFFSET(IA32_SIGCONTEXT_bp, sigcontext_32, bp); | |
57 | OFFSET(IA32_SIGCONTEXT_sp, sigcontext_32, sp); | |
58 | OFFSET(IA32_SIGCONTEXT_ip, sigcontext_32, ip); | |
4d178f94 | 59 | |
4d178f94 BG |
60 | BLANK(); |
61 | OFFSET(IA32_RT_SIGFRAME_sigcontext, rt_sigframe_ia32, uc.uc_mcontext); | |
62 | #endif | |
63 | ||
b82fef82 JB |
64 | #ifdef CONFIG_XEN |
65 | BLANK(); | |
66 | OFFSET(XEN_vcpu_info_mask, vcpu_info, evtchn_upcall_mask); | |
67 | OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending); | |
55aedddb | 68 | OFFSET(XEN_vcpu_info_arch_cr2, vcpu_info, arch.cr2); |
b82fef82 JB |
69 | #endif |
70 | ||
71 | BLANK(); | |
72 | OFFSET(BP_scratch, boot_params, scratch); | |
de8cb458 | 73 | OFFSET(BP_secure_boot, boot_params, secure_boot); |
b82fef82 JB |
74 | OFFSET(BP_loadflags, boot_params, hdr.loadflags); |
75 | OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch); | |
76 | OFFSET(BP_version, boot_params, hdr.version); | |
77 | OFFSET(BP_kernel_alignment, boot_params, hdr.kernel_alignment); | |
974f221c | 78 | OFFSET(BP_init_size, boot_params, hdr.init_size); |
291f3632 | 79 | OFFSET(BP_pref_address, boot_params, hdr.pref_address); |
6783eaa2 AV |
80 | |
81 | BLANK(); | |
82 | DEFINE(PTREGS_SIZE, sizeof(struct pt_regs)); | |
1a79797b | 83 | |
6fd166aa PZ |
84 | /* TLB state for the entry code */ |
85 | OFFSET(TLB_STATE_user_pcid_flush_mask, tlb_state, user_pcid_flush_mask); | |
86 | ||
72f5e08d | 87 | /* Layout info for cpu_entry_area */ |
4fe2d8b1 DH |
88 | OFFSET(CPU_ENTRY_AREA_entry_stack, cpu_entry_area, entry_stack_page); |
89 | DEFINE(SIZEOF_entry_stack, sizeof(struct entry_stack)); | |
45d7b255 | 90 | DEFINE(MASK_entry_stack, (~(sizeof(struct entry_stack) - 1))); |
9e97b73f | 91 | |
98f05b51 | 92 | /* Offset for fields in tss_struct */ |
9e97b73f JR |
93 | OFFSET(TSS_sp0, tss_struct, x86_tss.sp0); |
94 | OFFSET(TSS_sp1, tss_struct, x86_tss.sp1); | |
98f05b51 | 95 | OFFSET(TSS_sp2, tss_struct, x86_tss.sp2); |
b82fef82 | 96 | } |