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Commit | Line | Data |
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dcd32b6a | 1 | #ifndef ARCH_X86_CPU_H |
dcd32b6a | 2 | #define ARCH_X86_CPU_H |
1da177e4 | 3 | |
1da177e4 LT |
4 | /* attempt to consolidate cpu attributes */ |
5 | struct cpu_dev { | |
f2362e6f | 6 | const char *c_vendor; |
1da177e4 LT |
7 | |
8 | /* some have two possibilities for cpuid string */ | |
f2362e6f | 9 | const char *c_ident[2]; |
1da177e4 | 10 | |
f2362e6f | 11 | void (*c_early_init)(struct cpuinfo_x86 *); |
a110b5ec | 12 | void (*c_bsp_init)(struct cpuinfo_x86 *); |
f2362e6f JSR |
13 | void (*c_init)(struct cpuinfo_x86 *); |
14 | void (*c_identify)(struct cpuinfo_x86 *); | |
e0ba94f1 | 15 | void (*c_detect_tlb)(struct cpuinfo_x86 *); |
f2362e6f | 16 | int c_x86_vendor; |
09dc68d9 JB |
17 | #ifdef CONFIG_X86_32 |
18 | /* Optional vendor specific routine to obtain the cache size. */ | |
19 | unsigned int (*legacy_cache_size)(struct cpuinfo_x86 *, | |
20 | unsigned int); | |
21 | ||
22 | /* Family/stepping-based lookup table for model names. */ | |
23 | struct legacy_cpu_model_info { | |
24 | int family; | |
25 | const char *model_names[16]; | |
26 | } legacy_models[5]; | |
27 | #endif | |
1da177e4 LT |
28 | }; |
29 | ||
e0ba94f1 AS |
30 | struct _tlb_table { |
31 | unsigned char descriptor; | |
32 | char tlb_type; | |
33 | unsigned int entries; | |
34 | /* unsigned int ways; */ | |
35 | char info[128]; | |
36 | }; | |
37 | ||
10a434fc | 38 | #define cpu_dev_register(cpu_devX) \ |
02dde8b4 | 39 | static const struct cpu_dev *const __cpu_dev_##cpu_devX __used \ |
10a434fc YL |
40 | __attribute__((__section__(".x86_cpu_dev.init"))) = \ |
41 | &cpu_devX; | |
1da177e4 | 42 | |
02dde8b4 JB |
43 | extern const struct cpu_dev *const __x86_cpu_dev_start[], |
44 | *const __x86_cpu_dev_end[]; | |
03ae5768 | 45 | |
c2b9ff24 | 46 | extern void get_cpu_cap(struct cpuinfo_x86 *c); |
27c13ece | 47 | extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c); |
d059f24a | 48 | #endif /* ARCH_X86_CPU_H */ |