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1da177e4 | 1 | /* |
fe27cb35 | 2 | * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $) |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
6 | * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de> | |
fe27cb35 | 7 | * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com> |
1da177e4 LT |
8 | * |
9 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or (at | |
14 | * your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
19 | * General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along | |
22 | * with this program; if not, write to the Free Software Foundation, Inc., | |
23 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
24 | * | |
25 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
26 | */ | |
27 | ||
1da177e4 LT |
28 | #include <linux/kernel.h> |
29 | #include <linux/module.h> | |
30 | #include <linux/init.h> | |
fe27cb35 VP |
31 | #include <linux/smp.h> |
32 | #include <linux/sched.h> | |
1da177e4 | 33 | #include <linux/cpufreq.h> |
d395bf12 | 34 | #include <linux/compiler.h> |
8adcc0c6 | 35 | #include <linux/dmi.h> |
1da177e4 LT |
36 | |
37 | #include <linux/acpi.h> | |
38 | #include <acpi/processor.h> | |
39 | ||
fe27cb35 | 40 | #include <asm/io.h> |
dde9f7ba | 41 | #include <asm/msr.h> |
fe27cb35 VP |
42 | #include <asm/processor.h> |
43 | #include <asm/cpufeature.h> | |
44 | #include <asm/delay.h> | |
45 | #include <asm/uaccess.h> | |
46 | ||
1da177e4 LT |
47 | #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg) |
48 | ||
49 | MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski"); | |
50 | MODULE_DESCRIPTION("ACPI Processor P-States Driver"); | |
51 | MODULE_LICENSE("GPL"); | |
52 | ||
dde9f7ba VP |
53 | enum { |
54 | UNDEFINED_CAPABLE = 0, | |
55 | SYSTEM_INTEL_MSR_CAPABLE, | |
56 | SYSTEM_IO_CAPABLE, | |
57 | }; | |
58 | ||
59 | #define INTEL_MSR_RANGE (0xffff) | |
dfde5d62 | 60 | #define CPUID_6_ECX_APERFMPERF_CAPABILITY (0x1) |
dde9f7ba | 61 | |
fe27cb35 | 62 | struct acpi_cpufreq_data { |
64be7eed VP |
63 | struct acpi_processor_performance *acpi_data; |
64 | struct cpufreq_frequency_table *freq_table; | |
dfde5d62 | 65 | unsigned int max_freq; |
64be7eed VP |
66 | unsigned int resume; |
67 | unsigned int cpu_feature; | |
1da177e4 LT |
68 | }; |
69 | ||
64be7eed | 70 | static struct acpi_cpufreq_data *drv_data[NR_CPUS]; |
50109292 FY |
71 | /* acpi_perf_data is a pointer to percpu data. */ |
72 | static struct acpi_processor_performance *acpi_perf_data; | |
1da177e4 LT |
73 | |
74 | static struct cpufreq_driver acpi_cpufreq_driver; | |
75 | ||
d395bf12 VP |
76 | static unsigned int acpi_pstate_strict; |
77 | ||
dde9f7ba VP |
78 | static int check_est_cpu(unsigned int cpuid) |
79 | { | |
80 | struct cpuinfo_x86 *cpu = &cpu_data[cpuid]; | |
81 | ||
82 | if (cpu->x86_vendor != X86_VENDOR_INTEL || | |
64be7eed | 83 | !cpu_has(cpu, X86_FEATURE_EST)) |
dde9f7ba VP |
84 | return 0; |
85 | ||
86 | return 1; | |
87 | } | |
88 | ||
dde9f7ba | 89 | static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data) |
fe27cb35 | 90 | { |
64be7eed VP |
91 | struct acpi_processor_performance *perf; |
92 | int i; | |
fe27cb35 VP |
93 | |
94 | perf = data->acpi_data; | |
95 | ||
95dd7227 | 96 | for (i=0; i<perf->state_count; i++) { |
fe27cb35 VP |
97 | if (value == perf->states[i].status) |
98 | return data->freq_table[i].frequency; | |
99 | } | |
100 | return 0; | |
101 | } | |
102 | ||
dde9f7ba VP |
103 | static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data) |
104 | { | |
105 | int i; | |
a6f6e6e6 | 106 | struct acpi_processor_performance *perf; |
dde9f7ba VP |
107 | |
108 | msr &= INTEL_MSR_RANGE; | |
a6f6e6e6 VP |
109 | perf = data->acpi_data; |
110 | ||
95dd7227 | 111 | for (i=0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) { |
a6f6e6e6 | 112 | if (msr == perf->states[data->freq_table[i].index].status) |
dde9f7ba VP |
113 | return data->freq_table[i].frequency; |
114 | } | |
115 | return data->freq_table[0].frequency; | |
116 | } | |
117 | ||
dde9f7ba VP |
118 | static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data) |
119 | { | |
120 | switch (data->cpu_feature) { | |
64be7eed | 121 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba | 122 | return extract_msr(val, data); |
64be7eed | 123 | case SYSTEM_IO_CAPABLE: |
dde9f7ba | 124 | return extract_io(val, data); |
64be7eed | 125 | default: |
dde9f7ba VP |
126 | return 0; |
127 | } | |
128 | } | |
129 | ||
dde9f7ba VP |
130 | struct msr_addr { |
131 | u32 reg; | |
132 | }; | |
133 | ||
fe27cb35 VP |
134 | struct io_addr { |
135 | u16 port; | |
136 | u8 bit_width; | |
137 | }; | |
138 | ||
dde9f7ba VP |
139 | typedef union { |
140 | struct msr_addr msr; | |
141 | struct io_addr io; | |
142 | } drv_addr_union; | |
143 | ||
fe27cb35 | 144 | struct drv_cmd { |
dde9f7ba | 145 | unsigned int type; |
fe27cb35 | 146 | cpumask_t mask; |
dde9f7ba | 147 | drv_addr_union addr; |
fe27cb35 VP |
148 | u32 val; |
149 | }; | |
150 | ||
151 | static void do_drv_read(struct drv_cmd *cmd) | |
1da177e4 | 152 | { |
dde9f7ba VP |
153 | u32 h; |
154 | ||
155 | switch (cmd->type) { | |
64be7eed | 156 | case SYSTEM_INTEL_MSR_CAPABLE: |
dde9f7ba VP |
157 | rdmsr(cmd->addr.msr.reg, cmd->val, h); |
158 | break; | |
64be7eed | 159 | case SYSTEM_IO_CAPABLE: |
4e581ff1 VP |
160 | acpi_os_read_port((acpi_io_address)cmd->addr.io.port, |
161 | &cmd->val, | |
162 | (u32)cmd->addr.io.bit_width); | |
dde9f7ba | 163 | break; |
64be7eed | 164 | default: |
dde9f7ba VP |
165 | break; |
166 | } | |
fe27cb35 | 167 | } |
1da177e4 | 168 | |
fe27cb35 VP |
169 | static void do_drv_write(struct drv_cmd *cmd) |
170 | { | |
13424f65 | 171 | u32 lo, hi; |
dde9f7ba VP |
172 | |
173 | switch (cmd->type) { | |
64be7eed | 174 | case SYSTEM_INTEL_MSR_CAPABLE: |
13424f65 VP |
175 | rdmsr(cmd->addr.msr.reg, lo, hi); |
176 | lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE); | |
177 | wrmsr(cmd->addr.msr.reg, lo, hi); | |
dde9f7ba | 178 | break; |
64be7eed | 179 | case SYSTEM_IO_CAPABLE: |
4e581ff1 VP |
180 | acpi_os_write_port((acpi_io_address)cmd->addr.io.port, |
181 | cmd->val, | |
182 | (u32)cmd->addr.io.bit_width); | |
dde9f7ba | 183 | break; |
64be7eed | 184 | default: |
dde9f7ba VP |
185 | break; |
186 | } | |
fe27cb35 | 187 | } |
1da177e4 | 188 | |
95dd7227 | 189 | static void drv_read(struct drv_cmd *cmd) |
fe27cb35 | 190 | { |
64be7eed | 191 | cpumask_t saved_mask = current->cpus_allowed; |
fe27cb35 VP |
192 | cmd->val = 0; |
193 | ||
194 | set_cpus_allowed(current, cmd->mask); | |
195 | do_drv_read(cmd); | |
196 | set_cpus_allowed(current, saved_mask); | |
fe27cb35 VP |
197 | } |
198 | ||
199 | static void drv_write(struct drv_cmd *cmd) | |
200 | { | |
64be7eed VP |
201 | cpumask_t saved_mask = current->cpus_allowed; |
202 | unsigned int i; | |
fe27cb35 VP |
203 | |
204 | for_each_cpu_mask(i, cmd->mask) { | |
205 | set_cpus_allowed(current, cpumask_of_cpu(i)); | |
206 | do_drv_write(cmd); | |
1da177e4 LT |
207 | } |
208 | ||
fe27cb35 VP |
209 | set_cpus_allowed(current, saved_mask); |
210 | return; | |
211 | } | |
1da177e4 | 212 | |
fe27cb35 VP |
213 | static u32 get_cur_val(cpumask_t mask) |
214 | { | |
64be7eed VP |
215 | struct acpi_processor_performance *perf; |
216 | struct drv_cmd cmd; | |
1da177e4 | 217 | |
fe27cb35 VP |
218 | if (unlikely(cpus_empty(mask))) |
219 | return 0; | |
1da177e4 | 220 | |
dde9f7ba VP |
221 | switch (drv_data[first_cpu(mask)]->cpu_feature) { |
222 | case SYSTEM_INTEL_MSR_CAPABLE: | |
223 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
224 | cmd.addr.msr.reg = MSR_IA32_PERF_STATUS; | |
225 | break; | |
226 | case SYSTEM_IO_CAPABLE: | |
227 | cmd.type = SYSTEM_IO_CAPABLE; | |
228 | perf = drv_data[first_cpu(mask)]->acpi_data; | |
229 | cmd.addr.io.port = perf->control_register.address; | |
230 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
231 | break; | |
232 | default: | |
233 | return 0; | |
234 | } | |
235 | ||
fe27cb35 | 236 | cmd.mask = mask; |
1da177e4 | 237 | |
fe27cb35 | 238 | drv_read(&cmd); |
1da177e4 | 239 | |
fe27cb35 VP |
240 | dprintk("get_cur_val = %u\n", cmd.val); |
241 | ||
242 | return cmd.val; | |
243 | } | |
1da177e4 | 244 | |
dfde5d62 VP |
245 | /* |
246 | * Return the measured active (C0) frequency on this CPU since last call | |
247 | * to this function. | |
248 | * Input: cpu number | |
249 | * Return: Average CPU frequency in terms of max frequency (zero on error) | |
250 | * | |
251 | * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance | |
252 | * over a period of time, while CPU is in C0 state. | |
253 | * IA32_MPERF counts at the rate of max advertised frequency | |
254 | * IA32_APERF counts at the rate of actual CPU frequency | |
255 | * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and | |
256 | * no meaning should be associated with absolute values of these MSRs. | |
257 | */ | |
258 | static unsigned int get_measured_perf(unsigned int cpu) | |
259 | { | |
260 | union { | |
261 | struct { | |
262 | u32 lo; | |
263 | u32 hi; | |
264 | } split; | |
265 | u64 whole; | |
266 | } aperf_cur, mperf_cur; | |
267 | ||
268 | cpumask_t saved_mask; | |
269 | unsigned int perf_percent; | |
270 | unsigned int retval; | |
271 | ||
272 | saved_mask = current->cpus_allowed; | |
273 | set_cpus_allowed(current, cpumask_of_cpu(cpu)); | |
274 | if (get_cpu() != cpu) { | |
275 | /* We were not able to run on requested processor */ | |
276 | put_cpu(); | |
277 | return 0; | |
278 | } | |
279 | ||
280 | rdmsr(MSR_IA32_APERF, aperf_cur.split.lo, aperf_cur.split.hi); | |
281 | rdmsr(MSR_IA32_MPERF, mperf_cur.split.lo, mperf_cur.split.hi); | |
282 | ||
283 | wrmsr(MSR_IA32_APERF, 0,0); | |
284 | wrmsr(MSR_IA32_MPERF, 0,0); | |
285 | ||
286 | #ifdef __i386__ | |
287 | /* | |
288 | * We dont want to do 64 bit divide with 32 bit kernel | |
289 | * Get an approximate value. Return failure in case we cannot get | |
290 | * an approximate value. | |
291 | */ | |
292 | if (unlikely(aperf_cur.split.hi || mperf_cur.split.hi)) { | |
293 | int shift_count; | |
294 | u32 h; | |
295 | ||
296 | h = max_t(u32, aperf_cur.split.hi, mperf_cur.split.hi); | |
297 | shift_count = fls(h); | |
298 | ||
299 | aperf_cur.whole >>= shift_count; | |
300 | mperf_cur.whole >>= shift_count; | |
301 | } | |
302 | ||
303 | if (((unsigned long)(-1) / 100) < aperf_cur.split.lo) { | |
304 | int shift_count = 7; | |
305 | aperf_cur.split.lo >>= shift_count; | |
306 | mperf_cur.split.lo >>= shift_count; | |
307 | } | |
308 | ||
95dd7227 | 309 | if (aperf_cur.split.lo && mperf_cur.split.lo) |
dfde5d62 | 310 | perf_percent = (aperf_cur.split.lo * 100) / mperf_cur.split.lo; |
95dd7227 | 311 | else |
dfde5d62 | 312 | perf_percent = 0; |
dfde5d62 VP |
313 | |
314 | #else | |
315 | if (unlikely(((unsigned long)(-1) / 100) < aperf_cur.whole)) { | |
316 | int shift_count = 7; | |
317 | aperf_cur.whole >>= shift_count; | |
318 | mperf_cur.whole >>= shift_count; | |
319 | } | |
320 | ||
95dd7227 | 321 | if (aperf_cur.whole && mperf_cur.whole) |
dfde5d62 | 322 | perf_percent = (aperf_cur.whole * 100) / mperf_cur.whole; |
95dd7227 | 323 | else |
dfde5d62 | 324 | perf_percent = 0; |
dfde5d62 VP |
325 | |
326 | #endif | |
327 | ||
328 | retval = drv_data[cpu]->max_freq * perf_percent / 100; | |
329 | ||
330 | put_cpu(); | |
331 | set_cpus_allowed(current, saved_mask); | |
332 | ||
333 | dprintk("cpu %d: performance percent %d\n", cpu, perf_percent); | |
334 | return retval; | |
335 | } | |
336 | ||
fe27cb35 VP |
337 | static unsigned int get_cur_freq_on_cpu(unsigned int cpu) |
338 | { | |
64be7eed VP |
339 | struct acpi_cpufreq_data *data = drv_data[cpu]; |
340 | unsigned int freq; | |
fe27cb35 VP |
341 | |
342 | dprintk("get_cur_freq_on_cpu (%d)\n", cpu); | |
343 | ||
344 | if (unlikely(data == NULL || | |
64be7eed | 345 | data->acpi_data == NULL || data->freq_table == NULL)) { |
fe27cb35 | 346 | return 0; |
1da177e4 LT |
347 | } |
348 | ||
fe27cb35 VP |
349 | freq = extract_freq(get_cur_val(cpumask_of_cpu(cpu)), data); |
350 | dprintk("cur freq = %u\n", freq); | |
1da177e4 | 351 | |
fe27cb35 | 352 | return freq; |
1da177e4 LT |
353 | } |
354 | ||
fe27cb35 | 355 | static unsigned int check_freqs(cpumask_t mask, unsigned int freq, |
64be7eed | 356 | struct acpi_cpufreq_data *data) |
fe27cb35 | 357 | { |
64be7eed VP |
358 | unsigned int cur_freq; |
359 | unsigned int i; | |
1da177e4 | 360 | |
95dd7227 | 361 | for (i=0; i<100; i++) { |
fe27cb35 VP |
362 | cur_freq = extract_freq(get_cur_val(mask), data); |
363 | if (cur_freq == freq) | |
364 | return 1; | |
365 | udelay(10); | |
366 | } | |
367 | return 0; | |
368 | } | |
369 | ||
370 | static int acpi_cpufreq_target(struct cpufreq_policy *policy, | |
64be7eed | 371 | unsigned int target_freq, unsigned int relation) |
1da177e4 | 372 | { |
64be7eed VP |
373 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
374 | struct acpi_processor_performance *perf; | |
375 | struct cpufreq_freqs freqs; | |
376 | cpumask_t online_policy_cpus; | |
377 | struct drv_cmd cmd; | |
8edc59d9 VP |
378 | unsigned int next_state = 0; /* Index into freq_table */ |
379 | unsigned int next_perf_state = 0; /* Index into perf table */ | |
64be7eed VP |
380 | unsigned int i; |
381 | int result = 0; | |
fe27cb35 VP |
382 | |
383 | dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu); | |
384 | ||
385 | if (unlikely(data == NULL || | |
95dd7227 | 386 | data->acpi_data == NULL || data->freq_table == NULL)) { |
fe27cb35 VP |
387 | return -ENODEV; |
388 | } | |
1da177e4 | 389 | |
fe27cb35 | 390 | perf = data->acpi_data; |
1da177e4 | 391 | result = cpufreq_frequency_table_target(policy, |
64be7eed VP |
392 | data->freq_table, |
393 | target_freq, | |
394 | relation, &next_state); | |
09b4d1ee | 395 | if (unlikely(result)) |
fe27cb35 | 396 | return -ENODEV; |
09b4d1ee | 397 | |
7e1f19e5 | 398 | #ifdef CONFIG_HOTPLUG_CPU |
09b4d1ee VP |
399 | /* cpufreq holds the hotplug lock, so we are safe from here on */ |
400 | cpus_and(online_policy_cpus, cpu_online_map, policy->cpus); | |
7e1f19e5 AM |
401 | #else |
402 | online_policy_cpus = policy->cpus; | |
403 | #endif | |
1da177e4 | 404 | |
fe27cb35 | 405 | next_perf_state = data->freq_table[next_state].index; |
7650b281 | 406 | if (perf->state == next_perf_state) { |
fe27cb35 | 407 | if (unlikely(data->resume)) { |
64be7eed VP |
408 | dprintk("Called after resume, resetting to P%d\n", |
409 | next_perf_state); | |
fe27cb35 VP |
410 | data->resume = 0; |
411 | } else { | |
64be7eed VP |
412 | dprintk("Already at target state (P%d)\n", |
413 | next_perf_state); | |
fe27cb35 VP |
414 | return 0; |
415 | } | |
09b4d1ee VP |
416 | } |
417 | ||
64be7eed VP |
418 | switch (data->cpu_feature) { |
419 | case SYSTEM_INTEL_MSR_CAPABLE: | |
420 | cmd.type = SYSTEM_INTEL_MSR_CAPABLE; | |
421 | cmd.addr.msr.reg = MSR_IA32_PERF_CTL; | |
13424f65 | 422 | cmd.val = (u32) perf->states[next_perf_state].control; |
64be7eed VP |
423 | break; |
424 | case SYSTEM_IO_CAPABLE: | |
425 | cmd.type = SYSTEM_IO_CAPABLE; | |
426 | cmd.addr.io.port = perf->control_register.address; | |
427 | cmd.addr.io.bit_width = perf->control_register.bit_width; | |
428 | cmd.val = (u32) perf->states[next_perf_state].control; | |
429 | break; | |
430 | default: | |
431 | return -ENODEV; | |
432 | } | |
09b4d1ee | 433 | |
fe27cb35 | 434 | cpus_clear(cmd.mask); |
09b4d1ee | 435 | |
fe27cb35 VP |
436 | if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY) |
437 | cmd.mask = online_policy_cpus; | |
438 | else | |
439 | cpu_set(policy->cpu, cmd.mask); | |
09b4d1ee | 440 | |
8edc59d9 VP |
441 | freqs.old = perf->states[perf->state].core_frequency * 1000; |
442 | freqs.new = data->freq_table[next_state].frequency; | |
fe27cb35 VP |
443 | for_each_cpu_mask(i, cmd.mask) { |
444 | freqs.cpu = i; | |
445 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
09b4d1ee | 446 | } |
1da177e4 | 447 | |
fe27cb35 | 448 | drv_write(&cmd); |
09b4d1ee | 449 | |
fe27cb35 VP |
450 | if (acpi_pstate_strict) { |
451 | if (!check_freqs(cmd.mask, freqs.new, data)) { | |
452 | dprintk("acpi_cpufreq_target failed (%d)\n", | |
64be7eed | 453 | policy->cpu); |
fe27cb35 | 454 | return -EAGAIN; |
09b4d1ee VP |
455 | } |
456 | } | |
457 | ||
fe27cb35 VP |
458 | for_each_cpu_mask(i, cmd.mask) { |
459 | freqs.cpu = i; | |
460 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
461 | } | |
462 | perf->state = next_perf_state; | |
463 | ||
464 | return result; | |
1da177e4 LT |
465 | } |
466 | ||
64be7eed | 467 | static int acpi_cpufreq_verify(struct cpufreq_policy *policy) |
1da177e4 | 468 | { |
fe27cb35 | 469 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 LT |
470 | |
471 | dprintk("acpi_cpufreq_verify\n"); | |
472 | ||
fe27cb35 | 473 | return cpufreq_frequency_table_verify(policy, data->freq_table); |
1da177e4 LT |
474 | } |
475 | ||
1da177e4 | 476 | static unsigned long |
64be7eed | 477 | acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu) |
1da177e4 | 478 | { |
64be7eed | 479 | struct acpi_processor_performance *perf = data->acpi_data; |
09b4d1ee | 480 | |
1da177e4 LT |
481 | if (cpu_khz) { |
482 | /* search the closest match to cpu_khz */ | |
483 | unsigned int i; | |
484 | unsigned long freq; | |
09b4d1ee | 485 | unsigned long freqn = perf->states[0].core_frequency * 1000; |
1da177e4 | 486 | |
95dd7227 | 487 | for (i=0; i<(perf->state_count-1); i++) { |
1da177e4 | 488 | freq = freqn; |
95dd7227 | 489 | freqn = perf->states[i+1].core_frequency * 1000; |
1da177e4 | 490 | if ((2 * cpu_khz) > (freqn + freq)) { |
09b4d1ee | 491 | perf->state = i; |
64be7eed | 492 | return freq; |
1da177e4 LT |
493 | } |
494 | } | |
95dd7227 | 495 | perf->state = perf->state_count-1; |
64be7eed | 496 | return freqn; |
09b4d1ee | 497 | } else { |
1da177e4 | 498 | /* assume CPU is at P0... */ |
09b4d1ee VP |
499 | perf->state = 0; |
500 | return perf->states[0].core_frequency * 1000; | |
501 | } | |
1da177e4 LT |
502 | } |
503 | ||
09b4d1ee VP |
504 | /* |
505 | * acpi_cpufreq_early_init - initialize ACPI P-States library | |
506 | * | |
507 | * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c) | |
508 | * in order to determine correct frequency and voltage pairings. We can | |
509 | * do _PDC and _PSD and find out the processor dependency for the | |
510 | * actual init that will happen later... | |
511 | */ | |
50109292 | 512 | static int __init acpi_cpufreq_early_init(void) |
09b4d1ee | 513 | { |
09b4d1ee VP |
514 | dprintk("acpi_cpufreq_early_init\n"); |
515 | ||
50109292 FY |
516 | acpi_perf_data = alloc_percpu(struct acpi_processor_performance); |
517 | if (!acpi_perf_data) { | |
518 | dprintk("Memory allocation error for acpi_perf_data.\n"); | |
519 | return -ENOMEM; | |
09b4d1ee VP |
520 | } |
521 | ||
522 | /* Do initialization in ACPI core */ | |
fe27cb35 VP |
523 | acpi_processor_preregister_performance(acpi_perf_data); |
524 | return 0; | |
09b4d1ee VP |
525 | } |
526 | ||
95625b8f | 527 | #ifdef CONFIG_SMP |
8adcc0c6 VP |
528 | /* |
529 | * Some BIOSes do SW_ANY coordination internally, either set it up in hw | |
530 | * or do it in BIOS firmware and won't inform about it to OS. If not | |
531 | * detected, this has a side effect of making CPU run at a different speed | |
532 | * than OS intended it to run at. Detect it and handle it cleanly. | |
533 | */ | |
534 | static int bios_with_sw_any_bug; | |
535 | ||
1855256c | 536 | static int sw_any_bug_found(const struct dmi_system_id *d) |
8adcc0c6 VP |
537 | { |
538 | bios_with_sw_any_bug = 1; | |
539 | return 0; | |
540 | } | |
541 | ||
1855256c | 542 | static const struct dmi_system_id sw_any_bug_dmi_table[] = { |
8adcc0c6 VP |
543 | { |
544 | .callback = sw_any_bug_found, | |
545 | .ident = "Supermicro Server X6DLP", | |
546 | .matches = { | |
547 | DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"), | |
548 | DMI_MATCH(DMI_BIOS_VERSION, "080010"), | |
549 | DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"), | |
550 | }, | |
551 | }, | |
552 | { } | |
553 | }; | |
95625b8f | 554 | #endif |
8adcc0c6 | 555 | |
64be7eed | 556 | static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy) |
1da177e4 | 557 | { |
64be7eed VP |
558 | unsigned int i; |
559 | unsigned int valid_states = 0; | |
560 | unsigned int cpu = policy->cpu; | |
561 | struct acpi_cpufreq_data *data; | |
64be7eed VP |
562 | unsigned int result = 0; |
563 | struct cpuinfo_x86 *c = &cpu_data[policy->cpu]; | |
564 | struct acpi_processor_performance *perf; | |
1da177e4 | 565 | |
1da177e4 | 566 | dprintk("acpi_cpufreq_cpu_init\n"); |
1da177e4 | 567 | |
fe27cb35 | 568 | data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL); |
1da177e4 | 569 | if (!data) |
64be7eed | 570 | return -ENOMEM; |
1da177e4 | 571 | |
50109292 | 572 | data->acpi_data = percpu_ptr(acpi_perf_data, cpu); |
fe27cb35 | 573 | drv_data[cpu] = data; |
1da177e4 | 574 | |
95dd7227 | 575 | if (cpu_has(c, X86_FEATURE_CONSTANT_TSC)) |
fe27cb35 | 576 | acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS; |
1da177e4 | 577 | |
fe27cb35 | 578 | result = acpi_processor_register_performance(data->acpi_data, cpu); |
1da177e4 LT |
579 | if (result) |
580 | goto err_free; | |
581 | ||
09b4d1ee | 582 | perf = data->acpi_data; |
09b4d1ee | 583 | policy->shared_type = perf->shared_type; |
95dd7227 | 584 | |
46f18e3a | 585 | /* |
95dd7227 | 586 | * Will let policy->cpus know about dependency only when software |
46f18e3a VP |
587 | * coordination is required. |
588 | */ | |
589 | if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL || | |
8adcc0c6 | 590 | policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) { |
46f18e3a | 591 | policy->cpus = perf->shared_cpu_map; |
8adcc0c6 VP |
592 | } |
593 | ||
594 | #ifdef CONFIG_SMP | |
595 | dmi_check_system(sw_any_bug_dmi_table); | |
596 | if (bios_with_sw_any_bug && cpus_weight(policy->cpus) == 1) { | |
597 | policy->shared_type = CPUFREQ_SHARED_TYPE_ALL; | |
08357611 | 598 | policy->cpus = per_cpu(cpu_core_map, cpu); |
8adcc0c6 VP |
599 | } |
600 | #endif | |
09b4d1ee | 601 | |
1da177e4 | 602 | /* capability check */ |
09b4d1ee | 603 | if (perf->state_count <= 1) { |
1da177e4 LT |
604 | dprintk("No P-States\n"); |
605 | result = -ENODEV; | |
606 | goto err_unreg; | |
607 | } | |
09b4d1ee | 608 | |
fe27cb35 VP |
609 | if (perf->control_register.space_id != perf->status_register.space_id) { |
610 | result = -ENODEV; | |
611 | goto err_unreg; | |
612 | } | |
613 | ||
614 | switch (perf->control_register.space_id) { | |
64be7eed | 615 | case ACPI_ADR_SPACE_SYSTEM_IO: |
fe27cb35 | 616 | dprintk("SYSTEM IO addr space\n"); |
dde9f7ba VP |
617 | data->cpu_feature = SYSTEM_IO_CAPABLE; |
618 | break; | |
64be7eed | 619 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
dde9f7ba VP |
620 | dprintk("HARDWARE addr space\n"); |
621 | if (!check_est_cpu(cpu)) { | |
622 | result = -ENODEV; | |
623 | goto err_unreg; | |
624 | } | |
625 | data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE; | |
fe27cb35 | 626 | break; |
64be7eed | 627 | default: |
fe27cb35 | 628 | dprintk("Unknown addr space %d\n", |
64be7eed | 629 | (u32) (perf->control_register.space_id)); |
1da177e4 LT |
630 | result = -ENODEV; |
631 | goto err_unreg; | |
632 | } | |
633 | ||
95dd7227 DJ |
634 | data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) * |
635 | (perf->state_count+1), GFP_KERNEL); | |
1da177e4 LT |
636 | if (!data->freq_table) { |
637 | result = -ENOMEM; | |
638 | goto err_unreg; | |
639 | } | |
640 | ||
641 | /* detect transition latency */ | |
642 | policy->cpuinfo.transition_latency = 0; | |
95dd7227 | 643 | for (i=0; i<perf->state_count; i++) { |
64be7eed VP |
644 | if ((perf->states[i].transition_latency * 1000) > |
645 | policy->cpuinfo.transition_latency) | |
646 | policy->cpuinfo.transition_latency = | |
647 | perf->states[i].transition_latency * 1000; | |
1da177e4 | 648 | } |
1da177e4 | 649 | |
dfde5d62 | 650 | data->max_freq = perf->states[0].core_frequency * 1000; |
1da177e4 | 651 | /* table init */ |
95dd7227 | 652 | for (i=0; i<perf->state_count; i++) { |
3cdf552b ZR |
653 | if (i>0 && perf->states[i].core_frequency >= |
654 | data->freq_table[valid_states-1].frequency / 1000) | |
fe27cb35 VP |
655 | continue; |
656 | ||
657 | data->freq_table[valid_states].index = i; | |
658 | data->freq_table[valid_states].frequency = | |
64be7eed | 659 | perf->states[i].core_frequency * 1000; |
fe27cb35 | 660 | valid_states++; |
1da177e4 | 661 | } |
3d4a7ef3 | 662 | data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END; |
8edc59d9 | 663 | perf->state = 0; |
1da177e4 LT |
664 | |
665 | result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table); | |
95dd7227 | 666 | if (result) |
1da177e4 | 667 | goto err_freqfree; |
1da177e4 | 668 | |
a507ac4b | 669 | switch (perf->control_register.space_id) { |
64be7eed | 670 | case ACPI_ADR_SPACE_SYSTEM_IO: |
dde9f7ba VP |
671 | /* Current speed is unknown and not detectable by IO port */ |
672 | policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu); | |
673 | break; | |
64be7eed | 674 | case ACPI_ADR_SPACE_FIXED_HARDWARE: |
7650b281 | 675 | acpi_cpufreq_driver.get = get_cur_freq_on_cpu; |
a507ac4b | 676 | policy->cur = get_cur_freq_on_cpu(cpu); |
dde9f7ba | 677 | break; |
64be7eed | 678 | default: |
dde9f7ba VP |
679 | break; |
680 | } | |
681 | ||
1da177e4 LT |
682 | /* notify BIOS that we exist */ |
683 | acpi_processor_notify_smm(THIS_MODULE); | |
684 | ||
dfde5d62 VP |
685 | /* Check for APERF/MPERF support in hardware */ |
686 | if (c->x86_vendor == X86_VENDOR_INTEL && c->cpuid_level >= 6) { | |
687 | unsigned int ecx; | |
688 | ecx = cpuid_ecx(6); | |
95dd7227 | 689 | if (ecx & CPUID_6_ECX_APERFMPERF_CAPABILITY) |
dfde5d62 | 690 | acpi_cpufreq_driver.getavg = get_measured_perf; |
dfde5d62 VP |
691 | } |
692 | ||
fe27cb35 | 693 | dprintk("CPU%u - ACPI performance management activated.\n", cpu); |
09b4d1ee | 694 | for (i = 0; i < perf->state_count; i++) |
1da177e4 | 695 | dprintk(" %cP%d: %d MHz, %d mW, %d uS\n", |
64be7eed | 696 | (i == perf->state ? '*' : ' '), i, |
09b4d1ee VP |
697 | (u32) perf->states[i].core_frequency, |
698 | (u32) perf->states[i].power, | |
699 | (u32) perf->states[i].transition_latency); | |
1da177e4 LT |
700 | |
701 | cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu); | |
64be7eed | 702 | |
4b31e774 DB |
703 | /* |
704 | * the first call to ->target() should result in us actually | |
705 | * writing something to the appropriate registers. | |
706 | */ | |
707 | data->resume = 1; | |
64be7eed | 708 | |
fe27cb35 | 709 | return result; |
1da177e4 | 710 | |
95dd7227 | 711 | err_freqfree: |
1da177e4 | 712 | kfree(data->freq_table); |
95dd7227 | 713 | err_unreg: |
09b4d1ee | 714 | acpi_processor_unregister_performance(perf, cpu); |
95dd7227 | 715 | err_free: |
1da177e4 | 716 | kfree(data); |
fe27cb35 | 717 | drv_data[cpu] = NULL; |
1da177e4 | 718 | |
64be7eed | 719 | return result; |
1da177e4 LT |
720 | } |
721 | ||
64be7eed | 722 | static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy) |
1da177e4 | 723 | { |
fe27cb35 | 724 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 | 725 | |
1da177e4 LT |
726 | dprintk("acpi_cpufreq_cpu_exit\n"); |
727 | ||
728 | if (data) { | |
729 | cpufreq_frequency_table_put_attr(policy->cpu); | |
fe27cb35 | 730 | drv_data[policy->cpu] = NULL; |
64be7eed VP |
731 | acpi_processor_unregister_performance(data->acpi_data, |
732 | policy->cpu); | |
1da177e4 LT |
733 | kfree(data); |
734 | } | |
735 | ||
64be7eed | 736 | return 0; |
1da177e4 LT |
737 | } |
738 | ||
64be7eed | 739 | static int acpi_cpufreq_resume(struct cpufreq_policy *policy) |
1da177e4 | 740 | { |
fe27cb35 | 741 | struct acpi_cpufreq_data *data = drv_data[policy->cpu]; |
1da177e4 | 742 | |
1da177e4 LT |
743 | dprintk("acpi_cpufreq_resume\n"); |
744 | ||
745 | data->resume = 1; | |
746 | ||
64be7eed | 747 | return 0; |
1da177e4 LT |
748 | } |
749 | ||
64be7eed | 750 | static struct freq_attr *acpi_cpufreq_attr[] = { |
1da177e4 LT |
751 | &cpufreq_freq_attr_scaling_available_freqs, |
752 | NULL, | |
753 | }; | |
754 | ||
755 | static struct cpufreq_driver acpi_cpufreq_driver = { | |
64be7eed VP |
756 | .verify = acpi_cpufreq_verify, |
757 | .target = acpi_cpufreq_target, | |
64be7eed VP |
758 | .init = acpi_cpufreq_cpu_init, |
759 | .exit = acpi_cpufreq_cpu_exit, | |
760 | .resume = acpi_cpufreq_resume, | |
761 | .name = "acpi-cpufreq", | |
762 | .owner = THIS_MODULE, | |
763 | .attr = acpi_cpufreq_attr, | |
1da177e4 LT |
764 | }; |
765 | ||
64be7eed | 766 | static int __init acpi_cpufreq_init(void) |
1da177e4 | 767 | { |
50109292 FY |
768 | int ret; |
769 | ||
1da177e4 LT |
770 | dprintk("acpi_cpufreq_init\n"); |
771 | ||
50109292 FY |
772 | ret = acpi_cpufreq_early_init(); |
773 | if (ret) | |
774 | return ret; | |
09b4d1ee | 775 | |
64be7eed | 776 | return cpufreq_register_driver(&acpi_cpufreq_driver); |
1da177e4 LT |
777 | } |
778 | ||
64be7eed | 779 | static void __exit acpi_cpufreq_exit(void) |
1da177e4 LT |
780 | { |
781 | dprintk("acpi_cpufreq_exit\n"); | |
782 | ||
783 | cpufreq_unregister_driver(&acpi_cpufreq_driver); | |
784 | ||
50109292 FY |
785 | free_percpu(acpi_perf_data); |
786 | ||
1da177e4 LT |
787 | return; |
788 | } | |
789 | ||
d395bf12 | 790 | module_param(acpi_pstate_strict, uint, 0644); |
64be7eed | 791 | MODULE_PARM_DESC(acpi_pstate_strict, |
95dd7227 DJ |
792 | "value 0 or non-zero. non-zero -> strict ACPI checks are " |
793 | "performed during frequency changes."); | |
1da177e4 LT |
794 | |
795 | late_initcall(acpi_cpufreq_init); | |
796 | module_exit(acpi_cpufreq_exit); | |
797 | ||
798 | MODULE_ALIAS("acpi"); |