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Commit | Line | Data |
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1da177e4 | 1 | /* |
1f729e06 | 2 | * (c) 2003-2006 Advanced Micro Devices, Inc. |
1da177e4 LT |
3 | * Your use of this code is subject to the terms and conditions of the |
4 | * GNU general public license version 2. See "COPYING" or | |
5 | * http://www.gnu.org/licenses/gpl.html | |
6 | * | |
065b807c | 7 | * Support : mark.langsdorf@amd.com |
1da177e4 LT |
8 | * |
9 | * Based on the powernow-k7.c module written by Dave Jones. | |
10 | * (C) 2003 Dave Jones <davej@codemonkey.org.uk> on behalf of SuSE Labs | |
11 | * (C) 2004 Dominik Brodowski <linux@brodo.de> | |
12 | * (C) 2004 Pavel Machek <pavel@suse.cz> | |
13 | * Licensed under the terms of the GNU GPL License version 2. | |
14 | * Based upon datasheets & sample CPUs kindly provided by AMD. | |
15 | * | |
16 | * Valuable input gratefully received from Dave Jones, Pavel Machek, | |
1f729e06 | 17 | * Dominik Brodowski, Jacob Shin, and others. |
065b807c | 18 | * Originally developed by Paul Devriendt. |
1da177e4 LT |
19 | * Processor information obtained from Chapter 9 (Power and Thermal Management) |
20 | * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD | |
21 | * Opteron Processors" available for download from www.amd.com | |
22 | * | |
2e3f8faa | 23 | * Tables for specific CPUs can be inferred from |
065b807c | 24 | * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf |
1da177e4 LT |
25 | */ |
26 | ||
27 | #include <linux/kernel.h> | |
28 | #include <linux/smp.h> | |
29 | #include <linux/module.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/cpufreq.h> | |
32 | #include <linux/slab.h> | |
33 | #include <linux/string.h> | |
065b807c | 34 | #include <linux/cpumask.h> |
4e57b681 | 35 | #include <linux/sched.h> /* for current / set_cpus_allowed() */ |
1da177e4 LT |
36 | |
37 | #include <asm/msr.h> | |
38 | #include <asm/io.h> | |
39 | #include <asm/delay.h> | |
40 | ||
41 | #ifdef CONFIG_X86_POWERNOW_K8_ACPI | |
42 | #include <linux/acpi.h> | |
14cc3e2b | 43 | #include <linux/mutex.h> |
1da177e4 LT |
44 | #include <acpi/processor.h> |
45 | #endif | |
46 | ||
47 | #define PFX "powernow-k8: " | |
48 | #define BFX PFX "BIOS error: " | |
c5829cd0 | 49 | #define VERSION "version 2.20.00" |
1da177e4 LT |
50 | #include "powernow-k8.h" |
51 | ||
52 | /* serialize freq changes */ | |
14cc3e2b | 53 | static DEFINE_MUTEX(fidvid_mutex); |
1da177e4 | 54 | |
2c6b8c03 | 55 | static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data); |
1da177e4 | 56 | |
1f729e06 DJ |
57 | static int cpu_family = CPU_OPTERON; |
58 | ||
065b807c | 59 | #ifndef CONFIG_SMP |
08357611 | 60 | DEFINE_PER_CPU(cpumask_t, cpu_core_map); |
065b807c DJ |
61 | #endif |
62 | ||
1da177e4 LT |
63 | /* Return a frequency in MHz, given an input fid */ |
64 | static u32 find_freq_from_fid(u32 fid) | |
65 | { | |
66 | return 800 + (fid * 100); | |
67 | } | |
68 | ||
69 | /* Return a frequency in KHz, given an input fid */ | |
70 | static u32 find_khz_freq_from_fid(u32 fid) | |
71 | { | |
72 | return 1000 * find_freq_from_fid(fid); | |
73 | } | |
74 | ||
c5829cd0 | 75 | static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data, u32 pstate) |
1f729e06 | 76 | { |
c5829cd0 | 77 | return data[pstate].frequency; |
1f729e06 DJ |
78 | } |
79 | ||
1da177e4 LT |
80 | /* Return the vco fid for an input fid |
81 | * | |
82 | * Each "low" fid has corresponding "high" fid, and you can get to "low" fids | |
83 | * only from corresponding high fids. This returns "high" fid corresponding to | |
84 | * "low" one. | |
85 | */ | |
86 | static u32 convert_fid_to_vco_fid(u32 fid) | |
87 | { | |
32ee8c3e | 88 | if (fid < HI_FID_TABLE_BOTTOM) |
1da177e4 | 89 | return 8 + (2 * fid); |
32ee8c3e | 90 | else |
1da177e4 | 91 | return fid; |
1da177e4 LT |
92 | } |
93 | ||
94 | /* | |
95 | * Return 1 if the pending bit is set. Unless we just instructed the processor | |
96 | * to transition to a new state, seeing this bit set is really bad news. | |
97 | */ | |
98 | static int pending_bit_stuck(void) | |
99 | { | |
100 | u32 lo, hi; | |
101 | ||
e7bdd7a5 | 102 | if (cpu_family == CPU_HW_PSTATE) |
1f729e06 DJ |
103 | return 0; |
104 | ||
1da177e4 LT |
105 | rdmsr(MSR_FIDVID_STATUS, lo, hi); |
106 | return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; | |
107 | } | |
108 | ||
109 | /* | |
110 | * Update the global current fid / vid values from the status msr. | |
111 | * Returns 1 on error. | |
112 | */ | |
113 | static int query_current_values_with_pending_wait(struct powernow_k8_data *data) | |
114 | { | |
115 | u32 lo, hi; | |
116 | u32 i = 0; | |
117 | ||
e7bdd7a5 | 118 | if (cpu_family == CPU_HW_PSTATE) { |
1f729e06 DJ |
119 | rdmsr(MSR_PSTATE_STATUS, lo, hi); |
120 | i = lo & HW_PSTATE_MASK; | |
c5829cd0 | 121 | data->currpstate = i; |
1f729e06 DJ |
122 | return 0; |
123 | } | |
7153d961 | 124 | do { |
0213df74 DJ |
125 | if (i++ > 10000) { |
126 | dprintk("detected change pending stuck\n"); | |
1da177e4 LT |
127 | return 1; |
128 | } | |
129 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
7153d961 | 130 | } while (lo & MSR_S_LO_CHANGE_PENDING); |
1da177e4 LT |
131 | |
132 | data->currvid = hi & MSR_S_HI_CURRENT_VID; | |
133 | data->currfid = lo & MSR_S_LO_CURRENT_FID; | |
134 | ||
135 | return 0; | |
136 | } | |
137 | ||
138 | /* the isochronous relief time */ | |
139 | static void count_off_irt(struct powernow_k8_data *data) | |
140 | { | |
141 | udelay((1 << data->irt) * 10); | |
142 | return; | |
143 | } | |
144 | ||
27b46d76 | 145 | /* the voltage stabilization time */ |
1da177e4 LT |
146 | static void count_off_vst(struct powernow_k8_data *data) |
147 | { | |
148 | udelay(data->vstable * VST_UNITS_20US); | |
149 | return; | |
150 | } | |
151 | ||
152 | /* need to init the control msr to a safe value (for each cpu) */ | |
153 | static void fidvid_msr_init(void) | |
154 | { | |
155 | u32 lo, hi; | |
156 | u8 fid, vid; | |
157 | ||
158 | rdmsr(MSR_FIDVID_STATUS, lo, hi); | |
159 | vid = hi & MSR_S_HI_CURRENT_VID; | |
160 | fid = lo & MSR_S_LO_CURRENT_FID; | |
161 | lo = fid | (vid << MSR_C_LO_VID_SHIFT); | |
162 | hi = MSR_C_HI_STP_GNT_BENIGN; | |
163 | dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi); | |
164 | wrmsr(MSR_FIDVID_CTL, lo, hi); | |
165 | } | |
166 | ||
1da177e4 LT |
167 | /* write the new fid value along with the other control fields to the msr */ |
168 | static int write_new_fid(struct powernow_k8_data *data, u32 fid) | |
169 | { | |
170 | u32 lo; | |
171 | u32 savevid = data->currvid; | |
0213df74 | 172 | u32 i = 0; |
1da177e4 LT |
173 | |
174 | if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) { | |
175 | printk(KERN_ERR PFX "internal error - overflow on fid write\n"); | |
176 | return 1; | |
177 | } | |
178 | ||
179 | lo = fid | (data->currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID; | |
180 | ||
181 | dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n", | |
182 | fid, lo, data->plllock * PLL_LOCK_CONVERSION); | |
183 | ||
0213df74 DJ |
184 | do { |
185 | wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); | |
186 | if (i++ > 100) { | |
1f729e06 | 187 | printk(KERN_ERR PFX "Hardware error - pending bit very stuck - no further pstate changes possible\n"); |
63172cb3 | 188 | return 1; |
32ee8c3e | 189 | } |
0213df74 | 190 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
191 | |
192 | count_off_irt(data); | |
193 | ||
194 | if (savevid != data->currvid) { | |
195 | printk(KERN_ERR PFX "vid change on fid trans, old 0x%x, new 0x%x\n", | |
196 | savevid, data->currvid); | |
197 | return 1; | |
198 | } | |
199 | ||
200 | if (fid != data->currfid) { | |
201 | printk(KERN_ERR PFX "fid trans failed, fid 0x%x, curr 0x%x\n", fid, | |
202 | data->currfid); | |
203 | return 1; | |
204 | } | |
205 | ||
206 | return 0; | |
207 | } | |
208 | ||
209 | /* Write a new vid to the hardware */ | |
210 | static int write_new_vid(struct powernow_k8_data *data, u32 vid) | |
211 | { | |
212 | u32 lo; | |
213 | u32 savefid = data->currfid; | |
0213df74 | 214 | int i = 0; |
1da177e4 LT |
215 | |
216 | if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { | |
217 | printk(KERN_ERR PFX "internal error - overflow on vid write\n"); | |
218 | return 1; | |
219 | } | |
220 | ||
221 | lo = data->currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID; | |
222 | ||
223 | dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n", | |
224 | vid, lo, STOP_GRANT_5NS); | |
225 | ||
0213df74 DJ |
226 | do { |
227 | wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); | |
6df89006 DJ |
228 | if (i++ > 100) { |
229 | printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n"); | |
230 | return 1; | |
231 | } | |
0213df74 | 232 | } while (query_current_values_with_pending_wait(data)); |
1da177e4 LT |
233 | |
234 | if (savefid != data->currfid) { | |
235 | printk(KERN_ERR PFX "fid changed on vid trans, old 0x%x new 0x%x\n", | |
236 | savefid, data->currfid); | |
237 | return 1; | |
238 | } | |
239 | ||
240 | if (vid != data->currvid) { | |
241 | printk(KERN_ERR PFX "vid trans failed, vid 0x%x, curr 0x%x\n", vid, | |
242 | data->currvid); | |
243 | return 1; | |
244 | } | |
245 | ||
246 | return 0; | |
247 | } | |
248 | ||
249 | /* | |
250 | * Reduce the vid by the max of step or reqvid. | |
251 | * Decreasing vid codes represent increasing voltages: | |
841e40b3 | 252 | * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off. |
1da177e4 LT |
253 | */ |
254 | static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step) | |
255 | { | |
256 | if ((data->currvid - reqvid) > step) | |
257 | reqvid = data->currvid - step; | |
258 | ||
259 | if (write_new_vid(data, reqvid)) | |
260 | return 1; | |
261 | ||
262 | count_off_vst(data); | |
263 | ||
264 | return 0; | |
265 | } | |
266 | ||
1f729e06 DJ |
267 | /* Change hardware pstate by single MSR write */ |
268 | static int transition_pstate(struct powernow_k8_data *data, u32 pstate) | |
269 | { | |
270 | wrmsr(MSR_PSTATE_CTRL, pstate, 0); | |
c5829cd0 | 271 | data->currpstate = pstate; |
1f729e06 DJ |
272 | return 0; |
273 | } | |
274 | ||
275 | /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */ | |
1da177e4 LT |
276 | static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid) |
277 | { | |
278 | if (core_voltage_pre_transition(data, reqvid)) | |
279 | return 1; | |
280 | ||
281 | if (core_frequency_transition(data, reqfid)) | |
282 | return 1; | |
283 | ||
284 | if (core_voltage_post_transition(data, reqvid)) | |
285 | return 1; | |
286 | ||
287 | if (query_current_values_with_pending_wait(data)) | |
288 | return 1; | |
289 | ||
290 | if ((reqfid != data->currfid) || (reqvid != data->currvid)) { | |
291 | printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n", | |
292 | smp_processor_id(), | |
293 | reqfid, reqvid, data->currfid, data->currvid); | |
294 | return 1; | |
295 | } | |
296 | ||
297 | dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n", | |
298 | smp_processor_id(), data->currfid, data->currvid); | |
299 | ||
300 | return 0; | |
301 | } | |
302 | ||
303 | /* Phase 1 - core voltage transition ... setup voltage */ | |
304 | static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid) | |
305 | { | |
306 | u32 rvosteps = data->rvo; | |
307 | u32 savefid = data->currfid; | |
065b807c | 308 | u32 maxvid, lo; |
1da177e4 LT |
309 | |
310 | dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n", | |
311 | smp_processor_id(), | |
312 | data->currfid, data->currvid, reqvid, data->rvo); | |
313 | ||
065b807c DJ |
314 | rdmsr(MSR_FIDVID_STATUS, lo, maxvid); |
315 | maxvid = 0x1f & (maxvid >> 16); | |
316 | dprintk("ph1 maxvid=0x%x\n", maxvid); | |
317 | if (reqvid < maxvid) /* lower numbers are higher voltages */ | |
318 | reqvid = maxvid; | |
319 | ||
1da177e4 LT |
320 | while (data->currvid > reqvid) { |
321 | dprintk("ph1: curr 0x%x, req vid 0x%x\n", | |
322 | data->currvid, reqvid); | |
323 | if (decrease_vid_code_by_step(data, reqvid, data->vidmvs)) | |
324 | return 1; | |
325 | } | |
326 | ||
065b807c DJ |
327 | while ((rvosteps > 0) && ((data->rvo + data->currvid) > reqvid)) { |
328 | if (data->currvid == maxvid) { | |
1da177e4 LT |
329 | rvosteps = 0; |
330 | } else { | |
331 | dprintk("ph1: changing vid for rvo, req 0x%x\n", | |
332 | data->currvid - 1); | |
333 | if (decrease_vid_code_by_step(data, data->currvid - 1, 1)) | |
334 | return 1; | |
335 | rvosteps--; | |
336 | } | |
337 | } | |
338 | ||
339 | if (query_current_values_with_pending_wait(data)) | |
340 | return 1; | |
341 | ||
342 | if (savefid != data->currfid) { | |
343 | printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", data->currfid); | |
344 | return 1; | |
345 | } | |
346 | ||
347 | dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n", | |
348 | data->currfid, data->currvid); | |
349 | ||
350 | return 0; | |
351 | } | |
352 | ||
353 | /* Phase 2 - core frequency transition */ | |
354 | static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid) | |
355 | { | |
019a61b9 | 356 | u32 vcoreqfid, vcocurrfid, vcofiddiff, fid_interval, savevid = data->currvid; |
1da177e4 LT |
357 | |
358 | if ((reqfid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) { | |
359 | printk(KERN_ERR PFX "ph2: illegal lo-lo transition 0x%x 0x%x\n", | |
360 | reqfid, data->currfid); | |
361 | return 1; | |
362 | } | |
363 | ||
364 | if (data->currfid == reqfid) { | |
365 | printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", data->currfid); | |
366 | return 0; | |
367 | } | |
368 | ||
369 | dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n", | |
370 | smp_processor_id(), | |
371 | data->currfid, data->currvid, reqfid); | |
372 | ||
373 | vcoreqfid = convert_fid_to_vco_fid(reqfid); | |
374 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
375 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
376 | : vcoreqfid - vcocurrfid; | |
377 | ||
378 | while (vcofiddiff > 2) { | |
019a61b9 LM |
379 | (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2); |
380 | ||
1da177e4 LT |
381 | if (reqfid > data->currfid) { |
382 | if (data->currfid > LO_FID_TABLE_TOP) { | |
019a61b9 | 383 | if (write_new_fid(data, data->currfid + fid_interval)) { |
1da177e4 LT |
384 | return 1; |
385 | } | |
386 | } else { | |
387 | if (write_new_fid | |
388 | (data, 2 + convert_fid_to_vco_fid(data->currfid))) { | |
389 | return 1; | |
390 | } | |
391 | } | |
392 | } else { | |
019a61b9 | 393 | if (write_new_fid(data, data->currfid - fid_interval)) |
1da177e4 LT |
394 | return 1; |
395 | } | |
396 | ||
397 | vcocurrfid = convert_fid_to_vco_fid(data->currfid); | |
398 | vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid | |
399 | : vcoreqfid - vcocurrfid; | |
400 | } | |
401 | ||
402 | if (write_new_fid(data, reqfid)) | |
403 | return 1; | |
404 | ||
405 | if (query_current_values_with_pending_wait(data)) | |
406 | return 1; | |
407 | ||
408 | if (data->currfid != reqfid) { | |
409 | printk(KERN_ERR PFX | |
410 | "ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n", | |
411 | data->currfid, reqfid); | |
412 | return 1; | |
413 | } | |
414 | ||
415 | if (savevid != data->currvid) { | |
416 | printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n", | |
417 | savevid, data->currvid); | |
418 | return 1; | |
419 | } | |
420 | ||
421 | dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n", | |
422 | data->currfid, data->currvid); | |
423 | ||
424 | return 0; | |
425 | } | |
426 | ||
427 | /* Phase 3 - core voltage transition flow ... jump to the final vid. */ | |
428 | static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid) | |
429 | { | |
430 | u32 savefid = data->currfid; | |
431 | u32 savereqvid = reqvid; | |
432 | ||
433 | dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n", | |
434 | smp_processor_id(), | |
435 | data->currfid, data->currvid); | |
436 | ||
437 | if (reqvid != data->currvid) { | |
438 | if (write_new_vid(data, reqvid)) | |
439 | return 1; | |
440 | ||
441 | if (savefid != data->currfid) { | |
442 | printk(KERN_ERR PFX | |
443 | "ph3: bad fid change, save 0x%x, curr 0x%x\n", | |
444 | savefid, data->currfid); | |
445 | return 1; | |
446 | } | |
447 | ||
448 | if (data->currvid != reqvid) { | |
449 | printk(KERN_ERR PFX | |
450 | "ph3: failed vid transition\n, req 0x%x, curr 0x%x", | |
451 | reqvid, data->currvid); | |
452 | return 1; | |
453 | } | |
454 | } | |
455 | ||
456 | if (query_current_values_with_pending_wait(data)) | |
457 | return 1; | |
458 | ||
459 | if (savereqvid != data->currvid) { | |
460 | dprintk("ph3 failed, currvid 0x%x\n", data->currvid); | |
461 | return 1; | |
462 | } | |
463 | ||
464 | if (savefid != data->currfid) { | |
465 | dprintk("ph3 failed, currfid changed 0x%x\n", | |
466 | data->currfid); | |
467 | return 1; | |
468 | } | |
469 | ||
470 | dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n", | |
471 | data->currfid, data->currvid); | |
472 | ||
473 | return 0; | |
474 | } | |
475 | ||
476 | static int check_supported_cpu(unsigned int cpu) | |
477 | { | |
fc0e4748 | 478 | cpumask_t oldmask; |
1da177e4 LT |
479 | u32 eax, ebx, ecx, edx; |
480 | unsigned int rc = 0; | |
481 | ||
482 | oldmask = current->cpus_allowed; | |
0bc3cc03 | 483 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu)); |
1da177e4 LT |
484 | |
485 | if (smp_processor_id() != cpu) { | |
8aae8284 | 486 | printk(KERN_ERR PFX "limiting to cpu %u failed\n", cpu); |
1da177e4 LT |
487 | goto out; |
488 | } | |
489 | ||
490 | if (current_cpu_data.x86_vendor != X86_VENDOR_AMD) | |
491 | goto out; | |
492 | ||
493 | eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); | |
1f729e06 DJ |
494 | if (((eax & CPUID_XFAM) != CPUID_XFAM_K8) && |
495 | ((eax & CPUID_XFAM) < CPUID_XFAM_10H)) | |
2c906ae6 DJ |
496 | goto out; |
497 | ||
1f729e06 DJ |
498 | if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) { |
499 | if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) || | |
99fbe1ac | 500 | ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) { |
1f729e06 DJ |
501 | printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax); |
502 | goto out; | |
503 | } | |
1da177e4 | 504 | |
1f729e06 DJ |
505 | eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES); |
506 | if (eax < CPUID_FREQ_VOLT_CAPABILITIES) { | |
507 | printk(KERN_INFO PFX | |
508 | "No frequency change capabilities detected\n"); | |
509 | goto out; | |
510 | } | |
1da177e4 | 511 | |
1f729e06 DJ |
512 | cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); |
513 | if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) { | |
514 | printk(KERN_INFO PFX "Power state transitions not supported\n"); | |
515 | goto out; | |
516 | } | |
517 | } else { /* must be a HW Pstate capable processor */ | |
518 | cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); | |
519 | if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE) | |
520 | cpu_family = CPU_HW_PSTATE; | |
521 | else | |
522 | goto out; | |
1da177e4 LT |
523 | } |
524 | ||
525 | rc = 1; | |
526 | ||
527 | out: | |
fc0e4748 | 528 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 | 529 | return rc; |
1da177e4 LT |
530 | } |
531 | ||
532 | static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid) | |
533 | { | |
534 | unsigned int j; | |
535 | u8 lastfid = 0xff; | |
536 | ||
537 | for (j = 0; j < data->numps; j++) { | |
538 | if (pst[j].vid > LEAST_VID) { | |
539 | printk(KERN_ERR PFX "vid %d invalid : 0x%x\n", j, pst[j].vid); | |
540 | return -EINVAL; | |
541 | } | |
542 | if (pst[j].vid < data->rvo) { /* vid + rvo >= 0 */ | |
543 | printk(KERN_ERR BFX "0 vid exceeded with pstate %d\n", j); | |
544 | return -ENODEV; | |
545 | } | |
546 | if (pst[j].vid < maxvid + data->rvo) { /* vid + rvo >= maxvid */ | |
547 | printk(KERN_ERR BFX "maxvid exceeded with pstate %d\n", j); | |
548 | return -ENODEV; | |
549 | } | |
8aae8284 JS |
550 | if (pst[j].fid > MAX_FID) { |
551 | printk(KERN_ERR BFX "maxfid exceeded with pstate %d\n", j); | |
552 | return -ENODEV; | |
553 | } | |
8aae8284 | 554 | if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) { |
1da177e4 | 555 | /* Only first fid is allowed to be in "low" range */ |
8aae8284 | 556 | printk(KERN_ERR BFX "two low fids - %d : 0x%x\n", j, pst[j].fid); |
1da177e4 LT |
557 | return -EINVAL; |
558 | } | |
559 | if (pst[j].fid < lastfid) | |
560 | lastfid = pst[j].fid; | |
561 | } | |
562 | if (lastfid & 1) { | |
8aae8284 | 563 | printk(KERN_ERR BFX "lastfid invalid\n"); |
1da177e4 LT |
564 | return -EINVAL; |
565 | } | |
566 | if (lastfid > LO_FID_TABLE_TOP) | |
8aae8284 | 567 | printk(KERN_INFO BFX "first fid not from lo freq table\n"); |
1da177e4 LT |
568 | |
569 | return 0; | |
570 | } | |
571 | ||
572 | static void print_basics(struct powernow_k8_data *data) | |
573 | { | |
574 | int j; | |
575 | for (j = 0; j < data->numps; j++) { | |
1f729e06 | 576 | if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID) { |
e7bdd7a5 | 577 | if (cpu_family == CPU_HW_PSTATE) { |
4ae5c49f | 578 | printk(KERN_INFO PFX " %d : pstate %d (%d MHz)\n", |
9a60ddbc | 579 | j, |
4ae5c49f | 580 | data->powernow_table[j].index, |
9a60ddbc | 581 | data->powernow_table[j].frequency/1000); |
1f729e06 | 582 | } else { |
9a60ddbc DJ |
583 | printk(KERN_INFO PFX " %d : fid 0x%x (%d MHz), vid 0x%x\n", |
584 | j, | |
585 | data->powernow_table[j].index & 0xff, | |
586 | data->powernow_table[j].frequency/1000, | |
587 | data->powernow_table[j].index >> 8); | |
1f729e06 DJ |
588 | } |
589 | } | |
1da177e4 LT |
590 | } |
591 | if (data->batps) | |
592 | printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps); | |
593 | } | |
594 | ||
595 | static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid) | |
596 | { | |
597 | struct cpufreq_frequency_table *powernow_table; | |
598 | unsigned int j; | |
599 | ||
600 | if (data->batps) { /* use ACPI support to get full speed on mains power */ | |
601 | printk(KERN_WARNING PFX "Only %d pstates usable (use ACPI driver for full range\n", data->batps); | |
602 | data->numps = data->batps; | |
603 | } | |
604 | ||
605 | for ( j=1; j<data->numps; j++ ) { | |
606 | if (pst[j-1].fid >= pst[j].fid) { | |
607 | printk(KERN_ERR PFX "PST out of sequence\n"); | |
608 | return -EINVAL; | |
609 | } | |
610 | } | |
611 | ||
612 | if (data->numps < 2) { | |
613 | printk(KERN_ERR PFX "no p states to transition\n"); | |
614 | return -ENODEV; | |
615 | } | |
616 | ||
617 | if (check_pst_table(data, pst, maxvid)) | |
618 | return -EINVAL; | |
619 | ||
620 | powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) | |
621 | * (data->numps + 1)), GFP_KERNEL); | |
622 | if (!powernow_table) { | |
623 | printk(KERN_ERR PFX "powernow_table memory alloc failure\n"); | |
624 | return -ENOMEM; | |
625 | } | |
626 | ||
627 | for (j = 0; j < data->numps; j++) { | |
628 | powernow_table[j].index = pst[j].fid; /* lower 8 bits */ | |
629 | powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */ | |
630 | powernow_table[j].frequency = find_khz_freq_from_fid(pst[j].fid); | |
631 | } | |
632 | powernow_table[data->numps].frequency = CPUFREQ_TABLE_END; | |
633 | powernow_table[data->numps].index = 0; | |
634 | ||
635 | if (query_current_values_with_pending_wait(data)) { | |
636 | kfree(powernow_table); | |
637 | return -EIO; | |
638 | } | |
639 | ||
640 | dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid); | |
641 | data->powernow_table = powernow_table; | |
08357611 | 642 | if (first_cpu(per_cpu(cpu_core_map, data->cpu)) == data->cpu) |
2e497620 | 643 | print_basics(data); |
1da177e4 LT |
644 | |
645 | for (j = 0; j < data->numps; j++) | |
646 | if ((pst[j].fid==data->currfid) && (pst[j].vid==data->currvid)) | |
647 | return 0; | |
648 | ||
649 | dprintk("currfid/vid do not match PST, ignoring\n"); | |
650 | return 0; | |
651 | } | |
652 | ||
653 | /* Find and validate the PSB/PST table in BIOS. */ | |
654 | static int find_psb_table(struct powernow_k8_data *data) | |
655 | { | |
656 | struct psb_s *psb; | |
657 | unsigned int i; | |
658 | u32 mvs; | |
659 | u8 maxvid; | |
660 | u32 cpst = 0; | |
661 | u32 thiscpuid; | |
662 | ||
663 | for (i = 0xc0000; i < 0xffff0; i += 0x10) { | |
664 | /* Scan BIOS looking for the signature. */ | |
665 | /* It can not be at ffff0 - it is too big. */ | |
666 | ||
667 | psb = phys_to_virt(i); | |
668 | if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0) | |
669 | continue; | |
670 | ||
671 | dprintk("found PSB header at 0x%p\n", psb); | |
672 | ||
673 | dprintk("table vers: 0x%x\n", psb->tableversion); | |
674 | if (psb->tableversion != PSB_VERSION_1_4) { | |
cc6e8de8 | 675 | printk(KERN_ERR BFX "PSB table is not v1.4\n"); |
1da177e4 LT |
676 | return -ENODEV; |
677 | } | |
678 | ||
679 | dprintk("flags: 0x%x\n", psb->flags1); | |
680 | if (psb->flags1) { | |
681 | printk(KERN_ERR BFX "unknown flags\n"); | |
682 | return -ENODEV; | |
683 | } | |
684 | ||
685 | data->vstable = psb->vstable; | |
686 | dprintk("voltage stabilization time: %d(*20us)\n", data->vstable); | |
687 | ||
688 | dprintk("flags2: 0x%x\n", psb->flags2); | |
689 | data->rvo = psb->flags2 & 3; | |
690 | data->irt = ((psb->flags2) >> 2) & 3; | |
691 | mvs = ((psb->flags2) >> 4) & 3; | |
692 | data->vidmvs = 1 << mvs; | |
693 | data->batps = ((psb->flags2) >> 6) & 3; | |
694 | ||
695 | dprintk("ramp voltage offset: %d\n", data->rvo); | |
696 | dprintk("isochronous relief time: %d\n", data->irt); | |
697 | dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs); | |
698 | ||
699 | dprintk("numpst: 0x%x\n", psb->num_tables); | |
700 | cpst = psb->num_tables; | |
701 | if ((psb->cpuid == 0x00000fc0) || (psb->cpuid == 0x00000fe0) ){ | |
702 | thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); | |
703 | if ((thiscpuid == 0x00000fc0) || (thiscpuid == 0x00000fe0) ) { | |
704 | cpst = 1; | |
705 | } | |
706 | } | |
707 | if (cpst != 1) { | |
708 | printk(KERN_ERR BFX "numpst must be 1\n"); | |
709 | return -ENODEV; | |
710 | } | |
711 | ||
712 | data->plllock = psb->plllocktime; | |
713 | dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime); | |
714 | dprintk("maxfid: 0x%x\n", psb->maxfid); | |
715 | dprintk("maxvid: 0x%x\n", psb->maxvid); | |
716 | maxvid = psb->maxvid; | |
717 | ||
718 | data->numps = psb->numps; | |
719 | dprintk("numpstates: 0x%x\n", data->numps); | |
720 | return fill_powernow_table(data, (struct pst_s *)(psb+1), maxvid); | |
721 | } | |
722 | /* | |
723 | * If you see this message, complain to BIOS manufacturer. If | |
724 | * he tells you "we do not support Linux" or some similar | |
725 | * nonsense, remember that Windows 2000 uses the same legacy | |
726 | * mechanism that the old Linux PSB driver uses. Tell them it | |
727 | * is broken with Windows 2000. | |
728 | * | |
729 | * The reference to the AMD documentation is chapter 9 in the | |
730 | * BIOS and Kernel Developer's Guide, which is available on | |
731 | * www.amd.com | |
732 | */ | |
cc6e8de8 | 733 | printk(KERN_ERR PFX "BIOS error - no PSB or ACPI _PSS objects\n"); |
1da177e4 LT |
734 | return -ENODEV; |
735 | } | |
736 | ||
737 | #ifdef CONFIG_X86_POWERNOW_K8_ACPI | |
738 | static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) | |
739 | { | |
f607e3a0 | 740 | if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE)) |
1da177e4 LT |
741 | return; |
742 | ||
f607e3a0 LT |
743 | data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK; |
744 | data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK; | |
745 | data->exttype = (data->acpi_data.states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK; | |
746 | data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK; | |
747 | data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK); | |
748 | data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK; | |
1da177e4 LT |
749 | } |
750 | ||
751 | static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) | |
752 | { | |
1da177e4 | 753 | struct cpufreq_frequency_table *powernow_table; |
1f729e06 | 754 | int ret_val; |
1da177e4 | 755 | |
f607e3a0 | 756 | if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) { |
065b807c | 757 | dprintk("register performance failed: bad ACPI data\n"); |
1da177e4 LT |
758 | return -EIO; |
759 | } | |
760 | ||
761 | /* verify the data contained in the ACPI structures */ | |
f607e3a0 | 762 | if (data->acpi_data.state_count <= 1) { |
1da177e4 LT |
763 | dprintk("No ACPI P-States\n"); |
764 | goto err_out; | |
765 | } | |
766 | ||
f607e3a0 LT |
767 | if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) || |
768 | (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) { | |
1da177e4 | 769 | dprintk("Invalid control/status registers (%x - %x)\n", |
f607e3a0 LT |
770 | data->acpi_data.control_register.space_id, |
771 | data->acpi_data.status_register.space_id); | |
1da177e4 LT |
772 | goto err_out; |
773 | } | |
774 | ||
775 | /* fill in data->powernow_table */ | |
776 | powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) | |
f607e3a0 | 777 | * (data->acpi_data.state_count + 1)), GFP_KERNEL); |
1da177e4 LT |
778 | if (!powernow_table) { |
779 | dprintk("powernow_table memory alloc failure\n"); | |
780 | goto err_out; | |
781 | } | |
782 | ||
e7bdd7a5 | 783 | if (cpu_family == CPU_HW_PSTATE) |
1f729e06 DJ |
784 | ret_val = fill_powernow_table_pstate(data, powernow_table); |
785 | else | |
786 | ret_val = fill_powernow_table_fidvid(data, powernow_table); | |
787 | if (ret_val) | |
788 | goto err_out_mem; | |
789 | ||
f607e3a0 LT |
790 | powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END; |
791 | powernow_table[data->acpi_data.state_count].index = 0; | |
1f729e06 DJ |
792 | data->powernow_table = powernow_table; |
793 | ||
794 | /* fill in data */ | |
f607e3a0 | 795 | data->numps = data->acpi_data.state_count; |
08357611 | 796 | if (first_cpu(per_cpu(cpu_core_map, data->cpu)) == data->cpu) |
2e497620 | 797 | print_basics(data); |
1f729e06 DJ |
798 | powernow_k8_acpi_pst_values(data, 0); |
799 | ||
800 | /* notify BIOS that we exist */ | |
801 | acpi_processor_notify_smm(THIS_MODULE); | |
802 | ||
803 | return 0; | |
804 | ||
805 | err_out_mem: | |
806 | kfree(powernow_table); | |
807 | ||
808 | err_out: | |
f607e3a0 | 809 | acpi_processor_unregister_performance(&data->acpi_data, data->cpu); |
1f729e06 DJ |
810 | |
811 | /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */ | |
f607e3a0 | 812 | data->acpi_data.state_count = 0; |
1f729e06 DJ |
813 | |
814 | return -ENODEV; | |
815 | } | |
816 | ||
817 | static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table) | |
818 | { | |
819 | int i; | |
c5829cd0 ML |
820 | u32 hi = 0, lo = 0; |
821 | rdmsr(MSR_PSTATE_CUR_LIMIT, hi, lo); | |
822 | data->max_hw_pstate = (hi & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT; | |
1f729e06 | 823 | |
f607e3a0 | 824 | for (i = 0; i < data->acpi_data.state_count; i++) { |
1f729e06 | 825 | u32 index; |
1f729e06 | 826 | |
f607e3a0 | 827 | index = data->acpi_data.states[i].control & HW_PSTATE_MASK; |
c5829cd0 | 828 | if (index > data->max_hw_pstate) { |
1f729e06 DJ |
829 | printk(KERN_ERR PFX "invalid pstate %d - bad value %d.\n", i, index); |
830 | printk(KERN_ERR PFX "Please report to BIOS manufacturer\n"); | |
c5829cd0 ML |
831 | powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; |
832 | continue; | |
1f729e06 DJ |
833 | } |
834 | rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi); | |
835 | if (!(hi & HW_PSTATE_VALID_MASK)) { | |
836 | dprintk("invalid pstate %d, ignoring\n", index); | |
837 | powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; | |
838 | continue; | |
839 | } | |
840 | ||
c5829cd0 | 841 | powernow_table[i].index = index; |
1f729e06 | 842 | |
f607e3a0 | 843 | powernow_table[i].frequency = data->acpi_data.states[i].core_frequency * 1000; |
1f729e06 DJ |
844 | } |
845 | return 0; | |
846 | } | |
847 | ||
848 | static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table) | |
849 | { | |
850 | int i; | |
851 | int cntlofreq = 0; | |
f607e3a0 | 852 | for (i = 0; i < data->acpi_data.state_count; i++) { |
094ce7fd DJ |
853 | u32 fid; |
854 | u32 vid; | |
855 | ||
856 | if (data->exttype) { | |
f607e3a0 LT |
857 | fid = data->acpi_data.states[i].status & EXT_FID_MASK; |
858 | vid = (data->acpi_data.states[i].status >> VID_SHIFT) & EXT_VID_MASK; | |
841e40b3 | 859 | } else { |
f607e3a0 LT |
860 | fid = data->acpi_data.states[i].control & FID_MASK; |
861 | vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK; | |
841e40b3 | 862 | } |
1da177e4 LT |
863 | |
864 | dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid); | |
865 | ||
866 | powernow_table[i].index = fid; /* lower 8 bits */ | |
867 | powernow_table[i].index |= (vid << 8); /* upper 8 bits */ | |
868 | powernow_table[i].frequency = find_khz_freq_from_fid(fid); | |
869 | ||
870 | /* verify frequency is OK */ | |
871 | if ((powernow_table[i].frequency > (MAX_FREQ * 1000)) || | |
872 | (powernow_table[i].frequency < (MIN_FREQ * 1000))) { | |
873 | dprintk("invalid freq %u kHz, ignoring\n", powernow_table[i].frequency); | |
874 | powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; | |
875 | continue; | |
876 | } | |
877 | ||
878 | /* verify voltage is OK - BIOSs are using "off" to indicate invalid */ | |
841e40b3 | 879 | if (vid == VID_OFF) { |
1da177e4 LT |
880 | dprintk("invalid vid %u, ignoring\n", vid); |
881 | powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; | |
882 | continue; | |
883 | } | |
884 | ||
065b807c DJ |
885 | /* verify only 1 entry from the lo frequency table */ |
886 | if (fid < HI_FID_TABLE_BOTTOM) { | |
887 | if (cntlofreq) { | |
32ee8c3e | 888 | /* if both entries are the same, ignore this one ... */ |
065b807c DJ |
889 | if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) || |
890 | (powernow_table[i].index != powernow_table[cntlofreq].index)) { | |
891 | printk(KERN_ERR PFX "Too many lo freq table entries\n"); | |
1f729e06 | 892 | return 1; |
065b807c DJ |
893 | } |
894 | ||
895 | dprintk("double low frequency table entry, ignoring it.\n"); | |
896 | powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; | |
897 | continue; | |
898 | } else | |
899 | cntlofreq = i; | |
1da177e4 LT |
900 | } |
901 | ||
f607e3a0 | 902 | if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) { |
1da177e4 LT |
903 | printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n", |
904 | powernow_table[i].frequency, | |
f607e3a0 | 905 | (unsigned int) (data->acpi_data.states[i].core_frequency * 1000)); |
1da177e4 LT |
906 | powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; |
907 | continue; | |
908 | } | |
909 | } | |
1da177e4 | 910 | return 0; |
1da177e4 LT |
911 | } |
912 | ||
913 | static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) | |
914 | { | |
f607e3a0 LT |
915 | if (data->acpi_data.state_count) |
916 | acpi_processor_unregister_performance(&data->acpi_data, data->cpu); | |
1da177e4 LT |
917 | } |
918 | ||
919 | #else | |
920 | static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; } | |
921 | static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; } | |
922 | static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; } | |
923 | #endif /* CONFIG_X86_POWERNOW_K8_ACPI */ | |
924 | ||
925 | /* Take a frequency, and issue the fid/vid transition command */ | |
1f729e06 | 926 | static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned int index) |
1da177e4 | 927 | { |
1f729e06 DJ |
928 | u32 fid = 0; |
929 | u32 vid = 0; | |
065b807c | 930 | int res, i; |
1da177e4 LT |
931 | struct cpufreq_freqs freqs; |
932 | ||
933 | dprintk("cpu %d transition to index %u\n", smp_processor_id(), index); | |
934 | ||
1f729e06 | 935 | /* fid/vid correctness check for k8 */ |
1da177e4 | 936 | /* fid are the lower 8 bits of the index we stored into |
1f729e06 DJ |
937 | * the cpufreq frequency table in find_psb_table, vid |
938 | * are the upper 8 bits. | |
1da177e4 | 939 | */ |
1da177e4 LT |
940 | fid = data->powernow_table[index].index & 0xFF; |
941 | vid = (data->powernow_table[index].index & 0xFF00) >> 8; | |
942 | ||
943 | dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid); | |
944 | ||
945 | if (query_current_values_with_pending_wait(data)) | |
946 | return 1; | |
947 | ||
948 | if ((data->currvid == vid) && (data->currfid == fid)) { | |
949 | dprintk("target matches current values (fid 0x%x, vid 0x%x)\n", | |
950 | fid, vid); | |
951 | return 0; | |
952 | } | |
953 | ||
954 | if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) { | |
065b807c DJ |
955 | printk(KERN_ERR PFX |
956 | "ignoring illegal change in lo freq table-%x to 0x%x\n", | |
1da177e4 LT |
957 | data->currfid, fid); |
958 | return 1; | |
959 | } | |
960 | ||
961 | dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n", | |
962 | smp_processor_id(), fid, vid); | |
1da177e4 LT |
963 | freqs.old = find_khz_freq_from_fid(data->currfid); |
964 | freqs.new = find_khz_freq_from_fid(fid); | |
1f729e06 | 965 | |
334ef7a7 | 966 | for_each_cpu_mask_nr(i, *(data->available_cores)) { |
065b807c DJ |
967 | freqs.cpu = i; |
968 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
969 | } | |
1da177e4 | 970 | |
1da177e4 | 971 | res = transition_fid_vid(data, fid, vid); |
1da177e4 | 972 | freqs.new = find_khz_freq_from_fid(data->currfid); |
1f729e06 | 973 | |
334ef7a7 | 974 | for_each_cpu_mask_nr(i, *(data->available_cores)) { |
1f729e06 DJ |
975 | freqs.cpu = i; |
976 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
977 | } | |
978 | return res; | |
979 | } | |
980 | ||
981 | /* Take a frequency, and issue the hardware pstate transition command */ | |
982 | static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned int index) | |
983 | { | |
1f729e06 DJ |
984 | u32 pstate = 0; |
985 | int res, i; | |
986 | struct cpufreq_freqs freqs; | |
987 | ||
988 | dprintk("cpu %d transition to index %u\n", smp_processor_id(), index); | |
989 | ||
c5829cd0 | 990 | /* get MSR index for hardware pstate transition */ |
1f729e06 | 991 | pstate = index & HW_PSTATE_MASK; |
c5829cd0 | 992 | if (pstate > data->max_hw_pstate) |
1f729e06 | 993 | return 0; |
c5829cd0 ML |
994 | freqs.old = find_khz_freq_from_pstate(data->powernow_table, data->currpstate); |
995 | freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate); | |
1f729e06 | 996 | |
334ef7a7 | 997 | for_each_cpu_mask_nr(i, *(data->available_cores)) { |
1f729e06 DJ |
998 | freqs.cpu = i; |
999 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | |
1000 | } | |
1001 | ||
1002 | res = transition_pstate(data, pstate); | |
c5829cd0 | 1003 | freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate); |
1f729e06 | 1004 | |
334ef7a7 | 1005 | for_each_cpu_mask_nr(i, *(data->available_cores)) { |
065b807c DJ |
1006 | freqs.cpu = i; |
1007 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | |
2e3f8faa | 1008 | } |
1da177e4 LT |
1009 | return res; |
1010 | } | |
1011 | ||
1012 | /* Driver entry point to switch to the target frequency */ | |
1013 | static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation) | |
1014 | { | |
fc0e4748 | 1015 | cpumask_t oldmask; |
2c6b8c03 | 1016 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
9180053c AB |
1017 | u32 checkfid; |
1018 | u32 checkvid; | |
1da177e4 LT |
1019 | unsigned int newstate; |
1020 | int ret = -EIO; | |
1021 | ||
4211a303 JS |
1022 | if (!data) |
1023 | return -EINVAL; | |
1024 | ||
9180053c AB |
1025 | checkfid = data->currfid; |
1026 | checkvid = data->currvid; | |
1027 | ||
1da177e4 LT |
1028 | /* only run on specific CPU from here on */ |
1029 | oldmask = current->cpus_allowed; | |
0bc3cc03 | 1030 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(pol->cpu)); |
1da177e4 LT |
1031 | |
1032 | if (smp_processor_id() != pol->cpu) { | |
8aae8284 | 1033 | printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu); |
1da177e4 LT |
1034 | goto err_out; |
1035 | } | |
1036 | ||
1037 | if (pending_bit_stuck()) { | |
1038 | printk(KERN_ERR PFX "failing targ, change pending bit set\n"); | |
1039 | goto err_out; | |
1040 | } | |
1041 | ||
1042 | dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n", | |
1043 | pol->cpu, targfreq, pol->min, pol->max, relation); | |
1044 | ||
83844510 | 1045 | if (query_current_values_with_pending_wait(data)) |
1da177e4 | 1046 | goto err_out; |
1da177e4 | 1047 | |
c5829cd0 | 1048 | if (cpu_family != CPU_HW_PSTATE) { |
1f729e06 | 1049 | dprintk("targ: curr fid 0x%x, vid 0x%x\n", |
1da177e4 LT |
1050 | data->currfid, data->currvid); |
1051 | ||
1f729e06 DJ |
1052 | if ((checkvid != data->currvid) || (checkfid != data->currfid)) { |
1053 | printk(KERN_INFO PFX | |
1054 | "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n", | |
1055 | checkfid, data->currfid, checkvid, data->currvid); | |
1056 | } | |
1da177e4 LT |
1057 | } |
1058 | ||
1059 | if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate)) | |
1060 | goto err_out; | |
1061 | ||
14cc3e2b | 1062 | mutex_lock(&fidvid_mutex); |
065b807c | 1063 | |
1da177e4 LT |
1064 | powernow_k8_acpi_pst_values(data, newstate); |
1065 | ||
e7bdd7a5 | 1066 | if (cpu_family == CPU_HW_PSTATE) |
1f729e06 DJ |
1067 | ret = transition_frequency_pstate(data, newstate); |
1068 | else | |
1069 | ret = transition_frequency_fidvid(data, newstate); | |
1070 | if (ret) { | |
1da177e4 LT |
1071 | printk(KERN_ERR PFX "transition frequency failed\n"); |
1072 | ret = 1; | |
14cc3e2b | 1073 | mutex_unlock(&fidvid_mutex); |
1da177e4 LT |
1074 | goto err_out; |
1075 | } | |
14cc3e2b | 1076 | mutex_unlock(&fidvid_mutex); |
065b807c | 1077 | |
e7bdd7a5 | 1078 | if (cpu_family == CPU_HW_PSTATE) |
c5829cd0 | 1079 | pol->cur = find_khz_freq_from_pstate(data->powernow_table, newstate); |
1f729e06 DJ |
1080 | else |
1081 | pol->cur = find_khz_freq_from_fid(data->currfid); | |
1da177e4 LT |
1082 | ret = 0; |
1083 | ||
1084 | err_out: | |
fc0e4748 | 1085 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 LT |
1086 | return ret; |
1087 | } | |
1088 | ||
1089 | /* Driver entry point to verify the policy and range of frequencies */ | |
1090 | static int powernowk8_verify(struct cpufreq_policy *pol) | |
1091 | { | |
2c6b8c03 | 1092 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
1da177e4 | 1093 | |
4211a303 JS |
1094 | if (!data) |
1095 | return -EINVAL; | |
1096 | ||
1da177e4 LT |
1097 | return cpufreq_frequency_table_verify(pol, data->powernow_table); |
1098 | } | |
1099 | ||
1100 | /* per CPU init entry point to the driver */ | |
aa41eb99 | 1101 | static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol) |
1da177e4 LT |
1102 | { |
1103 | struct powernow_k8_data *data; | |
f607e3a0 | 1104 | cpumask_t oldmask; |
d7fa706c | 1105 | int rc; |
1da177e4 | 1106 | |
8aae8284 JS |
1107 | if (!cpu_online(pol->cpu)) |
1108 | return -ENODEV; | |
1109 | ||
1da177e4 LT |
1110 | if (!check_supported_cpu(pol->cpu)) |
1111 | return -ENODEV; | |
1112 | ||
bfdc708d | 1113 | data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL); |
1da177e4 LT |
1114 | if (!data) { |
1115 | printk(KERN_ERR PFX "unable to alloc powernow_k8_data"); | |
1116 | return -ENOMEM; | |
1117 | } | |
1da177e4 LT |
1118 | |
1119 | data->cpu = pol->cpu; | |
1120 | ||
1121 | if (powernow_k8_cpu_init_acpi(data)) { | |
1122 | /* | |
1123 | * Use the PSB BIOS structure. This is only availabe on | |
1124 | * an UP version, and is deprecated by AMD. | |
1125 | */ | |
9ed059e1 | 1126 | if (num_online_cpus() != 1) { |
eba9fe93 ML |
1127 | #ifndef CONFIG_ACPI_PROCESSOR |
1128 | printk(KERN_ERR PFX "ACPI Processor support is required " | |
1129 | "for SMP systems but is absent. Please load the " | |
1130 | "ACPI Processor module before starting this " | |
1131 | "driver.\n"); | |
1132 | #else | |
1133 | printk(KERN_ERR PFX "Your BIOS does not provide ACPI " | |
1134 | "_PSS objects in a way that Linux understands. " | |
1135 | "Please report this to the Linux ACPI maintainers" | |
1136 | " and complain to your BIOS vendor.\n"); | |
1137 | #endif | |
1da177e4 LT |
1138 | kfree(data); |
1139 | return -ENODEV; | |
1140 | } | |
1141 | if (pol->cpu != 0) { | |
eba9fe93 ML |
1142 | printk(KERN_ERR PFX "No ACPI _PSS objects for CPU other than " |
1143 | "CPU0. Complain to your BIOS vendor.\n"); | |
1da177e4 LT |
1144 | kfree(data); |
1145 | return -ENODEV; | |
1146 | } | |
1147 | rc = find_psb_table(data); | |
1148 | if (rc) { | |
1149 | kfree(data); | |
1150 | return -ENODEV; | |
1151 | } | |
1152 | } | |
1153 | ||
1154 | /* only run on specific CPU from here on */ | |
1155 | oldmask = current->cpus_allowed; | |
0bc3cc03 | 1156 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(pol->cpu)); |
1da177e4 LT |
1157 | |
1158 | if (smp_processor_id() != pol->cpu) { | |
8aae8284 | 1159 | printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu); |
1da177e4 LT |
1160 | goto err_out; |
1161 | } | |
1162 | ||
1163 | if (pending_bit_stuck()) { | |
1164 | printk(KERN_ERR PFX "failing init, change pending bit set\n"); | |
1165 | goto err_out; | |
1166 | } | |
1167 | ||
1168 | if (query_current_values_with_pending_wait(data)) | |
1169 | goto err_out; | |
1170 | ||
e7bdd7a5 | 1171 | if (cpu_family == CPU_OPTERON) |
1f729e06 | 1172 | fidvid_msr_init(); |
1da177e4 LT |
1173 | |
1174 | /* run on any CPU again */ | |
fc0e4748 | 1175 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 | 1176 | |
f607e3a0 LT |
1177 | if (cpu_family == CPU_HW_PSTATE) |
1178 | pol->cpus = cpumask_of_cpu(pol->cpu); | |
1179 | else | |
1180 | pol->cpus = per_cpu(cpu_core_map, pol->cpu); | |
1f729e06 | 1181 | data->available_cores = &(pol->cpus); |
1da177e4 | 1182 | |
32ee8c3e | 1183 | /* Take a crude guess here. |
1da177e4 LT |
1184 | * That guess was in microseconds, so multiply with 1000 */ |
1185 | pol->cpuinfo.transition_latency = (((data->rvo + 8) * data->vstable * VST_UNITS_20US) | |
1186 | + (3 * (1 << data->irt) * 10)) * 1000; | |
1187 | ||
e7bdd7a5 | 1188 | if (cpu_family == CPU_HW_PSTATE) |
c5829cd0 | 1189 | pol->cur = find_khz_freq_from_pstate(data->powernow_table, data->currpstate); |
1f729e06 DJ |
1190 | else |
1191 | pol->cur = find_khz_freq_from_fid(data->currfid); | |
1da177e4 LT |
1192 | dprintk("policy current frequency %d kHz\n", pol->cur); |
1193 | ||
1194 | /* min/max the cpu is capable of */ | |
1195 | if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) { | |
1196 | printk(KERN_ERR PFX "invalid powernow_table\n"); | |
1197 | powernow_k8_cpu_exit_acpi(data); | |
1198 | kfree(data->powernow_table); | |
1199 | kfree(data); | |
1200 | return -EINVAL; | |
1201 | } | |
1202 | ||
1203 | cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu); | |
1204 | ||
e7bdd7a5 | 1205 | if (cpu_family == CPU_HW_PSTATE) |
c5829cd0 | 1206 | dprintk("cpu_init done, current pstate 0x%x\n", data->currpstate); |
1f729e06 DJ |
1207 | else |
1208 | dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n", | |
1209 | data->currfid, data->currvid); | |
1da177e4 | 1210 | |
2c6b8c03 | 1211 | per_cpu(powernow_data, pol->cpu) = data; |
1da177e4 LT |
1212 | |
1213 | return 0; | |
1214 | ||
1215 | err_out: | |
fc0e4748 | 1216 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 LT |
1217 | powernow_k8_cpu_exit_acpi(data); |
1218 | ||
1219 | kfree(data); | |
1220 | return -ENODEV; | |
1221 | } | |
1222 | ||
1223 | static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol) | |
1224 | { | |
2c6b8c03 | 1225 | struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); |
1da177e4 LT |
1226 | |
1227 | if (!data) | |
1228 | return -EINVAL; | |
1229 | ||
1230 | powernow_k8_cpu_exit_acpi(data); | |
1231 | ||
1232 | cpufreq_frequency_table_put_attr(pol->cpu); | |
1233 | ||
1234 | kfree(data->powernow_table); | |
1235 | kfree(data); | |
1236 | ||
1237 | return 0; | |
1238 | } | |
1239 | ||
1240 | static unsigned int powernowk8_get (unsigned int cpu) | |
1241 | { | |
eef5167e | 1242 | struct powernow_k8_data *data; |
1da177e4 LT |
1243 | cpumask_t oldmask = current->cpus_allowed; |
1244 | unsigned int khz = 0; | |
89c04849 | 1245 | unsigned int first; |
1da177e4 | 1246 | |
89c04849 DJ |
1247 | first = first_cpu(per_cpu(cpu_core_map, cpu)); |
1248 | data = per_cpu(powernow_data, first); | |
eef5167e JS |
1249 | |
1250 | if (!data) | |
1251 | return -EINVAL; | |
1252 | ||
0bc3cc03 | 1253 | set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu)); |
1da177e4 | 1254 | if (smp_processor_id() != cpu) { |
fc0e4748 MT |
1255 | printk(KERN_ERR PFX |
1256 | "limiting to CPU %d failed in powernowk8_get\n", cpu); | |
1257 | set_cpus_allowed_ptr(current, &oldmask); | |
1da177e4 LT |
1258 | return 0; |
1259 | } | |
b9111b7b | 1260 | |
1da177e4 LT |
1261 | if (query_current_values_with_pending_wait(data)) |
1262 | goto out; | |
1263 | ||
58389a86 | 1264 | if (cpu_family == CPU_HW_PSTATE) |
fc0e4748 MT |
1265 | khz = find_khz_freq_from_pstate(data->powernow_table, |
1266 | data->currpstate); | |
58389a86 JD |
1267 | else |
1268 | khz = find_khz_freq_from_fid(data->currfid); | |
1269 | ||
1da177e4 | 1270 | |
b9111b7b | 1271 | out: |
fc0e4748 | 1272 | set_cpus_allowed_ptr(current, &oldmask); |
1da177e4 LT |
1273 | return khz; |
1274 | } | |
1275 | ||
1276 | static struct freq_attr* powernow_k8_attr[] = { | |
1277 | &cpufreq_freq_attr_scaling_available_freqs, | |
1278 | NULL, | |
1279 | }; | |
1280 | ||
221dee28 | 1281 | static struct cpufreq_driver cpufreq_amd64_driver = { |
1da177e4 LT |
1282 | .verify = powernowk8_verify, |
1283 | .target = powernowk8_target, | |
1284 | .init = powernowk8_cpu_init, | |
1285 | .exit = __devexit_p(powernowk8_cpu_exit), | |
1286 | .get = powernowk8_get, | |
1287 | .name = "powernow-k8", | |
1288 | .owner = THIS_MODULE, | |
1289 | .attr = powernow_k8_attr, | |
1290 | }; | |
1291 | ||
1292 | /* driver entry point for init */ | |
aa41eb99 | 1293 | static int __cpuinit powernowk8_init(void) |
1da177e4 LT |
1294 | { |
1295 | unsigned int i, supported_cpus = 0; | |
1296 | ||
a7201156 | 1297 | for_each_online_cpu(i) { |
1da177e4 LT |
1298 | if (check_supported_cpu(i)) |
1299 | supported_cpus++; | |
1300 | } | |
1301 | ||
1302 | if (supported_cpus == num_online_cpus()) { | |
1f729e06 | 1303 | printk(KERN_INFO PFX "Found %d %s " |
904f7a3f | 1304 | "processors (%d cpu cores) (" VERSION ")\n", |
c925401b | 1305 | num_online_nodes(), |
904f7a3f | 1306 | boot_cpu_data.x86_model_id, supported_cpus); |
1da177e4 LT |
1307 | return cpufreq_register_driver(&cpufreq_amd64_driver); |
1308 | } | |
1309 | ||
1310 | return -ENODEV; | |
1311 | } | |
1312 | ||
1313 | /* driver entry point for term */ | |
1314 | static void __exit powernowk8_exit(void) | |
1315 | { | |
1316 | dprintk("exit\n"); | |
1317 | ||
1318 | cpufreq_unregister_driver(&cpufreq_amd64_driver); | |
1319 | } | |
1320 | ||
8aae8284 | 1321 | MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com>"); |
1da177e4 LT |
1322 | MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver."); |
1323 | MODULE_LICENSE("GPL"); | |
1324 | ||
1325 | late_initcall(powernowk8_init); | |
1326 | module_exit(powernowk8_exit); |